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Changed bx_bool to bool type in some more devices.

Browse Source 
TODO: parts of the display adapter and USB host controller code.
This commit is contained in:
Volker Ruppert 2021-02-01 20:39:33 +00:00
parent b2f0f74c6a
commit dce82d74e1
25 changed files with 322 additions and 322 deletions
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2
bochs/doc/docbook/development/development.dbk
View File

@ -2753,7 +2753,7 @@ one. This is used for the image mode autodetection feature.
<para>
<emphasis>
bx_bool save_state(const char *backup_fname);
bool save_state(const char *backup_fname);
</emphasis>
calls the related redolog_t method to save the image state.
</para>

2
bochs/instrument/instrumentation.txt
View File

@ -109,7 +109,7 @@ Possible operation types, passed through bx_instr_ucnear_branch and bx_instr_far
This callback is called right before Bochs executes a VMEXIT.
void bx_instr_opcode(unsigned cpu, bxInstruction_c *i, const Bit8u *opcode, unsigned len, bx_bool is32, bx_bool is64);
void bx_instr_opcode(unsigned cpu, bxInstruction_c *i, const Bit8u *opcode, unsigned len, bool is32, bool is64);
The callback is called each time, when Bochs completes to decode a new
instruction. Through this callback function Bochs could provide an opcode of

24
bochs/iodev/display/banshee.cc
View File

@ -117,7 +117,7 @@ extern voodoo_state *v;
extern BX_MUTEX(cmdfifo_mutex);
extern BX_MUTEX(render_mutex);
Bit32u register_r(Bit32u offset);
void register_w(Bit32u offset, Bit32u data, bx_bool log);
void register_w(Bit32u offset, Bit32u data, bool log);
void register_w_common(Bit32u offset, Bit32u data);
Bit32u lfb_r(Bit32u offset);
Bit32u lfb_w(Bit32u offset, Bit32u data, Bit32u mem_mask);
@ -312,7 +312,7 @@ void bx_banshee_c::after_restore_state(void)
start_fifo_thread();
}
bx_bool bx_banshee_c::update_timing(void)
bool bx_banshee_c::update_timing(void)
{
float hfreq;
bx_crtc_params_t crtcp;
@ -328,7 +328,7 @@ bx_bool bx_banshee_c::update_timing(void)
return 1;
}
void bx_banshee_c::set_tile_updated(unsigned xti, unsigned yti, bx_bool flag)
void bx_banshee_c::set_tile_updated(unsigned xti, unsigned yti, bool flag)
{
SET_TILE_UPDATED(, xti, yti, flag);
}
@ -453,7 +453,7 @@ void bx_banshee_c::draw_hwcursor(unsigned xc, unsigned yc, bx_svga_tileinfo_t *i
}
}
Bit32u bx_banshee_c::get_retrace(bx_bool hv)
Bit32u bx_banshee_c::get_retrace(bool hv)
{
return theVoodooVga->get_retrace();
}
@ -1527,7 +1527,7 @@ void bx_banshee_c::blt_complete()
BLT.busy = 0;
}
bx_bool bx_banshee_c::blt_apply_clipwindow(int *x0, int *y0, int *x1, int *y1, int *w, int *h)
bool bx_banshee_c::blt_apply_clipwindow(int *x0, int *y0, int *x1, int *y1, int *w, int *h)
{
int cx0, cx1, cy0, cy1, xd, yd;
@ -1584,7 +1584,7 @@ bx_bool bx_banshee_c::blt_apply_clipwindow(int *x0, int *y0, int *x1, int *y1, i
return ((*w > 0) && (*h > 0));
}
Bit8u bx_banshee_c::colorkey_check(Bit8u *ptr, Bit8u pxsize, bx_bool dst)
Bit8u bx_banshee_c::colorkey_check(Bit8u *ptr, Bit8u pxsize, bool dst)
{
Bit8u pass = 0;
Bit32u color, cmin, cmax;
@ -2401,7 +2401,7 @@ void bx_banshee_c::blt_host_to_screen_pattern()
BX_UNLOCK(render_mutex);
}
void bx_banshee_c::blt_line(bx_bool pline)
void bx_banshee_c::blt_line(bool pline)
{
Bit32u dpitch = BLT.dst_pitch;
Bit8u dpxsize = (BLT.dst_fmt > 1) ? (BLT.dst_fmt - 1) : 1;
@ -2515,7 +2515,7 @@ void bx_banshee_c::blt_line(bx_bool pline)
BX_UNLOCK(render_mutex);
}
int calc_line_xpos(int x1, int y1, int x2, int y2, int yc, bx_bool r)
int calc_line_xpos(int x1, int y1, int x2, int y2, int yc, bool r)
{
int i, deltax, deltay, numpixels,
d, dinc1, dinc2,
@ -2582,7 +2582,7 @@ int calc_line_xpos(int x1, int y1, int x2, int y2, int yc, bx_bool r)
return (r ? xr : xl);
}
void bx_banshee_c::blt_polygon_fill(bx_bool force)
void bx_banshee_c::blt_polygon_fill(bool force)
{
Bit32u dpitch = BLT.dst_pitch;
Bit8u dpxsize = (BLT.dst_fmt > 1) ? (BLT.dst_fmt - 1) : 1;
@ -2705,9 +2705,9 @@ bx_voodoo_vga_c::~bx_voodoo_vga_c()
s.memory = NULL;
}
bx_bool bx_voodoo_vga_c::init_vga_extension(void)
bool bx_voodoo_vga_c::init_vga_extension(void)
{
bx_bool ret = 0;
bool ret = 0;
Bit8u model = (Bit8u)SIM->get_param_enum("model", (bx_list_c*)SIM->get_param(BXPN_VOODOO))->get();
if (model < VOODOO_BANSHEE) {
@ -2788,7 +2788,7 @@ void bx_voodoo_vga_c::banshee_update_mode(void)
BX_VVGA_THIS s.last_fh = 0;
}
void bx_voodoo_vga_c::banshee_set_dac_mode(bx_bool mode)
void bx_voodoo_vga_c::banshee_set_dac_mode(bool mode)
{
unsigned i;

14
bochs/iodev/display/ddc.cc
View File

@ -2,7 +2,7 @@
// $Id$
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2018-2020 The Bochs Project
// Copyright (C) 2018-2021 The Bochs Project
//
// This library is free software; you can redistribute it and/or
// modify it under the terms of the GNU Lesser General Public
@ -204,15 +204,15 @@ bx_ddc_c::~bx_ddc_c(void)
Bit8u bx_ddc_c::read()
{
Bit8u retval = (((s.DDAmon & s.DDAhost) << 3) | (s.DCKhost << 2) |
(s.DDAhost << 1) | s.DCKhost);
Bit8u retval = (((Bit8u)(s.DDAmon & s.DDAhost) << 3) | ((Bit8u)s.DCKhost << 2) |
((Bit8u)s.DDAhost << 1) | (Bit8u)s.DCKhost);
return retval;
}
void bx_ddc_c::write(bx_bool dck, bx_bool dda)
void bx_ddc_c::write(bool dck, bool dda)
{
bx_bool dck_change = 0;
bx_bool dda_change = 0;
bool dck_change = 0;
bool dda_change = 0;
if (s.ddc_mode == BX_DDC_MODE_DISABLED)
return;
@ -293,7 +293,7 @@ void bx_ddc_c::write(bx_bool dck, bx_bool dda)
switch (s.ddc_stage) {
case DDC_STAGE_ADDRESS:
case DDC_STAGE_DATA_IN:
s.ddc_byte |= (s.DDAhost << s.ddc_bitshift);
s.ddc_byte |= ((Bit8u)s.DDAhost << s.ddc_bitshift);
break;
case DDC_STAGE_RW:
s.ddc_rw = s.DDAhost;

16
bochs/iodev/display/ddc.h
View File

@ -2,7 +2,7 @@
// $Id$
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2018-2020 The Bochs Project
// Copyright (C) 2018-2021 The Bochs Project
//
// This library is free software; you can redistribute it and/or
// modify it under the terms of the GNU Lesser General Public
@ -28,7 +28,7 @@ public:
virtual ~bx_ddc_c();
Bit8u read(void);
void write(bx_bool dck, bx_bool dda);
void write(bool dck, bool dda);
private:
@ -36,16 +36,16 @@ private:
struct {
Bit8u ddc_mode;
bx_bool DCKhost;
bx_bool DDAhost;
bx_bool DDAmon;
bool DCKhost;
bool DDAhost;
bool DDAmon;
Bit8u ddc_stage;
Bit8u ddc_bitshift;
bx_bool ddc_ack;
bx_bool ddc_rw;
bool ddc_ack;
bool ddc_rw;
Bit8u ddc_byte;
Bit8u edid_index;
bx_bool edid_extblock;
bool edid_extblock;
Bit8u edid_data[256];
} s; // state information
};

8
bochs/iodev/display/svga_cirrus.cc
View File

@ -239,7 +239,7 @@ bx_svga_cirrus_c::~bx_svga_cirrus_c()
BX_DEBUG(("Exit"));
}
bx_bool bx_svga_cirrus_c::init_vga_extension(void)
bool bx_svga_cirrus_c::init_vga_extension(void)
{
BX_CIRRUS_THIS put("CIRRUS");
// initialize SVGA stuffs.
@ -1552,7 +1552,7 @@ void bx_svga_cirrus_c::svga_write_crtc(Bit32u address, unsigned index, Bit8u val
{
BX_DEBUG(("crtc: index 0x%02x write 0x%02x", index, (unsigned)value));
bx_bool update_pitch = 0;
bool update_pitch = 0;
switch (index) {
case 0x00: // VGA
@ -1676,7 +1676,7 @@ void bx_svga_cirrus_c::svga_write_sequencer(Bit32u address, unsigned index, Bit8
{
BX_DEBUG(("sequencer: index 0x%02x write 0x%02x", index, (unsigned)value));
bx_bool update_cursor = 0;
bool update_cursor = 0;
Bit16u x, y, size;
Bit8u i, n, d, p;
@ -3088,7 +3088,7 @@ void bx_svga_cirrus_c::svga_colorexpand_transp_memsrc()
}
}
bx_bool // 1 if finished, 0 otherwise
bool // 1 if finished, 0 otherwise
bx_svga_cirrus_c::svga_asyncbitblt_next()
{
int count;

18
bochs/iodev/display/svga_cirrus.h
View File

@ -63,7 +63,7 @@ public:
bx_svga_cirrus_c();
virtual ~bx_svga_cirrus_c();
virtual bx_bool init_vga_extension(void);
virtual bool init_vga_extension(void);
virtual void reset(unsigned type);
virtual void redraw_area(unsigned x0, unsigned y0,
unsigned width, unsigned height);
@ -166,7 +166,7 @@ private:
BX_CIRRUS_SMF void svga_simplebitblt_memsrc();
BX_CIRRUS_SMF void svga_colorexpand_transp_memsrc();
BX_CIRRUS_SMF bx_bool svga_asyncbitblt_next();
BX_CIRRUS_SMF bool svga_asyncbitblt_next();
BX_CIRRUS_SMF bx_bitblt_rop_t svga_get_fwd_rop_handler(Bit8u rop);
BX_CIRRUS_SMF bx_bitblt_rop_t svga_get_bkwd_rop_handler(Bit8u rop);
@ -190,10 +190,10 @@ private:
Bit8u palette[48];
} hidden_dac; // 0x3c6
bx_bool svga_unlock_special;
bx_bool svga_needs_update_tile;
bx_bool svga_needs_update_dispentire;
bx_bool svga_needs_update_mode;
bool svga_unlock_special;
bool svga_needs_update_tile;
bool svga_needs_update_dispentire;
bool svga_needs_update_mode;
unsigned svga_xres;
unsigned svga_yres;
@ -246,10 +246,10 @@ private:
bx_ddc_c ddc;
bx_bool is_unlocked() { return svga_unlock_special; }
bool is_unlocked() { return svga_unlock_special; }
bx_bool banking_granularity_is_16k() { return !!(control.reg[0x0B] & 0x20); }
bx_bool banking_is_dual() { return !!(control.reg[0x0B] & 0x01); }
bool banking_granularity_is_16k() { return !!(control.reg[0x0B] & 0x20); }
bool banking_is_dual() { return !!(control.reg[0x0B] & 0x01); }
#if BX_SUPPORT_PCI
BX_CIRRUS_SMF void svga_init_pcihandlers(void);

16
bochs/iodev/display/vga.cc
View File

@ -71,10 +71,10 @@ bx_vga_c::~bx_vga_c()
BX_DEBUG(("Exit"));
}
bx_bool bx_vga_c::init_vga_extension(void)
bool bx_vga_c::init_vga_extension(void)
{
unsigned addr;
bx_bool ret = 0;
bool ret = 0;
BX_VGA_THIS init_iohandlers(read_handler, write_handler);
BX_VGA_THIS pci_enabled = SIM->is_pci_device("pcivga");
@ -239,7 +239,7 @@ void bx_vga_c::write_handler_no_log(void *this_ptr, Bit32u address, Bit32u value
}
#endif
void bx_vga_c::write(Bit32u address, Bit32u value, unsigned io_len, bx_bool no_log)
void bx_vga_c::write(Bit32u address, Bit32u value, unsigned io_len, bool no_log)
{
if (io_len == 2) {
#if BX_USE_VGA_SMF
@ -895,8 +895,8 @@ Bit32u bx_vga_c::vbe_write(Bit32u address, Bit32u value, unsigned io_len)
UNUSED(this_ptr);
#endif
Bit16u max_xres, max_yres, max_bpp;
bx_bool new_vbe_8bit_dac;
bx_bool needs_update = 0;
bool new_vbe_8bit_dac;
bool needs_update = 0;
unsigned i;
// BX_INFO(("VBE_write %x = %x (len %x)", address, value, io_len));
@ -1097,8 +1097,8 @@ Bit32u bx_vga_c::vbe_write(Bit32u address, Bit32u value, unsigned io_len)
BX_VGA_THIS s.plane_shift = 16;
BX_VGA_THIS s.plane_offset = 0;
}
BX_VGA_THIS vbe.enabled = (bx_bool)((value & VBE_DISPI_ENABLED) != 0);
BX_VGA_THIS vbe.get_capabilities = (bx_bool)((value & VBE_DISPI_GETCAPS) != 0);
BX_VGA_THIS vbe.enabled = ((value & VBE_DISPI_ENABLED) != 0);
BX_VGA_THIS vbe.get_capabilities = ((value & VBE_DISPI_GETCAPS) != 0);
if (BX_VGA_THIS vbe.get_capabilities) {
bx_gui->get_capabilities(&max_xres, &max_yres, &max_bpp);
if (max_xres < BX_VGA_THIS vbe.max_xres) {
@ -1111,7 +1111,7 @@ Bit32u bx_vga_c::vbe_write(Bit32u address, Bit32u value, unsigned io_len)
BX_VGA_THIS vbe.max_bpp = max_bpp;
}
}
new_vbe_8bit_dac = (bx_bool)((value & VBE_DISPI_8BIT_DAC) != 0);
new_vbe_8bit_dac = ((value & VBE_DISPI_8BIT_DAC) != 0);
if (new_vbe_8bit_dac != BX_VGA_THIS vbe.dac_8bit) {
if (new_vbe_8bit_dac) {
for (i=0; i<256; i++) {

16
bochs/iodev/display/vga.h
View File

@ -105,7 +105,7 @@ public:
virtual void redraw_area(unsigned x0, unsigned y0,
unsigned width, unsigned height);
virtual bx_bool init_vga_extension(void);
virtual bool init_vga_extension(void);
#if BX_SUPPORT_PCI
virtual void pci_write_handler(Bit8u address, Bit32u value, unsigned io_len);
@ -120,7 +120,7 @@ protected:
#if BX_USE_VGA_SMF
static void write_handler_no_log(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len);
#endif
void write(Bit32u address, Bit32u value, unsigned io_len, bx_bool no_log);
void write(Bit32u address, Bit32u value, unsigned io_len, bool no_log);
virtual void update(void);
@ -133,11 +133,11 @@ protected:
#if BX_USE_VGA_SMF == 0
Bit32u vbe_read(Bit32u address, unsigned io_len);
void vbe_write(Bit32u address, Bit32u value, unsigned io_len, bx_bool no_log);
void vbe_write(Bit32u address, Bit32u value, unsigned io_len, bool no_log);
#endif
private:
bx_bool vbe_present;
bool vbe_present;
struct {
Bit16u cur_dispi;
Bit32u base_address;
@ -148,7 +148,7 @@ private:
Bit16u max_yres;
Bit16u max_bpp;
Bit16u bank;
bx_bool enabled;
bool enabled;
Bit16u curindex;
Bit32u visible_screen_size; /**< in bytes */
Bit16u offset_x; /**< Virtual screen x start (in pixels) */
@ -157,9 +157,9 @@ private:
Bit16u virtual_yres;
Bit32u virtual_start; /**< For dealing with bpp>8, this is where the virtual screen starts. */
Bit8u bpp_multiplier; /**< We have to save this b/c sometimes we need to recalculate stuff with it. */
bx_bool get_capabilities;
bx_bool dac_8bit;
bx_bool ddc_enabled;
bool get_capabilities;
bool dac_8bit;
bool ddc_enabled;
} vbe; // VBE state information
bx_ddc_c ddc;

12
bochs/iodev/display/vgacore.cc
View File

@ -102,7 +102,7 @@ void bx_vgacore_c::init(void)
((BX_VGA_THIS s.max_xres % X_TILESIZE) > 0);
BX_VGA_THIS s.num_y_tiles = BX_VGA_THIS s.max_yres / Y_TILESIZE +
((BX_VGA_THIS s.max_yres % Y_TILESIZE) > 0);
BX_VGA_THIS s.vga_tile_updated = new bx_bool[BX_VGA_THIS s.num_x_tiles * BX_VGA_THIS s.num_y_tiles];
BX_VGA_THIS s.vga_tile_updated = new bool[BX_VGA_THIS s.num_x_tiles * BX_VGA_THIS s.num_y_tiles];
for (y = 0; y < BX_VGA_THIS s.num_y_tiles; y++)
for (x = 0; x < BX_VGA_THIS s.num_x_tiles; x++)
SET_TILE_UPDATED(BX_VGA_THIS, x, y, 0);
@ -760,7 +760,7 @@ void bx_vgacore_c::write_handler(void *this_ptr, Bit32u address, Bit32u value, u
class_ptr->write(address, value, io_len, 0);
}
void bx_vgacore_c::write(Bit32u address, Bit32u value, unsigned io_len, bx_bool no_log)
void bx_vgacore_c::write(Bit32u address, Bit32u value, unsigned io_len, bool no_log)
{
Bit8u charmap1, charmap2, prev_memory_mapping;
bx_bool prev_video_enabled, prev_line_graphics, prev_int_pal_size, prev_graphics_alpha;
@ -1289,7 +1289,7 @@ void bx_vgacore_c::set_override(bool enabled, void *dev)
}
}
Bit8u bx_vgacore_c::get_vga_pixel(Bit16u x, Bit16u y, Bit16u saddr, Bit16u lc, bx_bool bs, Bit8u **plane)
Bit8u bx_vgacore_c::get_vga_pixel(Bit16u x, Bit16u y, Bit16u saddr, Bit16u lc, bool bs, Bit8u **plane)
{
Bit8u attribute, bit_no, palette_reg_val, DAC_regno;
Bit32u byte_offset;
@ -1336,7 +1336,7 @@ Bit8u bx_vgacore_c::get_vga_pixel(Bit16u x, Bit16u y, Bit16u saddr, Bit16u lc, b
return DAC_regno;
}
bx_bool bx_vgacore_c::skip_update(void)
bool bx_vgacore_c::skip_update(void)
{
Bit64u display_usec;
@ -1365,8 +1365,8 @@ void bx_vgacore_c::update(void)
{
unsigned iHeight, iWidth;
static unsigned cs_counter = 1;
static bx_bool cs_visible = 0;
bx_bool cs_toggle = 0;
static bool cs_visible = 0;
bool cs_toggle = 0;
cs_counter--;
/* no screen update necessary */

18
bochs/iodev/display/vgacore.h
View File

@ -100,7 +100,7 @@ public:
virtual void refresh_display(void *this_ptr, bool redraw);
virtual void get_text_snapshot(Bit8u **text_snapshot, unsigned *txHeight,
unsigned *txWidth);
virtual bx_bool init_vga_extension(void) {return 0;}
virtual bool init_vga_extension(void) {return 0;}
virtual void get_crtc_params(bx_crtc_params_t *crtcp);
static void vga_timer_handler(void *);
@ -116,13 +116,13 @@ protected:
static void write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len);
Bit32u read(Bit32u address, unsigned io_len);
void write(Bit32u address, Bit32u value, unsigned io_len, bx_bool no_log);
void write(Bit32u address, Bit32u value, unsigned io_len, bool no_log);
Bit8u get_vga_pixel(Bit16u x, Bit16u y, Bit16u saddr, Bit16u lc, bx_bool bs, Bit8u **plane);
Bit8u get_vga_pixel(Bit16u x, Bit16u y, Bit16u saddr, Bit16u lc, bool bs, Bit8u **plane);
virtual void update(void);
void determine_screen_dimensions(unsigned *piHeight, unsigned *piWidth);
void calculate_retrace_timing(void);
bx_bool skip_update(void);
bool skip_update(void);
struct {
struct {
@ -224,7 +224,7 @@ protected:
unsigned line_compare;
unsigned vertical_display_end;
unsigned blink_counter;
bx_bool *vga_tile_updated;
bool *vga_tile_updated;
Bit8u *memory;
Bit32u memsize;
Bit8u text_snapshot[128 * 1024]; // current text snapshot
@ -257,17 +257,17 @@ protected:
Bit16u num_x_tiles;
Bit16u num_y_tiles;
// vga override mode
bx_bool vga_override;
bool vga_override;
#if BX_SUPPORT_PCI
bx_nonvga_device_c *nvgadev;
#endif
} s; // state information
int timer_id;
bx_bool update_realtime;
bx_bool vsync_realtime;
bool update_realtime;
bool vsync_realtime;
bx_param_string_c *vgaext;
bx_bool pci_enabled;
bool pci_enabled;
};
#endif

10
bochs/iodev/display/voodoo.cc
View File

@ -319,7 +319,7 @@ void bx_voodoo_base_c::init(void)
}
s.num_x_tiles = (s.max_xres + X_TILESIZE - 1) / X_TILESIZE;
s.num_y_tiles = (s.max_yres + Y_TILESIZE - 1) / Y_TILESIZE;
s.vga_tile_updated = new bx_bool[s.num_x_tiles * s.num_y_tiles];
s.vga_tile_updated = new bool[s.num_x_tiles * s.num_y_tiles];
for (unsigned y = 0; y < s.num_y_tiles; y++)
for (unsigned x = 0; x < s.num_x_tiles; x++)
SET_TILE_UPDATED(BX_VOODOO_THIS, x, y, 0);
@ -854,7 +854,7 @@ void bx_voodoo_base_c::vertical_timer(void)
}
}
void bx_voodoo_base_c::set_irq_level(bx_bool level)
void bx_voodoo_base_c::set_irq_level(bool level)
{
DEV_pci_set_irq(s.devfunc, pci_conf[0x3d], level);
}
@ -1021,7 +1021,7 @@ void bx_voodoo_1_2_c::mode_change_timer()
}
}
bx_bool bx_voodoo_1_2_c::update_timing(void)
bool bx_voodoo_1_2_c::update_timing(void)
{
int htotal, vtotal, hsync, vsync;
float hfreq;
@ -1064,7 +1064,7 @@ bx_bool bx_voodoo_1_2_c::update_timing(void)
return 1;
}
Bit32u bx_voodoo_1_2_c::get_retrace(bx_bool hv)
Bit32u bx_voodoo_1_2_c::get_retrace(bool hv)
{
Bit64u time_in_frame = bx_virt_timer.time_usec(0) - s.vdraw.frame_start;
if (time_in_frame >= s.vdraw.vsync_usec) {
@ -1082,7 +1082,7 @@ Bit32u bx_voodoo_1_2_c::get_retrace(bx_bool hv)
}
}
void bx_voodoo_1_2_c::output_enable(bx_bool enabled)
void bx_voodoo_1_2_c::output_enable(bool enabled)
{
if (s.vdraw.output_on != enabled) {
s.vdraw.output_on = enabled;

48
bochs/iodev/display/voodoo.h
View File

@ -37,11 +37,11 @@ typedef struct {
Bit64u vsync_usec;
double htime_to_pixel;
Bit64u frame_start;
bx_bool clock_enabled;
bx_bool output_on;
bx_bool override_on;
bx_bool screen_update_pending;
bx_bool gui_update_pending;
bool clock_enabled;
bool output_on;
bool override_on;
bool screen_update_pending;
bool gui_update_pending;
} vdraw;
int mode_change_timer_id;
int vertical_timer_id;
@ -50,7 +50,7 @@ typedef struct {
Bit16u max_yres;
Bit16u num_x_tiles;
Bit16u num_y_tiles;
bx_bool *vga_tile_updated;
bool *vga_tile_updated;
} bx_voodoo_t;
@ -67,17 +67,17 @@ public:
virtual void redraw_area(unsigned x0, unsigned y0,
unsigned width, unsigned height);
virtual void update(void);
virtual bx_bool update_timing(void) {return 0;}
virtual Bit32u get_retrace(bx_bool hv) {return 0;}
virtual bool update_timing(void) {return 0;}
virtual Bit32u get_retrace(bool hv) {return 0;}
virtual void output_enable(bx_bool enabled) {}
virtual void output_enable(bool enabled) {}
virtual void update_screen_start(void) {}
virtual void reg_write(Bit32u reg, Bit32u value);
virtual void blt_reg_write(Bit8u reg, Bit32u value) {}
virtual void mem_write_linear(Bit32u offset, Bit32u value, unsigned len) {}
virtual void draw_hwcursor(unsigned xc, unsigned yc, bx_svga_tileinfo_t *info) {}
virtual void set_tile_updated(unsigned xti, unsigned yti, bx_bool flag) {}
virtual void set_tile_updated(unsigned xti, unsigned yti, bool flag) {}
static void vertical_timer_handler(void *);
@ -85,7 +85,7 @@ protected:
bx_voodoo_t s;
void voodoo_register_state(bx_list_c *parent);
void set_irq_level(bx_bool level);
void set_irq_level(bool level);
void vertical_timer(void);
};
@ -98,10 +98,10 @@ public:
virtual void register_state(void);
virtual void after_restore_state(void);
virtual bx_bool update_timing(void);
virtual Bit32u get_retrace(bx_bool hv);
virtual bool update_timing(void);
virtual Bit32u get_retrace(bool hv);
virtual void output_enable(bx_bool enabled);
virtual void output_enable(bool enabled);
virtual void update_screen_start(void);
virtual void pci_write_handler(Bit8u address, Bit32u value, unsigned io_len);
@ -123,14 +123,14 @@ public:
virtual void register_state(void);
virtual void after_restore_state(void);
virtual bx_bool update_timing(void);
virtual Bit32u get_retrace(bx_bool hv);
virtual bool update_timing(void);
virtual Bit32u get_retrace(bool hv);
virtual void reg_write(Bit32u reg, Bit32u value);
virtual void blt_reg_write(Bit8u reg, Bit32u value);
virtual void mem_write_linear(Bit32u offset, Bit32u value, unsigned len);
virtual void draw_hwcursor(unsigned xc, unsigned yc, bx_svga_tileinfo_t *info);
virtual void set_tile_updated(unsigned xti, unsigned yti, bx_bool flag);
virtual void set_tile_updated(unsigned xti, unsigned yti, bool flag);
virtual void pci_write_handler(Bit8u address, Bit32u value, unsigned io_len);
@ -159,8 +159,8 @@ private:
void blt_launch_area_write(Bit32u value);
void blt_execute(void);
void blt_complete(void);
bx_bool blt_apply_clipwindow(int *x0, int *y0, int *x1, int *y1, int *w, int *h);
Bit8u colorkey_check(Bit8u *ptr, Bit8u pxsize, bx_bool dst);
bool blt_apply_clipwindow(int *x0, int *y0, int *x1, int *y1, int *w, int *h);
Bit8u colorkey_check(Bit8u *ptr, Bit8u pxsize, bool dst);
void blt_rectangle_fill(void);
void blt_pattern_fill_mono(void);
@ -170,11 +170,11 @@ private:
void blt_screen_to_screen_stretch(void);
void blt_host_to_screen(void);
void blt_host_to_screen_pattern(void);
void blt_line(bx_bool pline);
void blt_polygon_fill(bx_bool force);
void blt_line(bool pline);
void blt_polygon_fill(bool force);
bx_ddc_c ddc;
bx_bool is_agp;
bool is_agp;
};
class bx_voodoo_vga_c : public bx_vgacore_c {
@ -192,12 +192,12 @@ public:
virtual void redraw_area(unsigned x0, unsigned y0,
unsigned width, unsigned height);
virtual bx_bool init_vga_extension(void);
virtual bool init_vga_extension(void);
virtual void get_crtc_params(bx_crtc_params_t *crtcp);
Bit32u get_retrace(void);
void banshee_update_mode(void);
void banshee_set_dac_mode(bx_bool mode);
void banshee_set_dac_mode(bool mode);
void banshee_set_vclk3(Bit32u value);
static Bit32u banshee_vga_read_handler(void *this_ptr, Bit32u address, unsigned io_len);

12
bochs/iodev/display/voodoo_func.h
View File

@ -1345,7 +1345,7 @@ void voodoo2_bitblt_mux(Bit8u rop, Bit8u *dst_ptr, Bit8u *src_ptr, int dpxsize)
#define BLT v->blt
bx_bool clip_check(Bit16u x, Bit16u y)
bool clip_check(Bit16u x, Bit16u y)
{
if (!BLT.clip_en)
return 1;
@ -1357,7 +1357,7 @@ bx_bool clip_check(Bit16u x, Bit16u y)
}
Bit8u chroma_check(Bit8u *ptr, Bit16u min, Bit16u max, bx_bool dst)
Bit8u chroma_check(Bit8u *ptr, Bit16u min, Bit16u max, bool dst)
{
Bit8u pass = 0;
Bit32u color;
@ -1779,7 +1779,7 @@ void dacdata_r(dac_state *d, Bit8u regnum)
d->read_result = result;
}
void register_w(Bit32u offset, Bit32u data, bx_bool log)
void register_w(Bit32u offset, Bit32u data, bool log)
{
Bit32u regnum = (offset) & 0xff;
Bit32u chips = (offset>>8) & 0xf;
@ -3204,7 +3204,7 @@ void cmdfifo_process(cmdfifo_info *f)
#define FBI_TRICK 1
#if FBI_TRICK
bx_bool fifo_add_fbi(Bit32u type_offset, Bit32u data)
bool fifo_add_fbi(Bit32u type_offset, Bit32u data)
{
bx_bool ret = 0;
@ -3219,7 +3219,7 @@ bx_bool fifo_add_fbi(Bit32u type_offset, Bit32u data)
return ret;
}
bx_bool fifo_add_common(Bit32u type_offset, Bit32u data)
bool fifo_add_common(Bit32u type_offset, Bit32u data)
{
bx_bool ret = 0;
@ -3240,7 +3240,7 @@ bx_bool fifo_add_common(Bit32u type_offset, Bit32u data)
return ret;
}
#else
bx_bool fifo_add_common(Bit32u type_offset, Bit32u data)
bool fifo_add_common(Bit32u type_offset, Bit32u data)
{
bx_bool ret = 0;

210
bochs/iodev/network/ne2k.cc
View File

@ -588,9 +588,9 @@ Bit32u bx_ne2k_c::read_cr(void)
Bit32u val =
(((BX_NE2K_THIS s.CR.pgsel & 0x03) << 6) |
((BX_NE2K_THIS s.CR.rdma_cmd & 0x07) << 3) |
(BX_NE2K_THIS s.CR.tx_packet << 2) |
(BX_NE2K_THIS s.CR.start << 1) |
(BX_NE2K_THIS s.CR.stop));
((Bit8u)BX_NE2K_THIS s.CR.tx_packet << 2) |
((Bit8u)BX_NE2K_THIS s.CR.start << 1) |
(Bit8u)BX_NE2K_THIS s.CR.stop);
BX_DEBUG(("read CR returns 0x%02x", val));
return val;
}
@ -798,17 +798,17 @@ bx_ne2k_c::asic_read(Bit32u offset, unsigned int io_len)
if (io_len == 4) {
BX_NE2K_THIS s.remote_dma += io_len;
} else {
BX_NE2K_THIS s.remote_dma += (BX_NE2K_THIS s.DCR.wdsize + 1);
BX_NE2K_THIS s.remote_dma += ((Bit8u)BX_NE2K_THIS s.DCR.wdsize + 1);
}
if (BX_NE2K_THIS s.remote_dma == BX_NE2K_THIS s.page_stop << 8) {
BX_NE2K_THIS s.remote_dma = BX_NE2K_THIS s.page_start << 8;
}
// keep s.remote_bytes from underflowing
if (BX_NE2K_THIS s.remote_bytes > BX_NE2K_THIS s.DCR.wdsize)
if (BX_NE2K_THIS s.remote_bytes > (Bit8u)BX_NE2K_THIS s.DCR.wdsize)
if (io_len == 4) {
BX_NE2K_THIS s.remote_bytes -= io_len;
} else {
BX_NE2K_THIS s.remote_bytes -= (BX_NE2K_THIS s.DCR.wdsize + 1);
BX_NE2K_THIS s.remote_bytes -= ((Bit8u)BX_NE2K_THIS s.DCR.wdsize + 1);
}
else
BX_NE2K_THIS s.remote_bytes = 0;
@ -840,7 +840,7 @@ void bx_ne2k_c::asic_write(Bit32u offset, Bit32u value, unsigned io_len)
switch (offset) {
case 0x0: // Data register - see asic_read for a description
if ((io_len > 1) && (BX_NE2K_THIS s.DCR.wdsize == 0)) {
if ((io_len > 1) && !BX_NE2K_THIS s.DCR.wdsize) {
BX_PANIC(("dma write length %d on byte mode operation", io_len));
break;
}
@ -852,7 +852,7 @@ void bx_ne2k_c::asic_write(Bit32u offset, Bit32u value, unsigned io_len)
if (io_len == 4) {
BX_NE2K_THIS s.remote_dma += io_len;
} else {
BX_NE2K_THIS s.remote_dma += (BX_NE2K_THIS s.DCR.wdsize + 1);
BX_NE2K_THIS s.remote_dma += ((Bit8u)BX_NE2K_THIS s.DCR.wdsize + 1);
}
if (BX_NE2K_THIS s.remote_dma == BX_NE2K_THIS s.page_stop << 8) {
BX_NE2K_THIS s.remote_dma = BX_NE2K_THIS s.page_start << 8;
@ -861,7 +861,7 @@ void bx_ne2k_c::asic_write(Bit32u offset, Bit32u value, unsigned io_len)
if (io_len == 4) {
BX_NE2K_THIS s.remote_bytes -= io_len;
} else {
BX_NE2K_THIS s.remote_bytes -= (BX_NE2K_THIS s.DCR.wdsize + 1);
BX_NE2K_THIS s.remote_bytes -= ((Bit8u)BX_NE2K_THIS s.DCR.wdsize + 1);
}
if (BX_NE2K_THIS s.remote_bytes > BX_NE2K_MEMSIZ)
BX_NE2K_THIS s.remote_bytes = 0;
@ -913,13 +913,13 @@ Bit32u bx_ne2k_c::page0_read(Bit32u offset, unsigned int io_len)
break;
case 0x4: // TSR
value = ((BX_NE2K_THIS s.TSR.ow_coll << 7) |
(BX_NE2K_THIS s.TSR.cd_hbeat << 6) |
(BX_NE2K_THIS s.TSR.fifo_ur << 5) |
(BX_NE2K_THIS s.TSR.no_carrier << 4) |
(BX_NE2K_THIS s.TSR.aborted << 3) |
(BX_NE2K_THIS s.TSR.collided << 2) |
(BX_NE2K_THIS s.TSR.tx_ok));
value = (((Bit8u)BX_NE2K_THIS s.TSR.ow_coll << 7) |
((Bit8u)BX_NE2K_THIS s.TSR.cd_hbeat << 6) |
((Bit8u)BX_NE2K_THIS s.TSR.fifo_ur << 5) |
((Bit8u)BX_NE2K_THIS s.TSR.no_carrier << 4) |
((Bit8u)BX_NE2K_THIS s.TSR.aborted << 3) |
((Bit8u)BX_NE2K_THIS s.TSR.collided << 2) |
(Bit8u)BX_NE2K_THIS s.TSR.tx_ok);
break;
case 0x5: // NCR
@ -933,14 +933,14 @@ Bit32u bx_ne2k_c::page0_read(Bit32u offset, unsigned int io_len)
break;
case 0x7: // ISR
value = ((BX_NE2K_THIS s.ISR.reset << 7) |
(BX_NE2K_THIS s.ISR.rdma_done << 6) |
(BX_NE2K_THIS s.ISR.cnt_oflow << 5) |
(BX_NE2K_THIS s.ISR.overwrite << 4) |
(BX_NE2K_THIS s.ISR.tx_err << 3) |
(BX_NE2K_THIS s.ISR.rx_err << 2) |
(BX_NE2K_THIS s.ISR.pkt_tx << 1) |
(BX_NE2K_THIS s.ISR.pkt_rx));
value = (((Bit8u)BX_NE2K_THIS s.ISR.reset << 7) |
((Bit8u)BX_NE2K_THIS s.ISR.rdma_done << 6) |
((Bit8u)BX_NE2K_THIS s.ISR.cnt_oflow << 5) |
((Bit8u)BX_NE2K_THIS s.ISR.overwrite << 4) |
((Bit8u)BX_NE2K_THIS s.ISR.tx_err << 3) |
((Bit8u)BX_NE2K_THIS s.ISR.rx_err << 2) |
((Bit8u)BX_NE2K_THIS s.ISR.pkt_tx << 1) |
((Bit8u)BX_NE2K_THIS s.ISR.pkt_rx));
break;
case 0x8: // CRDA0
@ -970,14 +970,14 @@ Bit32u bx_ne2k_c::page0_read(Bit32u offset, unsigned int io_len)
break;
case 0xc: // RSR
value = ((BX_NE2K_THIS s.RSR.deferred << 7) |
(BX_NE2K_THIS s.RSR.rx_disabled << 6) |
(BX_NE2K_THIS s.RSR.rx_mbit << 5) |
(BX_NE2K_THIS s.RSR.rx_missed << 4) |
(BX_NE2K_THIS s.RSR.fifo_or << 3) |
(BX_NE2K_THIS s.RSR.bad_falign << 2) |
(BX_NE2K_THIS s.RSR.bad_crc << 1) |
(BX_NE2K_THIS s.RSR.rx_ok));
value = (((Bit8u)BX_NE2K_THIS s.RSR.deferred << 7) |
((Bit8u)BX_NE2K_THIS s.RSR.rx_disabled << 6) |
((Bit8u)BX_NE2K_THIS s.RSR.rx_mbit << 5) |
((Bit8u)BX_NE2K_THIS s.RSR.rx_missed << 4) |
((Bit8u)BX_NE2K_THIS s.RSR.fifo_or << 3) |
((Bit8u)BX_NE2K_THIS s.RSR.bad_falign << 2) |
((Bit8u)BX_NE2K_THIS s.RSR.bad_crc << 1) |
((Bit8u)BX_NE2K_THIS s.RSR.rx_ok));
break;
case 0xd: // CNTR0
@ -1048,28 +1048,28 @@ void bx_ne2k_c::page0_write(Bit32u offset, Bit32u value, unsigned io_len)
case 0x7: // ISR
value &= 0x7f; // clear RST bit - status-only bit
// All other values are cleared iff the ISR bit is 1
BX_NE2K_THIS s.ISR.pkt_rx &= ~((bx_bool)((value & 0x01) == 0x01));
BX_NE2K_THIS s.ISR.pkt_tx &= ~((bx_bool)((value & 0x02) == 0x02));
BX_NE2K_THIS s.ISR.rx_err &= ~((bx_bool)((value & 0x04) == 0x04));
BX_NE2K_THIS s.ISR.tx_err &= ~((bx_bool)((value & 0x08) == 0x08));
BX_NE2K_THIS s.ISR.overwrite &= ~((bx_bool)((value & 0x10) == 0x10));
BX_NE2K_THIS s.ISR.cnt_oflow &= ~((bx_bool)((value & 0x20) == 0x20));
BX_NE2K_THIS s.ISR.rdma_done &= ~((bx_bool)((value & 0x40) == 0x40));
value = ((BX_NE2K_THIS s.ISR.rdma_done << 6) |
(BX_NE2K_THIS s.ISR.cnt_oflow << 5) |
(BX_NE2K_THIS s.ISR.overwrite << 4) |
(BX_NE2K_THIS s.ISR.tx_err << 3) |
(BX_NE2K_THIS s.ISR.rx_err << 2) |
(BX_NE2K_THIS s.ISR.pkt_tx << 1) |
(BX_NE2K_THIS s.ISR.pkt_rx));
value &= ((BX_NE2K_THIS s.IMR.rdma_inte << 6) |
(BX_NE2K_THIS s.IMR.cofl_inte << 5) |
(BX_NE2K_THIS s.IMR.overw_inte << 4) |
(BX_NE2K_THIS s.IMR.txerr_inte << 3) |
(BX_NE2K_THIS s.IMR.rxerr_inte << 2) |
(BX_NE2K_THIS s.IMR.tx_inte << 1) |
(BX_NE2K_THIS s.IMR.rx_inte));
// All other values are cleared if the ISR bit is 1
BX_NE2K_THIS s.ISR.pkt_rx &= !((value & 0x01) > 0);
BX_NE2K_THIS s.ISR.pkt_tx &= !((value & 0x02) > 0);
BX_NE2K_THIS s.ISR.rx_err &= !((value & 0x04) > 0);
BX_NE2K_THIS s.ISR.tx_err &= !((value & 0x08) > 0);
BX_NE2K_THIS s.ISR.overwrite &= !((value & 0x10) > 0);
BX_NE2K_THIS s.ISR.cnt_oflow &= !((value & 0x20) > 0);
BX_NE2K_THIS s.ISR.rdma_done &= !((value & 0x40) > 0);
value = (((Bit8u)BX_NE2K_THIS s.ISR.rdma_done << 6) |
((Bit8u)BX_NE2K_THIS s.ISR.cnt_oflow << 5) |
((Bit8u)BX_NE2K_THIS s.ISR.overwrite << 4) |
((Bit8u)BX_NE2K_THIS s.ISR.tx_err << 3) |
((Bit8u)BX_NE2K_THIS s.ISR.rx_err << 2) |
((Bit8u)BX_NE2K_THIS s.ISR.pkt_tx << 1) |
((Bit8u)BX_NE2K_THIS s.ISR.pkt_rx));
value &= (((Bit8u)BX_NE2K_THIS s.IMR.rdma_inte << 6) |
((Bit8u)BX_NE2K_THIS s.IMR.cofl_inte << 5) |
((Bit8u)BX_NE2K_THIS s.IMR.overw_inte << 4) |
((Bit8u)BX_NE2K_THIS s.IMR.txerr_inte << 3) |
((Bit8u)BX_NE2K_THIS s.IMR.rxerr_inte << 2) |
((Bit8u)BX_NE2K_THIS s.IMR.tx_inte << 1) |
((Bit8u)BX_NE2K_THIS s.IMR.rx_inte));
if (value == 0)
set_irq_level(0);
break;
@ -1106,12 +1106,12 @@ void bx_ne2k_c::page0_write(Bit32u offset, Bit32u value, unsigned io_len)
BX_INFO(("RCR write, reserved bits set"));
// Set all other bit-fields
BX_NE2K_THIS s.RCR.errors_ok = ((value & 0x01) == 0x01);
BX_NE2K_THIS s.RCR.runts_ok = ((value & 0x02) == 0x02);
BX_NE2K_THIS s.RCR.broadcast = ((value & 0x04) == 0x04);
BX_NE2K_THIS s.RCR.multicast = ((value & 0x08) == 0x08);
BX_NE2K_THIS s.RCR.promisc = ((value & 0x10) == 0x10);
BX_NE2K_THIS s.RCR.monitor = ((value & 0x20) == 0x20);
BX_NE2K_THIS s.RCR.errors_ok = (value & 0x01) > 0;
BX_NE2K_THIS s.RCR.runts_ok = (value & 0x02) > 0;
BX_NE2K_THIS s.RCR.broadcast = (value & 0x04) > 0;
BX_NE2K_THIS s.RCR.multicast = (value & 0x08) > 0;
BX_NE2K_THIS s.RCR.promisc = (value & 0x10) > 0;
BX_NE2K_THIS s.RCR.monitor = (value & 0x20) > 0;
// Monitor bit is a little suspicious...
if (value & 0x20)
@ -1140,7 +1140,7 @@ void bx_ne2k_c::page0_write(Bit32u offset, Bit32u value, unsigned io_len)
BX_PANIC(("TCR write, auto transmit disable not supported"));
// Allow collision-offset to be set, although not used
BX_NE2K_THIS s.TCR.coll_prio = ((value & 0x08) == 0x08);
BX_NE2K_THIS s.TCR.coll_prio = ((value & 0x08) > 0);
break;
case 0xe: // DCR
@ -1156,11 +1156,11 @@ void bx_ne2k_c::page0_write(Bit32u offset, Bit32u value, unsigned io_len)
BX_INFO(("DCR write - AR set ???"));
// Set other values.
BX_NE2K_THIS s.DCR.wdsize = ((value & 0x01) == 0x01);
BX_NE2K_THIS s.DCR.endian = ((value & 0x02) == 0x02);
BX_NE2K_THIS s.DCR.longaddr = ((value & 0x04) == 0x04); // illegal ?
BX_NE2K_THIS s.DCR.loop = ((value & 0x08) == 0x08);
BX_NE2K_THIS s.DCR.auto_rx = ((value & 0x10) == 0x10); // also illegal ?
BX_NE2K_THIS s.DCR.wdsize = (value & 0x01) > 0;
BX_NE2K_THIS s.DCR.endian = (value & 0x02) > 0;
BX_NE2K_THIS s.DCR.longaddr = (value & 0x04) > 0; // illegal ?
BX_NE2K_THIS s.DCR.loop = (value & 0x08) > 0;
BX_NE2K_THIS s.DCR.auto_rx = (value & 0x10) > 0; // also illegal ?
BX_NE2K_THIS s.DCR.fifo_size = (value & 0x50) >> 5;
break;
@ -1170,20 +1170,20 @@ void bx_ne2k_c::page0_write(Bit32u offset, Bit32u value, unsigned io_len)
BX_ERROR(("IMR write, reserved bit set"));
// Set other values
BX_NE2K_THIS s.IMR.rx_inte = ((value & 0x01) == 0x01);
BX_NE2K_THIS s.IMR.tx_inte = ((value & 0x02) == 0x02);
BX_NE2K_THIS s.IMR.rxerr_inte = ((value & 0x04) == 0x04);
BX_NE2K_THIS s.IMR.txerr_inte = ((value & 0x08) == 0x08);
BX_NE2K_THIS s.IMR.overw_inte = ((value & 0x10) == 0x10);
BX_NE2K_THIS s.IMR.cofl_inte = ((value & 0x20) == 0x20);
BX_NE2K_THIS s.IMR.rdma_inte = ((value & 0x40) == 0x40);
value2 = ((BX_NE2K_THIS s.ISR.rdma_done << 6) |
(BX_NE2K_THIS s.ISR.cnt_oflow << 5) |
(BX_NE2K_THIS s.ISR.overwrite << 4) |
(BX_NE2K_THIS s.ISR.tx_err << 3) |
(BX_NE2K_THIS s.ISR.rx_err << 2) |
(BX_NE2K_THIS s.ISR.pkt_tx << 1) |
(BX_NE2K_THIS s.ISR.pkt_rx));
BX_NE2K_THIS s.IMR.rx_inte = ((value & 0x01) == 0x01) > 0;
BX_NE2K_THIS s.IMR.tx_inte = ((value & 0x02) == 0x02) > 0;
BX_NE2K_THIS s.IMR.rxerr_inte = ((value & 0x04) == 0x04) > 0;
BX_NE2K_THIS s.IMR.txerr_inte = ((value & 0x08) == 0x08) > 0;
BX_NE2K_THIS s.IMR.overw_inte = ((value & 0x10) == 0x10) > 0;
BX_NE2K_THIS s.IMR.cofl_inte = ((value & 0x20) == 0x20) > 0;
BX_NE2K_THIS s.IMR.rdma_inte = ((value & 0x40) == 0x40) > 0;
value2 = (((Bit8u)BX_NE2K_THIS s.ISR.rdma_done << 6) |
((Bit8u)BX_NE2K_THIS s.ISR.cnt_oflow << 5) |
((Bit8u)BX_NE2K_THIS s.ISR.overwrite << 4) |
((Bit8u)BX_NE2K_THIS s.ISR.tx_err << 3) |
((Bit8u)BX_NE2K_THIS s.ISR.rx_err << 2) |
((Bit8u)BX_NE2K_THIS s.ISR.pkt_tx << 1) |
((Bit8u)BX_NE2K_THIS s.ISR.pkt_rx));
if (((value & value2) & 0x7f) == 0) {
set_irq_level(0);
} else {
@ -1324,35 +1324,35 @@ Bit32u bx_ne2k_c::page2_read(Bit32u offset, unsigned int io_len)
return (0xff);
case 0xc: // RCR
return ((BX_NE2K_THIS s.RCR.monitor << 5) |
(BX_NE2K_THIS s.RCR.promisc << 4) |
(BX_NE2K_THIS s.RCR.multicast << 3) |
(BX_NE2K_THIS s.RCR.broadcast << 2) |
(BX_NE2K_THIS s.RCR.runts_ok << 1) |
(BX_NE2K_THIS s.RCR.errors_ok));
return (((Bit8u)BX_NE2K_THIS s.RCR.monitor << 5) |
((Bit8u)BX_NE2K_THIS s.RCR.promisc << 4) |
((Bit8u)BX_NE2K_THIS s.RCR.multicast << 3) |
((Bit8u)BX_NE2K_THIS s.RCR.broadcast << 2) |
((Bit8u)BX_NE2K_THIS s.RCR.runts_ok << 1) |
(Bit8u)BX_NE2K_THIS s.RCR.errors_ok);
case 0xd: // TCR
return ((BX_NE2K_THIS s.TCR.coll_prio << 4) |
(BX_NE2K_THIS s.TCR.ext_stoptx << 3) |
return (((Bit8u)BX_NE2K_THIS s.TCR.coll_prio << 4) |
((Bit8u)BX_NE2K_THIS s.TCR.ext_stoptx << 3) |
((BX_NE2K_THIS s.TCR.loop_cntl & 0x3) << 1) |
(BX_NE2K_THIS s.TCR.crc_disable));
(Bit8u)BX_NE2K_THIS s.TCR.crc_disable);
case 0xe: // DCR
return (((BX_NE2K_THIS s.DCR.fifo_size & 0x3) << 5) |
(BX_NE2K_THIS s.DCR.auto_rx << 4) |
(BX_NE2K_THIS s.DCR.loop << 3) |
(BX_NE2K_THIS s.DCR.longaddr << 2) |
(BX_NE2K_THIS s.DCR.endian << 1) |
(BX_NE2K_THIS s.DCR.wdsize));
((Bit8u)BX_NE2K_THIS s.DCR.auto_rx << 4) |
((Bit8u)BX_NE2K_THIS s.DCR.loop << 3) |
((Bit8u)BX_NE2K_THIS s.DCR.longaddr << 2) |
((Bit8u)BX_NE2K_THIS s.DCR.endian << 1) |
(Bit8u)BX_NE2K_THIS s.DCR.wdsize);
case 0xf: // IMR
return ((BX_NE2K_THIS s.IMR.rdma_inte << 6) |
(BX_NE2K_THIS s.IMR.cofl_inte << 5) |
(BX_NE2K_THIS s.IMR.overw_inte << 4) |
(BX_NE2K_THIS s.IMR.txerr_inte << 3) |
(BX_NE2K_THIS s.IMR.rxerr_inte << 2) |
(BX_NE2K_THIS s.IMR.tx_inte << 1) |
(BX_NE2K_THIS s.IMR.rx_inte));
return (((Bit8u)BX_NE2K_THIS s.IMR.rdma_inte << 6) |
((Bit8u)BX_NE2K_THIS s.IMR.cofl_inte << 5) |
((Bit8u)BX_NE2K_THIS s.IMR.overw_inte << 4) |
((Bit8u)BX_NE2K_THIS s.IMR.txerr_inte << 3) |
((Bit8u)BX_NE2K_THIS s.IMR.rxerr_inte << 2) |
((Bit8u)BX_NE2K_THIS s.IMR.tx_inte << 1) |
((Bit8u)BX_NE2K_THIS s.IMR.rx_inte));
default:
BX_PANIC(("page 2 register 0x%02x out of range", offset));
@ -1652,7 +1652,7 @@ Bit32u bx_ne2k_c::rx_status()
Bit32u status = BX_NETDEV_10MBIT;
if ((BX_NE2K_THIS s.CR.stop == 0) &&
(BX_NE2K_THIS s.page_start != 0) &&
((BX_NE2K_THIS s.DCR.loop != 0) ||
(BX_NE2K_THIS s.DCR.loop ||
(BX_NE2K_THIS s.TCR.loop_cntl == 0))) {
status |= BX_NETDEV_RXREADY;
}
@ -1693,7 +1693,7 @@ void bx_ne2k_c::rx_frame(const void *buf, unsigned io_len)
if ((BX_NE2K_THIS s.CR.stop != 0) ||
(BX_NE2K_THIS s.page_start == 0) ||
((BX_NE2K_THIS s.DCR.loop == 0) &&
(!BX_NE2K_THIS s.DCR.loop &&
(BX_NE2K_THIS s.TCR.loop_cntl != 0))) {
return;
@ -1790,7 +1790,7 @@ void bx_ne2k_c::rx_frame(const void *buf, unsigned io_len)
}
BX_NE2K_THIS s.RSR.rx_ok = 1;
BX_NE2K_THIS s.RSR.rx_mbit = (bx_bool)((pktbuf[0] & 0x01) > 0);
BX_NE2K_THIS s.RSR.rx_mbit = ((pktbuf[0] & 0x01) > 0);
BX_NE2K_THIS s.ISR.pkt_rx = 1;
@ -1801,7 +1801,7 @@ void bx_ne2k_c::rx_frame(const void *buf, unsigned io_len)
bx_gui->statusbar_setitem(BX_NE2K_THIS s.statusbar_id, 1);
}
void bx_ne2k_c::set_irq_level(bx_bool level)
void bx_ne2k_c::set_irq_level(bool level)
{
if (BX_NE2K_THIS s.pci_enabled) {
#if BX_SUPPORT_PCI

130
bochs/iodev/network/ne2k.h
View File

@ -50,82 +50,82 @@ typedef struct {
//
// Command Register - 00h read/write
struct {
bx_bool stop; // STP - Software Reset command
bx_bool start; // START - start the NIC
bx_bool tx_packet; // TXP - initiate packet transmission
Bit8u rdma_cmd; // RD0,RD1,RD2 - Remote DMA command
Bit8u pgsel; // PS0,PS1 - Page select
bool stop; // STP - Software Reset command
bool start; // START - start the NIC
bool tx_packet; // TXP - initiate packet transmission
Bit8u rdma_cmd; // RD0,RD1,RD2 - Remote DMA command
Bit8u pgsel; // PS0,PS1 - Page select
} CR;
// Interrupt Status Register - 07h read/write
struct {
bx_bool pkt_rx; // PRX - packet received with no errors
bx_bool pkt_tx; // PTX - packet transmitted with no errors
bx_bool rx_err; // RXE - packet received with 1 or more errors
bx_bool tx_err; // TXE - packet tx'd " " " " "
bx_bool overwrite; // OVW - rx buffer resources exhausted
bx_bool cnt_oflow; // CNT - network tally counter MSB's set
bx_bool rdma_done; // RDC - remote DMA complete
bx_bool reset; // RST - reset status
bool pkt_rx; // PRX - packet received with no errors
bool pkt_tx; // PTX - packet transmitted with no errors
bool rx_err; // RXE - packet received with 1 or more errors
bool tx_err; // TXE - packet tx'd " " " " "
bool overwrite; // OVW - rx buffer resources exhausted
bool cnt_oflow; // CNT - network tally counter MSB's set
bool rdma_done; // RDC - remote DMA complete
bool reset; // RST - reset status
} ISR;
// Interrupt Mask Register - 0fh write
struct {
bx_bool rx_inte; // PRXE - packet rx interrupt enable
bx_bool tx_inte; // PTXE - packet tx interrput enable
bx_bool rxerr_inte; // RXEE - rx error interrupt enable
bx_bool txerr_inte; // TXEE - tx error interrupt enable
bx_bool overw_inte; // OVWE - overwrite warn int enable
bx_bool cofl_inte; // CNTE - counter o'flow int enable
bx_bool rdma_inte; // RDCE - remote DMA complete int enable
bx_bool reserved; // D7 - reserved
bool rx_inte; // PRXE - packet rx interrupt enable
bool tx_inte; // PTXE - packet tx interrput enable
bool rxerr_inte; // RXEE - rx error interrupt enable
bool txerr_inte; // TXEE - tx error interrupt enable
bool overw_inte; // OVWE - overwrite warn int enable
bool cofl_inte; // CNTE - counter o'flow int enable
bool rdma_inte; // RDCE - remote DMA complete int enable
bool reserved; // D7 - reserved
} IMR;
// Data Configuration Register - 0eh write
struct {
bx_bool wdsize; // WTS - 8/16-bit select
bx_bool endian; // BOS - byte-order select
bx_bool longaddr; // LAS - long-address select
bx_bool loop; // LS - loopback select
bx_bool auto_rx; // AR - auto-remove rx packets with remote DMA
Bit8u fifo_size; // FT0,FT1 - fifo threshold
bool wdsize; // WTS - 8/16-bit select
bool endian; // BOS - byte-order select
bool longaddr; // LAS - long-address select
bool loop; // LS - loopback select
bool auto_rx; // AR - auto-remove rx packets with remote DMA
Bit8u fifo_size; // FT0,FT1 - fifo threshold
} DCR;
// Transmit Configuration Register - 0dh write
struct {
bx_bool crc_disable; // CRC - inhibit tx CRC
Bit8u loop_cntl; // LB0,LB1 - loopback control
bx_bool ext_stoptx; // ATD - allow tx disable by external mcast
bx_bool coll_prio; // OFST - backoff algorithm select
Bit8u reserved; // D5,D6,D7 - reserved
bool crc_disable; // CRC - inhibit tx CRC
Bit8u loop_cntl; // LB0,LB1 - loopback control
bool ext_stoptx; // ATD - allow tx disable by external mcast
bool coll_prio; // OFST - backoff algorithm select
Bit8u reserved; // D5,D6,D7 - reserved
} TCR;
// Transmit Status Register - 04h read
struct {
bx_bool tx_ok; // PTX - tx complete without error
bx_bool reserved; // D1 - reserved
bx_bool collided; // COL - tx collided >= 1 times
bx_bool aborted; // ABT - aborted due to excessive collisions
bx_bool no_carrier; // CRS - carrier-sense lost
bx_bool fifo_ur; // FU - FIFO underrun
bx_bool cd_hbeat; // CDH - no tx cd-heartbeat from transceiver
bx_bool ow_coll; // OWC - out-of-window collision
bool tx_ok; // PTX - tx complete without error
bool reserved; // D1 - reserved
bool collided; // COL - tx collided >= 1 times
bool aborted; // ABT - aborted due to excessive collisions
bool no_carrier; // CRS - carrier-sense lost
bool fifo_ur; // FU - FIFO underrun
bool cd_hbeat; // CDH - no tx cd-heartbeat from transceiver
bool ow_coll; // OWC - out-of-window collision
} TSR;
// Receive Configuration Register - 0ch write
struct {
bx_bool errors_ok; // SEP - accept pkts with rx errors
bx_bool runts_ok; // AR - accept < 64-byte runts
bx_bool broadcast; // AB - accept eth broadcast address
bx_bool multicast; // AM - check mcast hash array
bx_bool promisc; // PRO - accept all packets
bx_bool monitor; // MON - check pkts, but don't rx
Bit8u reserved; // D6,D7 - reserved
bool errors_ok; // SEP - accept pkts with rx errors
bool runts_ok; // AR - accept < 64-byte runts
bool broadcast; // AB - accept eth broadcast address
bool multicast; // AM - check mcast hash array
bool promisc; // PRO - accept all packets
bool monitor; // MON - check pkts, but don't rx
Bit8u reserved; // D6,D7 - reserved
} RCR;
// Receive Status Register - 0ch read
struct {
bx_bool rx_ok; // PRX - rx complete without error
bx_bool bad_crc; // CRC - Bad CRC detected
bx_bool bad_falign; // FAE - frame alignment error
bx_bool fifo_or; // FO - FIFO overrun
bx_bool rx_missed; // MPA - missed packet error
bx_bool rx_mbit; // PHY - unicast or mcast/bcast address match
bx_bool rx_disabled; // DIS - set when in monitor mode
bx_bool deferred; // DFR - collision active
bool rx_ok; // PRX - rx complete without error
bool bad_crc; // CRC - Bad CRC detected
bool bad_falign; // FAE - frame alignment error
bool fifo_or; // FO - FIFO overrun
bool rx_missed; // MPA - missed packet error
bool rx_mbit; // PHY - unicast or mcast/bcast address match
bool rx_disabled; // DIS - set when in monitor mode
bool deferred; // DFR - collision active
} RSR;
Bit16u local_dma; // 01,02h read ; current local DMA addr
@ -179,19 +179,19 @@ typedef struct {
Bit8u mem[BX_NE2K_MEMSIZ]; // on-chip packet memory
// ne2k internal state
Bit32u base_address;
int base_irq;
int tx_timer_index;
bx_bool tx_timer_active;
int statusbar_id;
Bit32u base_address;
int base_irq;
int tx_timer_index;
bool tx_timer_active;
int statusbar_id;
// pci stuff
bx_bool pci_enabled;
bool pci_enabled;
#if BX_SUPPORT_PCI
Bit8u devfunc;
Bit8u devfunc;
#endif
char devname[16];
char ldevname[20];
char devname[16];
char ldevname[20];
} bx_ne2k_t;
@ -227,7 +227,7 @@ private:
Bit32u read_cr(void);
void write_cr(Bit32u value);
void set_irq_level(bx_bool level);
void set_irq_level(bool level);
Bit32u chipmem_read(Bit32u address, unsigned io_len) BX_CPP_AttrRegparmN(2);
Bit32u asic_read(Bit32u offset, unsigned io_len) BX_CPP_AttrRegparmN(2);

12
bochs/iodev/usb/uhci_core.cc
View File

@ -3,7 +3,7 @@
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2009-2017 Benjamin D Lunt (fys [at] fysnet [dot] net)
// 2009-2020 The Bochs Project
// 2009-2021 The Bochs Project
//
// This library is free software; you can redistribute it and/or
// modify it under the terms of the GNU Lesser General Public
@ -236,7 +236,7 @@ void bx_uhci_core_c::after_restore_state(void)
void bx_uhci_core_c::update_irq()
{
bx_bool level;
bool level;
if (((hub.usb_status.status2 & 1) && (hub.usb_enable.on_complete)) ||
((hub.usb_status.status2 & 2) && (hub.usb_enable.short_packet)) ||
@ -771,7 +771,7 @@ void bx_uhci_core_c::event_handler(int event, USBPacket *packet, int port)
}
}
bx_bool bx_uhci_core_c::DoTransfer(Bit32u address, Bit32u queue_num, struct TD *td) {
bool bx_uhci_core_c::DoTransfer(Bit32u address, Bit32u queue_num, struct TD *td) {
int len = 0, ret = 0;
USBAsync *p;
@ -881,8 +881,8 @@ int bx_uhci_core_c::broadcast_packet(USBPacket *p)
}
// If the request fails, set the stall bit ????
void bx_uhci_core_c::set_status(struct TD *td, bx_bool stalled, bx_bool data_buffer_error, bx_bool babble,
bx_bool nak, bx_bool crc_time_out, bx_bool bitstuff_error, Bit16u act_len)
void bx_uhci_core_c::set_status(struct TD *td, bool stalled, bool data_buffer_error, bool babble,
bool nak, bool crc_time_out, bool bitstuff_error, Bit16u act_len)
{
// clear out the bits we can modify and/or want zero
td->dword1 &= 0xDF00F800;
@ -935,7 +935,7 @@ const char *usb_speed[4] = {
"super"
};
void bx_uhci_core_c::set_connect_status(Bit8u port, int type, bx_bool connected)
void bx_uhci_core_c::set_connect_status(Bit8u port, int type, bool connected)
{
usb_device_c *device = hub.usb_port[port].device;
if (device != NULL) {

10
bochs/iodev/usb/uhci_core.h
View File

@ -3,7 +3,7 @@
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2009-2016 Benjamin D Lunt (fys [at] fysnet [dot] net)
// 2009-2020 The Bochs Project
// 2009-2021 The Bochs Project
//
// This library is free software; you can redistribute it and/or
// modify it under the terms of the GNU Lesser General Public
@ -193,13 +193,13 @@ protected:
void update_irq(void);
int broadcast_packet(USBPacket *p);
void set_connect_status(Bit8u port, int type, bx_bool connected);
void set_connect_status(Bit8u port, int type, bool connected);
static void uhci_timer_handler(void *);
void uhci_timer(void);
bx_bool DoTransfer(Bit32u address, Bit32u queue_num, struct TD *);
void set_status(struct TD *td, bx_bool stalled, bx_bool data_buffer_error, bx_bool babble,
bx_bool nak, bx_bool crc_time_out, bx_bool bitstuff_error, Bit16u act_len);
bool DoTransfer(Bit32u address, Bit32u queue_num, struct TD *);
void set_status(struct TD *td, bool stalled, bool data_buffer_error, bool babble,
bool nak, bool crc_time_out, bool bitstuff_error, Bit16u act_len);
static Bit32u read_handler(void *this_ptr, Bit32u address, unsigned io_len);
static void write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len);

10
bochs/iodev/usb/usb_ehci.cc
View File

@ -536,7 +536,7 @@ void bx_usb_ehci_c::remove_device(Bit8u port)
}
}
void bx_usb_ehci_c::set_connect_status(Bit8u port, int type, bx_bool connected)
void bx_usb_ehci_c::set_connect_status(Bit8u port, int type, bool connected)
{
const bx_bool ccs_org = BX_EHCI_THIS hub.usb_port[port].portsc.ccs;
const bx_bool ped_org = BX_EHCI_THIS hub.usb_port[port].portsc.ped;
@ -886,7 +886,7 @@ bool bx_usb_ehci_c::write_handler(bx_phy_address addr, unsigned len, void *data,
void bx_usb_ehci_c::update_irq(void)
{
bx_bool level = 0;
bool level = 0;
if ((BX_EHCI_THIS hub.op_regs.UsbSts.inti & BX_EHCI_THIS hub.op_regs.UsbIntr) > 0) {
level = 1;
@ -974,12 +974,12 @@ Bit32u bx_usb_ehci_c::get_fetch_addr(int async)
return async ? BX_EHCI_THIS hub.a_fetch_addr : BX_EHCI_THIS hub.p_fetch_addr;
}
bx_bool bx_usb_ehci_c::async_enabled(void)
bool bx_usb_ehci_c::async_enabled(void)
{
return (BX_EHCI_THIS hub.op_regs.UsbCmd.rs && BX_EHCI_THIS hub.op_regs.UsbCmd.ase);
}
bx_bool bx_usb_ehci_c::periodic_enabled(void)
bool bx_usb_ehci_c::periodic_enabled(void)
{
return (BX_EHCI_THIS hub.op_regs.UsbCmd.rs && BX_EHCI_THIS hub.op_regs.UsbCmd.pse);
}
@ -2293,7 +2293,7 @@ const char *bx_usb_ehci_c::usb_param_handler(bx_param_string_c *param, int set,
if (set) {
portnum = atoi((param->get_parent())->get_name()+4) - 1;
bx_bool empty = ((strlen(val) == 0) || (!strcmp(val, "none")));
bool empty = ((strlen(val) == 0) || (!strcmp(val, "none")));
if ((portnum >= 0) && (portnum < USB_EHCI_PORTS)) {
if (empty && (BX_EHCI_THIS hub.usb_port[portnum].device != NULL)) {
BX_EHCI_THIS device_change |= (1 << portnum);

6
bochs/iodev/usb/usb_ehci.h
View File

@ -350,7 +350,7 @@ private:
static void init_device(Bit8u port, bx_list_c *portconf);
static void remove_device(Bit8u port);
static void set_connect_status(Bit8u port, int type, bx_bool connected);
static void set_connect_status(Bit8u port, int type, bool connected);
static void change_port_owner(int port);
// EHCI core methods ported from QEMU 1.2.2
@ -364,8 +364,8 @@ private:
void set_fetch_addr(int async, Bit32u addr);
Bit32u get_fetch_addr(int async);
bx_bool async_enabled(void);
bx_bool periodic_enabled(void);
bool async_enabled(void);
bool periodic_enabled(void);
EHCIPacket *alloc_packet(EHCIQueue *q);
void free_packet(EHCIPacket *p);

12
bochs/iodev/usb/usb_ohci.cc
View File

@ -514,7 +514,7 @@ void bx_usb_ohci_c::remove_device(Bit8u port)
void bx_usb_ohci_c::update_irq()
{
bx_bool level = 0;
bool level = 0;
if ((BX_OHCI_THIS hub.op_regs.HcInterruptEnable & OHCI_INTR_MIE) &&
(BX_OHCI_THIS hub.op_regs.HcInterruptStatus & BX_OHCI_THIS hub.op_regs.HcInterruptEnable)) {
@ -1139,10 +1139,10 @@ void bx_usb_ohci_c::process_lists(void)
}
}
bx_bool bx_usb_ohci_c::process_ed(struct OHCI_ED *ed, const Bit32u ed_address)
bool bx_usb_ohci_c::process_ed(struct OHCI_ED *ed, const Bit32u ed_address)
{
struct OHCI_TD cur_td;
bx_bool ret = 0;
bool ret = 0;
if (!ED_GET_H(ed) && !ED_GET_K(ed) && (ED_GET_HEADP(ed) != ED_GET_TAILP(ed))) {
// if the isochronous is enabled and ed is a isochronous, do TD
@ -1212,7 +1212,7 @@ void bx_usb_ohci_c::event_handler(int event, USBPacket *packet, int port)
}
}
bx_bool bx_usb_ohci_c::process_td(struct OHCI_TD *td, struct OHCI_ED *ed)
bool bx_usb_ohci_c::process_td(struct OHCI_TD *td, struct OHCI_ED *ed)
{
unsigned pid = 0, len = 0, len1, len2;
int ilen, ret = 0, ret2 = 1;
@ -1459,7 +1459,7 @@ void bx_usb_ohci_c::pci_write_handler(Bit8u address, Bit32u value, unsigned io_l
}
}
void bx_usb_ohci_c::usb_set_connect_status(Bit8u port, int type, bx_bool connected)
void bx_usb_ohci_c::usb_set_connect_status(Bit8u port, int type, bool connected)
{
const bx_bool ccs_org = BX_OHCI_THIS hub.usb_port[port].HcRhPortStatus.ccs;
const bx_bool pes_org = BX_OHCI_THIS hub.usb_port[port].HcRhPortStatus.pes;
@ -1516,7 +1516,7 @@ const char *bx_usb_ohci_c::usb_param_handler(bx_param_string_c *param, int set,
{
if (set) {
int portnum = atoi((param->get_parent())->get_name()+4) - 1;
bx_bool empty = ((strlen(val) == 0) || (!strcmp(val, "none")));
bool empty = ((strlen(val) == 0) || (!strcmp(val, "none")));
if ((portnum >= 0) && (portnum < USB_OHCI_PORTS)) {
if (empty && BX_OHCI_THIS hub.usb_port[portnum].HcRhPortStatus.ccs) {
BX_OHCI_THIS hub.device_change |= (1 << portnum);

6
bochs/iodev/usb/usb_ohci.h
View File

@ -278,7 +278,7 @@ private:
static void init_device(Bit8u port, bx_list_c *portconf);
static void remove_device(Bit8u port);
static int broadcast_packet(USBPacket *p);
static void usb_set_connect_status(Bit8u port, int type, bx_bool connected);
static void usb_set_connect_status(Bit8u port, int type, bool connected);
static void usb_frame_handler(void *);
void usb_frame_timer(void);
@ -286,8 +286,8 @@ private:
static Bit32u get_frame_remaining(void);
void process_lists();
bx_bool process_ed(struct OHCI_ED *, const Bit32u);
bx_bool process_td(struct OHCI_TD *, struct OHCI_ED *);
bool process_ed(struct OHCI_ED *, const Bit32u);
bool process_td(struct OHCI_TD *, struct OHCI_ED *);
#if BX_USE_USB_OHCI_SMF
static bool read_handler(bx_phy_address addr, unsigned len, void *data, void *param);

4
bochs/iodev/usb/usb_uhci.cc
View File

@ -264,13 +264,13 @@ void bx_usb_uhci_c::runtime_config(void)
// USB runtime parameter handler
const char *bx_usb_uhci_c::usb_param_handler(bx_param_string_c *param, int set,
const char *oldval, const char *val, int maxlen)
const char *oldval, const char *val, int maxlen)
{
int portnum;
if (set) {
portnum = atoi((param->get_parent())->get_name()+4) - 1;
bx_bool empty = ((strlen(val) == 0) || (!strcmp(val, "none")));
bool empty = ((strlen(val) == 0) || (!strcmp(val, "none")));
if ((portnum >= 0) && (portnum < USB_UHCI_PORTS)) {
if (empty && BX_UHCI_THIS hub.usb_port[portnum].status) {
BX_UHCI_THIS device_change |= (1 << portnum);

16
bochs/iodev/usb/usb_xhci.cc
View File

@ -676,7 +676,7 @@ void bx_usb_xhci_c::reset_port_usb3(int port, const int reset_type)
* Callee checks to be sure the Halted bit is set first.
* We return 0 == no error, 1 = error
*/
bx_bool bx_usb_xhci_c::save_hc_state(void)
bool bx_usb_xhci_c::save_hc_state(void)
{
int i, j;
Bit64u addr;
@ -717,7 +717,7 @@ bx_bool bx_usb_xhci_c::save_hc_state(void)
/*
* See comments at save_hc_state above
*/
bx_bool bx_usb_xhci_c::restore_hc_state(void)
bool bx_usb_xhci_c::restore_hc_state(void)
{
int i, j;
Bit64u addr;
@ -1007,7 +1007,7 @@ void bx_usb_xhci_c::remove_device(Bit8u port)
void bx_usb_xhci_c::update_irq(unsigned interrupter)
{
bx_bool level = 0;
bool level = 0;
if ((BX_XHCI_THIS hub.op_regs.HcCommand.inte) &&
(BX_XHCI_THIS hub.runtime_regs.interrupter[interrupter].iman.ie)) {
@ -2716,7 +2716,7 @@ void bx_usb_xhci_c::init_event_ring(const unsigned interrupter)
}
void bx_usb_xhci_c::write_event_TRB(const unsigned interrupter, const Bit64u parameter, const Bit32u status,
const Bit32u command, const bx_bool fire_int)
const Bit32u command, const bool fire_int)
{
// write the TRB
write_TRB((bx_phy_address) BX_XHCI_THIS hub.ring_members.event_rings[interrupter].cur_trb, parameter, status,
@ -2934,7 +2934,7 @@ void bx_usb_xhci_c::copy_ep_to_buffer(Bit32u *buffer32, const int slot, const in
BX_XHCI_THIS hub.slots[slot].ep_context[ep].ep_context.average_trb_len;
}
bx_bool bx_usb_xhci_c::validate_slot_context(const struct SLOT_CONTEXT *slot_context)
bool bx_usb_xhci_c::validate_slot_context(const struct SLOT_CONTEXT *slot_context)
{
// specs:6.2.2.3: Only checks the Interrupter Target and Max Latency fields for validity
// See also 4.6.7
@ -2950,7 +2950,7 @@ bx_bool bx_usb_xhci_c::validate_slot_context(const struct SLOT_CONTEXT *slot_con
// the specified amount. Win7 uses this to detect the actual EP0's max packet size...
// For example, the descriptor might return 64, but the device really only handles
// 8-byte control transfers.
bx_bool bx_usb_xhci_c::validate_ep_context(const struct EP_CONTEXT *ep_context, int speed, int ep_num)
bool bx_usb_xhci_c::validate_ep_context(const struct EP_CONTEXT *ep_context, int speed, int ep_num)
{
// Only the Max_packet Size is evaluated (for an evaluate ep command) ???
@ -3140,7 +3140,7 @@ void bx_usb_xhci_c::pci_write_handler(Bit8u address, Bit32u value, unsigned io_l
}
}
void bx_usb_xhci_c::usb_set_connect_status(Bit8u port, int type, bx_bool connected)
void bx_usb_xhci_c::usb_set_connect_status(Bit8u port, int type, bool connected)
{
const bx_bool ccs_org = BX_XHCI_THIS hub.usb_port[port].portsc.ccs;
const bx_bool ped_org = BX_XHCI_THIS hub.usb_port[port].portsc.ped;
@ -3219,7 +3219,7 @@ const char *bx_usb_xhci_c::usb_param_handler(bx_param_string_c *param, int set,
if (set) {
portnum = atoi((param->get_parent())->get_name()+4) - 1;
bx_bool empty = ((strlen(val) == 0) || (!strcmp(val, "none")));
bool empty = ((strlen(val) == 0) || (!strcmp(val, "none")));
if ((portnum >= 0) && (portnum < USB_XHCI_PORTS)) {
if (empty && BX_XHCI_THIS hub.usb_port[portnum].portsc.ccs) {
BX_XHCI_THIS device_change |= (1 << portnum);

12
bochs/iodev/usb/usb_xhci.h
View File

@ -559,14 +559,14 @@ private:
static void reset_hc();
static void reset_port(int);
static void reset_port_usb3(int, const int);
static bx_bool save_hc_state(void);
static bx_bool restore_hc_state(void);
static bool save_hc_state(void);
static bool restore_hc_state(void);
static void update_irq(unsigned interrupter);
static void init_device(Bit8u port, bx_list_c *portconf);
static void remove_device(Bit8u port);
static void usb_set_connect_status(Bit8u port, int type, bx_bool connected);
static void usb_set_connect_status(Bit8u port, int type, bool connected);
static int broadcast_packet(USBPacket *p, const int port);
static void xhci_timer_handler(void *);
@ -575,7 +575,7 @@ private:
static void process_transfer_ring(const int slot, const int ep);
static void process_command_ring(void);
static void write_event_TRB(const unsigned interrupter, const Bit64u parameter, const Bit32u status,
const Bit32u command, const bx_bool fire_int);
const Bit32u command, const bool fire_int);
static Bit32u NEC_verification(const Bit64u parameter);
static void init_event_ring(const unsigned interrupter);
static void read_TRB(bx_phy_address addr, struct TRB *trb);
@ -588,8 +588,8 @@ private:
static void copy_ep_from_buffer(struct EP_CONTEXT *ep_context, const Bit8u *buffer);
static void copy_slot_to_buffer(Bit32u *buffer, const int slot);
static void copy_ep_to_buffer(Bit32u *buffer, const int slot, const int ep);
static bx_bool validate_slot_context(const struct SLOT_CONTEXT *slot_context);
static bx_bool validate_ep_context(const struct EP_CONTEXT *ep_context, int speed, int ep_num);
static bool validate_slot_context(const struct SLOT_CONTEXT *slot_context);
static bool validate_ep_context(const struct EP_CONTEXT *ep_context, int speed, int ep_num);
static int create_unique_address(const int slot);
static int send_set_address(const int addr, const int port_num);