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MOVBE instruction exists only in memory form

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This commit is contained in:
Stanislav Shwartsman 2011-08-25 21:20:50 +00:00
parent b3898f4bec
commit d841e82d87
6 changed files with 54 additions and 72 deletions
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54
bochs/cpu/bit.cc
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@ -330,82 +330,64 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BSWAP_RRX(bxInstruction_c *i)
#if BX_CPU_LEVEL >= 6
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVBE_GwEwR(bxInstruction_c *i)
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVBE_GwMw(bxInstruction_c *i)
{
Bit16u val16 = BX_READ_16BIT_REG(i->rm());
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit16u val16 = read_virtual_word(i->seg(), eaddr);
BX_WRITE_16BIT_REG(i->nnn(), bx_bswap16(val16));
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVBE_EwGw(bxInstruction_c *i)
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVBE_MwGw(bxInstruction_c *i)
{
Bit16u val16 = BX_READ_16BIT_REG(i->nnn());
val16 = bx_bswap16(val16);
if (i->modC0()) {
BX_WRITE_16BIT_REG(i->rm(), val16);
}
else {
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
write_virtual_word(i->seg(), eaddr, val16);
}
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
write_virtual_word(i->seg(), eaddr, bx_bswap16(val16));
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVBE_GdEdR(bxInstruction_c *i)
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVBE_GdMd(bxInstruction_c *i)
{
Bit32u val32 = BX_READ_32BIT_REG(i->rm());
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit32u val32 = read_virtual_dword(i->seg(), eaddr);
BX_WRITE_32BIT_REGZ(i->nnn(), bx_bswap32(val32));
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVBE_EdGd(bxInstruction_c *i)
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVBE_MdGd(bxInstruction_c *i)
{
Bit32u val32 = BX_READ_32BIT_REG(i->nnn());
val32 = bx_bswap32(val32);
if (i->modC0()) {
BX_WRITE_32BIT_REGZ(i->rm(), val32);
}
else {
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
write_virtual_dword(i->seg(), eaddr, val32);
}
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
write_virtual_dword(i->seg(), eaddr, bx_bswap32(val32));
BX_NEXT_INSTR(i);
}
#if BX_SUPPORT_X86_64
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVBE_GqEqR(bxInstruction_c *i)
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVBE_GqMq(bxInstruction_c *i)
{
Bit64u val64 = BX_READ_64BIT_REG(i->rm());
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u val64 = read_virtual_qword(i->seg(), eaddr);
BX_WRITE_64BIT_REG(i->nnn(), bx_bswap64(val64));
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVBE_EqGq(bxInstruction_c *i)
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVBE_MqGq(bxInstruction_c *i)
{
Bit64u val64 = BX_READ_64BIT_REG(i->nnn());
val64 = bx_bswap64(val64);
if (i->modC0()) {
BX_WRITE_64BIT_REG(i->rm(), val64);
}
else {
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
write_virtual_qword_64(i->seg(), eaddr, val64);
}
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
write_virtual_qword_64(i->seg(), eaddr, bx_bswap64(val64));
BX_NEXT_INSTR(i);
}

12
bochs/cpu/cpu.h
View File

@ -2330,13 +2330,13 @@ public: // for now...
/* SSE4.2 */
/* MOVBE Intel Atom(R) instruction */
BX_SMF BX_INSF_TYPE MOVBE_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE MOVBE_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE MOVBE_EwGw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE MOVBE_EdGd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE MOVBE_GwMw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE MOVBE_GdMd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE MOVBE_MwGw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE MOVBE_MdGd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
#if BX_SUPPORT_X86_64
BX_SMF BX_INSF_TYPE MOVBE_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE MOVBE_EqGq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE MOVBE_GqMq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE MOVBE_MqGq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
#endif
/* MOVBE Intel Atom(R) instruction */
#endif

12
bochs/cpu/fetchdecode_sse.h
View File

@ -857,10 +857,10 @@ static const BxOpcodeInfo_t BxOpcodeGroupSSE_0f38f0[6] = {
};
static const BxOpcodeInfo_t BxOpcodeGroupOsize0f38f0[BX_SUPPORT_X86_64 + 2] = {
/* 16 */ { BxPrefixSSE, BX_IA_MOVBE_GwEw, BxOpcodeGroupSSE_0f38f0 },
/* 32 */ { BxPrefixSSE, BX_IA_MOVBE_GdEd, BxOpcodeGroupSSE_0f38f0 },
/* 16 */ { BxPrefixSSE, BX_IA_MOVBE_GwMw, BxOpcodeGroupSSE_0f38f0 },
/* 32 */ { BxPrefixSSE, BX_IA_MOVBE_GdMd, BxOpcodeGroupSSE_0f38f0 },
#if BX_SUPPORT_X86_64
/* 64 */ { BxPrefixSSE, BX_IA_MOVBE_GqEq, BxOpcodeGroupSSE_0f38f0 },
/* 64 */ { BxPrefixSSE, BX_IA_MOVBE_GqMq, BxOpcodeGroupSSE_0f38f0 },
#endif
};
@ -885,10 +885,10 @@ static const BxOpcodeInfo_t BxOpcodeGroupSSE_0f38f1q[6] = {
#endif
static const BxOpcodeInfo_t BxOpcodeGroupOsize0f38f1[BX_SUPPORT_X86_64 + 2] = {
/* 16 */ { BxPrefixSSE, BX_IA_MOVBE_EwGw, BxOpcodeGroupSSE_0f38f1w },
/* 32 */ { BxPrefixSSE, BX_IA_MOVBE_EdGd, BxOpcodeGroupSSE_0f38f1d },
/* 16 */ { BxPrefixSSE, BX_IA_MOVBE_MwGw, BxOpcodeGroupSSE_0f38f1w },
/* 32 */ { BxPrefixSSE, BX_IA_MOVBE_MdGd, BxOpcodeGroupSSE_0f38f1d },
#if BX_SUPPORT_X86_64
/* 64 */ { BxPrefixSSE, BX_IA_MOVBE_EqGq, BxOpcodeGroupSSE_0f38f1q },
/* 64 */ { BxPrefixSSE, BX_IA_MOVBE_MqGq, BxOpcodeGroupSSE_0f38f1q },
#endif
};

12
bochs/cpu/ia_opcodes.h
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@ -1102,15 +1102,15 @@ bx_define_opcode(BX_IA_PCMPISTRI_VdqWdqIb, &BX_CPU_C::LOADU_Wdq, &BX_CPU_C::PCMP
// SSE4.2
// MOVBE instruction
bx_define_opcode(BX_IA_MOVBE_GwEw, &BX_CPU_C::LOAD_Ew, &BX_CPU_C::MOVBE_GwEwR, BX_CPU_MOVBE, 0)
bx_define_opcode(BX_IA_MOVBE_GdEd, &BX_CPU_C::LOAD_Ed, &BX_CPU_C::MOVBE_GdEdR, BX_CPU_MOVBE, 0)
bx_define_opcode(BX_IA_MOVBE_GwMw, &BX_CPU_C::MOVBE_GwMw, &BX_CPU_C::BxError, BX_CPU_MOVBE, 0)
bx_define_opcode(BX_IA_MOVBE_GdMd, &BX_CPU_C::MOVBE_GdMd, &BX_CPU_C::BxError, BX_CPU_MOVBE, 0)
#if BX_SUPPORT_X86_64
bx_define_opcode(BX_IA_MOVBE_GqEq, &BX_CPU_C::LOAD_Eq, &BX_CPU_C::MOVBE_GqEqR, BX_CPU_MOVBE, 0)
bx_define_opcode(BX_IA_MOVBE_GqMq, &BX_CPU_C::MOVBE_GqMq, &BX_CPU_C::BxError, BX_CPU_MOVBE, 0)
#endif
bx_define_opcode(BX_IA_MOVBE_EwGw, &BX_CPU_C::MOVBE_EwGw, &BX_CPU_C::MOVBE_EwGw, BX_CPU_MOVBE, 0)
bx_define_opcode(BX_IA_MOVBE_EdGd, &BX_CPU_C::MOVBE_EdGd, &BX_CPU_C::MOVBE_EdGd, BX_CPU_MOVBE, 0)
bx_define_opcode(BX_IA_MOVBE_MwGw, &BX_CPU_C::MOVBE_MwGw, &BX_CPU_C::BxError, BX_CPU_MOVBE, 0)
bx_define_opcode(BX_IA_MOVBE_MdGd, &BX_CPU_C::MOVBE_MdGd, &BX_CPU_C::BxError, BX_CPU_MOVBE, 0)
#if BX_SUPPORT_X86_64
bx_define_opcode(BX_IA_MOVBE_EqGq, &BX_CPU_C::MOVBE_EqGq, &BX_CPU_C::MOVBE_EqGq, BX_CPU_MOVBE, 0)
bx_define_opcode(BX_IA_MOVBE_MqGq, &BX_CPU_C::MOVBE_MqGq, &BX_CPU_C::BxError, BX_CPU_MOVBE, 0)
#endif
// MOVBE instruction

20
bochs/disasm/dis_tables_sse.inc
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@ -986,20 +986,20 @@ static BxDisasmOpcodeTable_t BxDisasmGroupSSE_0f381e[4] = {
/* F2 */ { 0, &Ia_Invalid }
};
static BxDisasmOpcodeTable_t BxDisasmGrpOs64B_movbe_GvEv[3] = {
/* 16 */ { 0, &Ia_movbe_Gw_Ew },
/* 32 */ { 0, &Ia_movbe_Gd_Ed },
/* 64 */ { 0, &Ia_movbe_Gq_Eq }
static BxDisasmOpcodeTable_t BxDisasmGrpOs64B_movbe_GvMv[3] = {
/* 16 */ { 0, &Ia_movbe_Gw_Mw },
/* 32 */ { 0, &Ia_movbe_Gd_Md },
/* 64 */ { 0, &Ia_movbe_Gq_Mq }
};
static BxDisasmOpcodeTable_t BxDisasmGrpOs64B_movbe_EvGv[3] = {
/* 16 */ { 0, &Ia_movbe_Ew_Gw },
/* 32 */ { 0, &Ia_movbe_Ed_Gd },
/* 64 */ { 0, &Ia_movbe_Eq_Gq }
static BxDisasmOpcodeTable_t BxDisasmGrpOs64B_movbe_MvGv[3] = {
/* 16 */ { 0, &Ia_movbe_Mw_Gw },
/* 32 */ { 0, &Ia_movbe_Md_Gd },
/* 64 */ { 0, &Ia_movbe_Mq_Gq }
};
static BxDisasmOpcodeTable_t BxDisasmGroupSSE_0f38f0[4] = {
/* -- */ { GR64BIT(movbe_GvEv) },
/* -- */ { GR64BIT(movbe_GvMv) },
/* 66 */ { 0, &Ia_Invalid },
/* F3 */ { 0, &Ia_Invalid },
/* F2 */ { 0, &Ia_crc32_Gd_Eb } // SSE4.2
@ -1012,7 +1012,7 @@ static BxDisasmOpcodeTable_t BxDisasmGrpOs64B_crc32[3] = {
};
static BxDisasmOpcodeTable_t BxDisasmGroupSSE_0f38f1[4] = {
/* -- */ { GR64BIT(movbe_EvGv) },
/* -- */ { GR64BIT(movbe_MvGv) },
/* 66 */ { 0, &Ia_Invalid },
/* F3 */ { 0, &Ia_Invalid },
/* F2 */ { GR64BIT(crc32) } // SSE4.2

16
bochs/disasm/opcodes.inc
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@ -238,7 +238,7 @@ Ia_cpuid = { "cpuid", "cpuid", XX, XX, XX, XX, IA_486 },
Ia_cqo = { "cqo", "cqto", XX, XX, XX, XX, 0 },
Ia_crc32_Gd_Eb = { "crc32", "crc32", Gd, Eb, XX, XX, IA_SSE4_2 },
Ia_crc32_Gd_Ed = { "crc32", "crc32", Gd, Ed, XX, XX, IA_SSE4_2 },
Ia_crc32_Gd_Eq = { "crc32", "crc32", Gd, Eq, XX, XX, IA_SSE4_2 | 0 },
Ia_crc32_Gd_Eq = { "crc32", "crc32", Gd, Eq, XX, XX, IA_SSE4_2 },
Ia_crc32_Gd_Ew = { "crc32", "crc32", Gd, Ew, XX, XX, IA_SSE4_2 },
Ia_cvtdq2pd_Vpd_Wq = { "cvtdq2pd", "cvtdq2pd", Vpd, Wq, XX, XX, IA_SSE2 },
Ia_cvtdq2ps_Vps_Wdq = { "cvtdq2ps", "cvtdq2ps", Vps, Wdq, XX, XX, IA_SSE2 },
@ -604,12 +604,12 @@ Ia_movb_Eb_Ib = { "mov", "movb", Eb, Ib, XX, XX, 0 },
Ia_movb_Gb_Eb = { "mov", "movb", Gb, Eb, XX, XX, 0 },
Ia_movb_Ob_AL = { "mov", "movb", Ob, AL_Reg, XX, XX, 0 },
Ia_movb_R8_Ib = { "mov", "movb", Reg8, Ib, XX, XX, 0 },
Ia_movbe_Ed_Gd = { "movbe", "movbel", Ed, Gd, XX, XX, IA_MOVBE },
Ia_movbe_Eq_Gq = { "movbe", "movbeq", Eq, Gq, XX, XX, IA_MOVBE | 0 },
Ia_movbe_Ew_Gw = { "movbe", "movbew", Ew, Gw, XX, XX, IA_MOVBE },
Ia_movbe_Gd_Ed = { "movbe", "movbel", Gd, Ed, XX, XX, IA_MOVBE },
Ia_movbe_Gq_Eq = { "movbe", "movbeq", Gq, Eq, XX, XX, IA_MOVBE | 0 },
Ia_movbe_Gw_Ew = { "movbe", "movbew", Gw, Ew, XX, XX, IA_MOVBE },
Ia_movbe_Gd_Md = { "movbe", "movbel", Gd, Md, XX, XX, IA_MOVBE },
Ia_movbe_Gq_Mq = { "movbe", "movbeq", Gq, Mq, XX, XX, IA_MOVBE },
Ia_movbe_Gw_Mw = { "movbe", "movbew", Gw, Mw, XX, XX, IA_MOVBE },
Ia_movbe_Md_Gd = { "movbe", "movbel", Md, Gd, XX, XX, IA_MOVBE },
Ia_movbe_Mq_Gq = { "movbe", "movbeq", Mq, Gq, XX, XX, IA_MOVBE },
Ia_movbe_Mw_Gw = { "movbe", "movbew", Mw, Gw, XX, XX, IA_MOVBE },
Ia_movd_Ed_Pq = { "movd", "movd", Ed, Pq, XX, XX, IA_MMX },
Ia_movd_Ed_Vd = { "movd", "movd", Ed, Vdq, XX, XX, IA_SSE2 },
Ia_movd_Pq_Ed = { "movd", "movd", Pq, Ed, XX, XX, IA_MMX },
@ -911,7 +911,7 @@ Ia_pmuludq_Vdq_Wdq = { "pmuludq", "pmuludq", Vdq, Wdq, XX, XX, IA_SSE2 },
Ia_popal = { "popad", "popal", XX, XX, XX, XX, 0 },
Ia_popaw = { "popa", "popa", XX, XX, XX, XX, 0 },
Ia_popcnt_Gd_Ed = { "popcnt", "popcnt", Gd, Ed, XX, XX, IA_SSE4_2 },
Ia_popcnt_Gq_Eq = { "popcnt", "popcnt", Gq, Eq, XX, XX, IA_SSE4_2 | 0 },
Ia_popcnt_Gq_Eq = { "popcnt", "popcnt", Gq, Eq, XX, XX, IA_SSE4_2 },
Ia_popcnt_Gw_Ew = { "popcnt", "popcnt", Gw, Ew, XX, XX, IA_SSE4_2 },
Ia_popfl = { "popfd", "popfl", XX, XX, XX, XX, 0 },
Ia_popfq = { "popfq", "popfq", XX, XX, XX, XX, 0 },