diff --git a/bochs/bochs.h b/bochs/bochs.h
index 21285982a..cd4bac0a5 100644
--- a/bochs/bochs.h
+++ b/bochs/bochs.h
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: bochs.h,v 1.235 2008-10-20 19:13:08 sshwarts Exp $
+// $Id: bochs.h,v 1.236 2008-12-05 22:34:42 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2002  MandrakeSoft S.A.
@@ -483,13 +483,11 @@ void CDECL bx_signal_handler(int signum);
 int bx_atexit(void);
 BOCHSAPI extern bx_debug_t bx_dbg;
 
-// memory access type (read/write/rw)
+// memory access type (read/write/execute/rw)
 #define BX_READ         0
 #define BX_WRITE        1
-#define BX_RW           2
-
-#define DATA_ACCESS     0
-#define CODE_ACCESS     1
+#define BX_EXECUTE      2
+#define BX_RW           3
 
 #include "memory/memory.h"
 #include "pc_system.h"
diff --git a/bochs/bx_debug/dbg_main.cc b/bochs/bx_debug/dbg_main.cc
index 293ad2b83..dafd42e07 100644
--- a/bochs/bx_debug/dbg_main.cc
+++ b/bochs/bx_debug/dbg_main.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: dbg_main.cc,v 1.163 2008-11-18 21:03:04 sshwarts Exp $
+// $Id: dbg_main.cc,v 1.164 2008-12-05 22:34:42 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -531,7 +531,7 @@ void bx_dbg_halt(unsigned cpu)
 
 void bx_dbg_check_memory_watchpoints(unsigned cpu, bx_phy_address phy, unsigned len, unsigned rw)
 {
-  if (rw == BX_WRITE) {
+  if (rw & 1) {
     // Check for physical write watch points
     for (unsigned i = 0; i < num_write_watchpoints; i++) {
       if (write_watchpoint[i] >= phy && write_watchpoint[i] < (phy + len)) {
@@ -560,9 +560,11 @@ void bx_dbg_lin_memory_access(unsigned cpu, bx_address lin, bx_phy_address phy,
   if (! BX_CPU(cpu)->trace_mem)
     return;
 
+  bx_bool write = rw & 1;
+
   dbg_printf("[CPU%d %s]: LIN 0x" FMT_ADDRX " PHY 0x" FMT_PHY_ADDRX " (len=%d, pl=%d)",
      cpu, 
-     (rw == BX_READ) ? "RD" : (rw == BX_WRITE) ? "WR" : "??",
+     (write) ? "WR" : "RD",
      lin, phy,
      len, pl);
 
@@ -598,9 +600,11 @@ void bx_dbg_phy_memory_access(unsigned cpu, bx_phy_address phy, unsigned len, un
   if (! BX_CPU(cpu)->trace_mem)
     return;
 
+  bx_bool write = rw & 1;
+
   dbg_printf("[CPU%d %s]: PHY 0x" FMT_PHY_ADDRX " (len=%d)",
      cpu, 
-     (rw == BX_READ) ? "RD" : (rw == BX_WRITE) ? "WR" : "??",
+     (write) ? "WR" : "RD",
      phy,
      len);
 
diff --git a/bochs/cpu/cpu.cc b/bochs/cpu/cpu.cc
index e73f1e900..25f8ceeb3 100644
--- a/bochs/cpu/cpu.cc
+++ b/bochs/cpu/cpu.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: cpu.cc,v 1.253 2008-12-01 19:06:14 sshwarts Exp $
+// $Id: cpu.cc,v 1.254 2008-12-05 22:34:42 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -722,7 +722,7 @@ void BX_CPU_C::prefetch(void)
     bx_phy_address pAddr;
 
     if (BX_CPU_THIS_PTR cr0.get_PG()) {
-      pAddr = translate_linear(laddr, CPL, BX_READ, CODE_ACCESS);
+      pAddr = translate_linear(laddr, CPL, BX_READ);
       pAddr = A20ADDR(pAddr);
     } 
     else {
@@ -737,7 +737,7 @@ void BX_CPU_C::prefetch(void)
   }
   else {
     BX_CPU_THIS_PTR eipFetchPtr = BX_MEM(0)->getHostMemAddr(BX_CPU_THIS,
-        BX_CPU_THIS_PTR pAddrA20Page, BX_READ, CODE_ACCESS);
+        BX_CPU_THIS_PTR pAddrA20Page, BX_EXECUTE);
   }
 
   // Sanity checks
diff --git a/bochs/cpu/cpu.h b/bochs/cpu/cpu.h
index b8c35306d..b3627e999 100644
--- a/bochs/cpu/cpu.h
+++ b/bochs/cpu/cpu.h
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: cpu.h,v 1.539 2008-12-01 19:06:14 sshwarts Exp $
+// $Id: cpu.h,v 1.540 2008-12-05 22:34:42 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -3034,17 +3034,17 @@ public: // for now...
        unsigned rw, void *data);
   BX_SMF void access_write_linear(bx_address address, unsigned length, unsigned curr_pl,
        void *data);
-  BX_SMF void page_fault(unsigned fault, bx_address laddr, unsigned user, unsigned rw, unsigned access_type);
+  BX_SMF void page_fault(unsigned fault, bx_address laddr, unsigned user, unsigned rw);
 
   // linear address for translate_linear expected to be canonical !
-  BX_SMF bx_phy_address translate_linear(bx_address laddr, unsigned curr_pl, unsigned rw, unsigned access_type);
+  BX_SMF bx_phy_address translate_linear(bx_address laddr, unsigned curr_pl, unsigned rw);
 #if BX_SUPPORT_PAE
-  BX_SMF bx_phy_address translate_linear_PAE(bx_address laddr, bx_address &lpf_mask, Bit32u &combined_access, unsigned curr_pl, unsigned rw, unsigned access_type);
+  BX_SMF bx_phy_address translate_linear_PAE(bx_address laddr, bx_address &lpf_mask, Bit32u &combined_access, unsigned curr_pl, unsigned rw);
 #endif
 
   BX_SMF BX_CPP_INLINE bx_phy_address dtranslate_linear(bx_address laddr, unsigned curr_pl, unsigned rw)
   {
-    return translate_linear(laddr, curr_pl, rw, DATA_ACCESS);
+    return translate_linear(laddr, curr_pl, rw);
   }
 
 #if BX_SUPPORT_GLOBAL_PAGES
diff --git a/bochs/cpu/io.cc b/bochs/cpu/io.cc
index 60e57305e..e1af76a60 100644
--- a/bochs/cpu/io.cc
+++ b/bochs/cpu/io.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: io.cc,v 1.67 2008-10-21 19:50:05 sshwarts Exp $
+// $Id: io.cc,v 1.68 2008-12-05 22:34:42 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -81,8 +81,7 @@ Bit32u BX_CPU_C::FastRepINSW(bxInstruction_c *i, bx_address dstOff, Bit16u port,
 
   // If we want to write directly into the physical memory array,
   // we need the A20 address.
-  hostAddrDst = BX_MEM(0)->getHostMemAddr(BX_CPU_THIS,
-            paddrDst, BX_WRITE, DATA_ACCESS);
+  hostAddrDst = BX_MEM(0)->getHostMemAddr(BX_CPU_THIS, paddrDst, BX_WRITE);
   // Check that native host access was not vetoed for that page
   if (!hostAddrDst) return 0;
 #if BX_SUPPORT_ICACHE
@@ -171,8 +170,7 @@ Bit32u BX_CPU_C::FastRepOUTSW(bxInstruction_c *i, unsigned srcSeg, bx_address sr
 
   // If we want to write directly into the physical memory array,
   // we need the A20 address.
-  hostAddrSrc = BX_MEM(0)->getHostMemAddr(BX_CPU_THIS,
-          A20ADDR(paddrSrc), BX_READ, DATA_ACCESS);
+  hostAddrSrc = BX_MEM(0)->getHostMemAddr(BX_CPU_THIS, A20ADDR(paddrSrc), BX_READ);
 #endif
 
   // Check that native host access was not vetoed for that page
diff --git a/bochs/cpu/paging.cc b/bochs/cpu/paging.cc
index 4aa658e94..7768c62c6 100644
--- a/bochs/cpu/paging.cc
+++ b/bochs/cpu/paging.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: paging.cc,v 1.159 2008-12-01 19:35:25 sshwarts Exp $
+// $Id: paging.cc,v 1.160 2008-12-05 22:34:42 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -615,13 +615,14 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::INVLPG(bxInstruction_c* i)
 #define ERROR_RESERVED          0x08
 #define ERROR_CODE_ACCESS       0x10
 
-void BX_CPU_C::page_fault(unsigned fault, bx_address laddr, unsigned user, unsigned rw, unsigned access_type)
+void BX_CPU_C::page_fault(unsigned fault, bx_address laddr, unsigned user, unsigned rw)
 {
   unsigned error_code = fault;
+  unsigned isWrite = rw & 1;
 
-  error_code |= (user << 2) | (rw << 1);
+  error_code |= (user << 2) | (isWrite << 1);
 #if BX_SUPPORT_X86_64
-  if (BX_CPU_THIS_PTR efer.get_NXE() && (access_type == CODE_ACCESS))
+  if (BX_CPU_THIS_PTR efer.get_NXE() && (rw == BX_EXECUTE))
     error_code |= ERROR_CODE_ACCESS; // I/D = 1
 #endif
   BX_CPU_THIS_PTR cr2 = laddr;
@@ -659,7 +660,7 @@ void BX_CPU_C::page_fault(unsigned fault, bx_address laddr, unsigned user, unsig
 #if BX_SUPPORT_PAE
 
 // Translate a linear address to a physical address in PAE paging mode
-bx_phy_address BX_CPU_C::translate_linear_PAE(bx_address laddr, bx_address &lpf_mask, Bit32u &combined_access, unsigned curr_pl, unsigned rw, unsigned access_type)
+bx_phy_address BX_CPU_C::translate_linear_PAE(bx_address laddr, bx_address &lpf_mask, Bit32u &combined_access, unsigned curr_pl, unsigned rw)
 {
   bx_phy_address pdpe_addr, ppf;
   Bit64u pdpe, pde, pte;
@@ -667,7 +668,7 @@ bx_phy_address BX_CPU_C::translate_linear_PAE(bx_address laddr, bx_address &lpf_
   Bit64u pml4, pml4_addr = 0;
 #endif
   unsigned priv_index, nx_fault = 0;
-  bx_bool isWrite = (rw >= BX_WRITE); // write or r-m-w
+  bx_bool isWrite = (rw & 1); // write or r-m-w
   unsigned pl = (curr_pl == 3);
 
   combined_access = 0;
@@ -682,7 +683,7 @@ bx_phy_address BX_CPU_C::translate_linear_PAE(bx_address laddr, bx_address &lpf_
 
     if (!(pml4 & 0x1)) {
       BX_DEBUG(("PML4: entry not present"));
-      page_fault(ERROR_NOT_PRESENT, laddr, pl, isWrite, access_type);
+      page_fault(ERROR_NOT_PRESENT, laddr, pl, rw);
     }
 #if BX_PHY_ADDRESS_WIDTH == 32
     if (pml4 & BX_CONST64(0x000fffff00000000)) {
@@ -691,14 +692,14 @@ bx_phy_address BX_CPU_C::translate_linear_PAE(bx_address laddr, bx_address &lpf_
 #endif
     if (pml4 & PAGING_PAE_PML4_RESERVED_BITS) {
       BX_DEBUG(("PML4: reserved bit is set PML4=%08x:%08x", GET32H(pml4), GET32L(pml4)));
-      page_fault(ERROR_RESERVED | ERROR_PROTECTION, laddr, pl, isWrite, access_type);
+      page_fault(ERROR_RESERVED | ERROR_PROTECTION, laddr, pl, rw);
     }
     if (pml4 & PAGE_DIRECTORY_NX_BIT) {
       if (! BX_CPU_THIS_PTR efer.get_NXE()) {
         BX_DEBUG(("PML4: NX bit set when EFER.NXE is disabled"));
-        page_fault(ERROR_RESERVED | ERROR_PROTECTION, laddr, pl, isWrite, access_type);
+        page_fault(ERROR_RESERVED | ERROR_PROTECTION, laddr, pl, rw);
       }
-      if (access_type == CODE_ACCESS) {
+      if (rw == BX_EXECUTE) {
         BX_DEBUG(("PML4: non-executable page fault occured"));
         nx_fault = 1;
       }
@@ -731,7 +732,7 @@ bx_phy_address BX_CPU_C::translate_linear_PAE(bx_address laddr, bx_address &lpf_
 
   if (!(pdpe & 0x1)) {
     BX_DEBUG(("PAE PDPE: entry not present"));
-    page_fault(ERROR_NOT_PRESENT, laddr, pl, isWrite, access_type);
+    page_fault(ERROR_NOT_PRESENT, laddr, pl, rw);
   }
 #if BX_PHY_ADDRESS_WIDTH == 32
   if (pdpe & BX_CONST64(0x000fffff00000000)) {
@@ -740,15 +741,15 @@ bx_phy_address BX_CPU_C::translate_linear_PAE(bx_address laddr, bx_address &lpf_
 #endif
   if (pdpe & PAGING_PAE_PDPE_RESERVED_BITS) {
     BX_DEBUG(("PAE PDPE: reserved bit is set: PDPE=%08x:%08x", GET32H(pdpe), GET32L(pdpe)));
-    page_fault(ERROR_RESERVED | ERROR_PROTECTION, laddr, pl, isWrite, access_type);
+    page_fault(ERROR_RESERVED | ERROR_PROTECTION, laddr, pl, rw);
   }
 #if BX_SUPPORT_X86_64
   if (pdpe & PAGE_DIRECTORY_NX_BIT) {
     if (! BX_CPU_THIS_PTR efer.get_NXE()) {
       BX_DEBUG(("PDPE: NX bit set when EFER.NXE is disabled"));
-      page_fault(ERROR_RESERVED | ERROR_PROTECTION, laddr, pl, isWrite, access_type);
+      page_fault(ERROR_RESERVED | ERROR_PROTECTION, laddr, pl, rw);
     }
-    if (access_type == CODE_ACCESS) {
+    if (rw == BX_EXECUTE) {
       BX_DEBUG(("PDPE: non-executable page fault occured"));
       nx_fault = 1;
     }
@@ -762,7 +763,7 @@ bx_phy_address BX_CPU_C::translate_linear_PAE(bx_address laddr, bx_address &lpf_
 
   if (!(pde & 0x1)) {
     BX_DEBUG(("PAE PDE: entry not present"));
-    page_fault(ERROR_NOT_PRESENT, laddr, pl, isWrite, access_type);
+    page_fault(ERROR_NOT_PRESENT, laddr, pl, rw);
   }
 #if BX_PHY_ADDRESS_WIDTH == 32
   if (pde & BX_CONST64(0x000fffff00000000)) {
@@ -771,15 +772,15 @@ bx_phy_address BX_CPU_C::translate_linear_PAE(bx_address laddr, bx_address &lpf_
 #endif
   if (pde & PAGING_PAE_PDE_RESERVED_BITS) {
     BX_DEBUG(("PAE PDE: reserved bit is set PDE=%08x:%08x", GET32H(pde), GET32L(pde)));
-    page_fault(ERROR_RESERVED | ERROR_PROTECTION, laddr, pl, isWrite, access_type);
+    page_fault(ERROR_RESERVED | ERROR_PROTECTION, laddr, pl, rw);
   }
 #if BX_SUPPORT_X86_64
   if (pde & PAGE_DIRECTORY_NX_BIT) {
     if (! BX_CPU_THIS_PTR efer.get_NXE()) {
       BX_DEBUG(("PDE: NX bit set when EFER.NXE is disabled"));
-      page_fault(ERROR_RESERVED | ERROR_PROTECTION, laddr, pl, isWrite, access_type);
+      page_fault(ERROR_RESERVED | ERROR_PROTECTION, laddr, pl, rw);
     }
-    if (access_type == CODE_ACCESS) {
+    if (rw == BX_EXECUTE) {
       BX_DEBUG(("PDE: non-executable page fault occured"));
       nx_fault = 1;
     }
@@ -790,7 +791,7 @@ bx_phy_address BX_CPU_C::translate_linear_PAE(bx_address laddr, bx_address &lpf_
   if (pde & 0x80) {
     if (pde & PAGING_PAE_PDE4M_RESERVED_BITS) {
       BX_DEBUG(("PAE PDE4M: reserved bit is set PDE=%08x:%08x", GET32H(pde), GET32L(pde)));
-      page_fault(ERROR_RESERVED | ERROR_PROTECTION, laddr, pl, isWrite, access_type);
+      page_fault(ERROR_RESERVED | ERROR_PROTECTION, laddr, pl, rw);
     }
 
     // Combined access is just access from the pde (no pte involved).
@@ -815,7 +816,7 @@ bx_phy_address BX_CPU_C::translate_linear_PAE(bx_address laddr, bx_address &lpf_
       (isWrite);                             // bit 0
 
     if (!priv_check[priv_index] || nx_fault)
-      page_fault(ERROR_PROTECTION, laddr, pl, isWrite, access_type);
+      page_fault(ERROR_PROTECTION, laddr, pl, rw);
 
 #if BX_SUPPORT_X86_64
     if (long_mode()) {
@@ -858,7 +859,7 @@ bx_phy_address BX_CPU_C::translate_linear_PAE(bx_address laddr, bx_address &lpf_
 
   if (!(pte & 0x1)) {
     BX_DEBUG(("PAE PTE: entry not present"));
-    page_fault(ERROR_NOT_PRESENT, laddr, pl, isWrite, access_type);
+    page_fault(ERROR_NOT_PRESENT, laddr, pl, rw);
   }
 #if BX_PHY_ADDRESS_WIDTH == 32
   if (pte & BX_CONST64(0x000fffff00000000)) {
@@ -867,15 +868,15 @@ bx_phy_address BX_CPU_C::translate_linear_PAE(bx_address laddr, bx_address &lpf_
 #endif
   if (pte & PAGING_PAE_PTE_RESERVED_BITS) {
     BX_DEBUG(("PAE PTE: reserved bit is set PTE=%08x:%08x", GET32H(pte), GET32L(pte)));
-    page_fault(ERROR_RESERVED | ERROR_PROTECTION, laddr, pl, isWrite, access_type);
+    page_fault(ERROR_RESERVED | ERROR_PROTECTION, laddr, pl, rw);
   }
 #if BX_SUPPORT_X86_64
   if (pte & PAGE_DIRECTORY_NX_BIT) {
     if (! BX_CPU_THIS_PTR efer.get_NXE()) {
       BX_DEBUG(("PTE: NX bit set when EFER.NXE is disabled"));
-      page_fault(ERROR_RESERVED | ERROR_PROTECTION, laddr, pl, isWrite, access_type);
+      page_fault(ERROR_RESERVED | ERROR_PROTECTION, laddr, pl, rw);
     }
-    if (access_type == CODE_ACCESS) {
+    if (rw == BX_EXECUTE) {
       BX_DEBUG(("PTE: non-executable page fault occured"));
       nx_fault = 1;
     }
@@ -903,7 +904,7 @@ bx_phy_address BX_CPU_C::translate_linear_PAE(bx_address laddr, bx_address &lpf_
    (isWrite);                             // bit 0
 
   if (!priv_check[priv_index] || nx_fault)
-    page_fault(ERROR_PROTECTION, laddr, pl, isWrite, access_type);
+    page_fault(ERROR_PROTECTION, laddr, pl, rw);
 
 #if BX_SUPPORT_X86_64
     if (long_mode()) {
@@ -950,7 +951,7 @@ bx_phy_address BX_CPU_C::translate_linear_PAE(bx_address laddr, bx_address &lpf_
     (BX_PHY_ADDRESS_RESERVED_BITS | BX_CONST64(0x003E0000))
 
 // Translate a linear address to a physical address
-bx_phy_address BX_CPU_C::translate_linear(bx_address laddr, unsigned curr_pl, unsigned rw, unsigned access_type)
+bx_phy_address BX_CPU_C::translate_linear(bx_address laddr, unsigned curr_pl, unsigned rw)
 {
   Bit32u   combined_access = 0;
   bx_address lpf_mask = 0xfff; // 4K pages
@@ -992,7 +993,7 @@ bx_phy_address BX_CPU_C::translate_linear(bx_address laddr, unsigned curr_pl, un
 #if BX_SUPPORT_PAE
   if (BX_CPU_THIS_PTR cr4.get_PAE())
   {
-    ppf = translate_linear_PAE(laddr, lpf_mask, combined_access, curr_pl, rw, access_type);
+    ppf = translate_linear_PAE(laddr, lpf_mask, combined_access, curr_pl, rw);
   }
   else
 #endif  // #if BX_SUPPORT_PAE
@@ -1008,7 +1009,7 @@ bx_phy_address BX_CPU_C::translate_linear(bx_address laddr, unsigned curr_pl, un
 
     if (!(pde & 0x1)) {
       BX_DEBUG(("PDE: entry not present"));
-      page_fault(ERROR_NOT_PRESENT, laddr, pl, isWrite, access_type);
+      page_fault(ERROR_NOT_PRESENT, laddr, pl, rw);
     }
 
 #if BX_SUPPORT_LARGE_PAGES
@@ -1017,7 +1018,7 @@ bx_phy_address BX_CPU_C::translate_linear(bx_address laddr, unsigned curr_pl, un
       // 4M paging
       if (pde & PAGING_PSE_PDE4M_RESERVED_BITS) {
         BX_DEBUG(("PSE PDE4M: reserved bit is set: PDE=0x%08x", pde));
-        page_fault(ERROR_RESERVED | ERROR_PROTECTION, laddr, pl, isWrite, access_type);
+        page_fault(ERROR_RESERVED | ERROR_PROTECTION, laddr, pl, rw);
       }
 
 #if BX_PHY_ADDRESS_WIDTH == 32
@@ -1042,7 +1043,7 @@ bx_phy_address BX_CPU_C::translate_linear(bx_address laddr, unsigned curr_pl, un
         (isWrite);                             // bit 0
 
       if (!priv_check[priv_index])
-        page_fault(ERROR_PROTECTION, laddr, pl, isWrite, access_type);
+        page_fault(ERROR_PROTECTION, laddr, pl, rw);
 
       // Update PDE A/D bits if needed.
       if (((pde & 0x20)==0) || (isWrite && ((pde & 0x40)==0))) {
@@ -1066,7 +1067,7 @@ bx_phy_address BX_CPU_C::translate_linear(bx_address laddr, unsigned curr_pl, un
 
       if (!(pte & 0x1)) {
         BX_DEBUG(("PTE: entry not present"));
-        page_fault(ERROR_NOT_PRESENT, laddr, pl, isWrite, access_type);
+        page_fault(ERROR_NOT_PRESENT, laddr, pl, rw);
       }
 
       // 386 and 486+ have different behaviour for combining
@@ -1092,7 +1093,7 @@ bx_phy_address BX_CPU_C::translate_linear(bx_address laddr, unsigned curr_pl, un
         (isWrite);                             // bit 0
 
       if (!priv_check[priv_index])
-        page_fault(ERROR_PROTECTION, laddr, pl, isWrite, access_type);
+        page_fault(ERROR_PROTECTION, laddr, pl, rw);
 
       // Update PDE A bit if needed.
       if (!(pde & 0x20)) {
@@ -1146,7 +1147,7 @@ bx_phy_address BX_CPU_C::translate_linear(bx_address laddr, unsigned curr_pl, un
   // pointer in the TLB cache. Note if the request is vetoed, NULL
   // will be returned, and it's OK to OR zero in anyways.
   tlbEntry->hostPageAddr = (bx_hostpageaddr_t) BX_MEM(0)->getHostMemAddr(BX_CPU_THIS,
-       A20ADDR(ppf), rw, access_type);
+       A20ADDR(ppf), rw);
 
   if (tlbEntry->hostPageAddr) {
     // All access allowed also via direct pointer
@@ -1335,7 +1336,7 @@ void BX_CPU_C::access_write_linear(bx_address laddr, unsigned len, unsigned curr
 
           // Request a direct write pointer so we can do either R or W.
           bx_hostpageaddr_t hostPageAddr = (bx_hostpageaddr_t)
-            BX_MEM(0)->getHostMemAddr(BX_CPU_THIS, A20ADDR(lpf), BX_WRITE, DATA_ACCESS);
+            BX_MEM(0)->getHostMemAddr(BX_CPU_THIS, A20ADDR(lpf), BX_WRITE);
 
           if (hostPageAddr) {
             tlbEntry->lpf = lpf; // Got direct write pointer OK
@@ -1505,7 +1506,7 @@ void BX_CPU_C::access_read_linear(bx_address laddr, unsigned len, unsigned curr_
 
           // Request a direct write pointer so we can do either R or W.
           bx_hostpageaddr_t hostPageAddr = (bx_hostpageaddr_t)
-              BX_MEM(0)->getHostMemAddr(BX_CPU_THIS, A20ADDR(lpf), BX_READ, DATA_ACCESS);
+              BX_MEM(0)->getHostMemAddr(BX_CPU_THIS, A20ADDR(lpf), BX_READ);
 
           if (hostPageAddr) {
             tlbEntry->lpf = lpf; // Got direct read pointer OK.
diff --git a/bochs/cpu/string.cc b/bochs/cpu/string.cc
index d3a776775..bd7e18c3f 100644
--- a/bochs/cpu/string.cc
+++ b/bochs/cpu/string.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: string.cc,v 1.67 2008-10-21 19:50:05 sshwarts Exp $
+// $Id: string.cc,v 1.68 2008-12-05 22:34:42 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -79,8 +79,7 @@ Bit32u BX_CPU_C::FastRepMOVSB(bxInstruction_c *i, unsigned srcSeg, bx_address sr
 
   // If we want to write directly into the physical memory array,
   // we need the A20 address.
-  hostAddrSrc = BX_MEM(0)->getHostMemAddr(BX_CPU_THIS,
-            A20ADDR(paddrSrc), BX_READ, DATA_ACCESS);
+  hostAddrSrc = BX_MEM(0)->getHostMemAddr(BX_CPU_THIS, A20ADDR(paddrSrc), BX_READ);
 #endif
   if (! hostAddrSrc) return 0;
 
@@ -102,8 +101,7 @@ Bit32u BX_CPU_C::FastRepMOVSB(bxInstruction_c *i, unsigned srcSeg, bx_address sr
 
   // If we want to write directly into the physical memory array,
   // we need the A20 address.
-  hostAddrDst = BX_MEM(0)->getHostMemAddr(BX_CPU_THIS,
-            paddrDst, BX_WRITE, DATA_ACCESS);
+  hostAddrDst = BX_MEM(0)->getHostMemAddr(BX_CPU_THIS, paddrDst, BX_WRITE);
   // Check that native host access was not vetoed for that page
   if (!hostAddrDst) return 0;
 #if BX_SUPPORT_ICACHE
@@ -186,8 +184,7 @@ Bit32u BX_CPU_C::FastRepMOVSW(bxInstruction_c *i, unsigned srcSeg, bx_address sr
 
   // If we want to write directly into the physical memory array,
   // we need the A20 address.
-  hostAddrSrc = BX_MEM(0)->getHostMemAddr(BX_CPU_THIS,
-            A20ADDR(paddrSrc), BX_READ, DATA_ACCESS);
+  hostAddrSrc = BX_MEM(0)->getHostMemAddr(BX_CPU_THIS, A20ADDR(paddrSrc), BX_READ);
 #endif
   if (! hostAddrSrc) return 0;
 
@@ -209,8 +206,7 @@ Bit32u BX_CPU_C::FastRepMOVSW(bxInstruction_c *i, unsigned srcSeg, bx_address sr
 
   // If we want to write directly into the physical memory array,
   // we need the A20 address.
-  hostAddrDst = BX_MEM(0)->getHostMemAddr(BX_CPU_THIS,
-            paddrDst, BX_WRITE, DATA_ACCESS);
+  hostAddrDst = BX_MEM(0)->getHostMemAddr(BX_CPU_THIS, paddrDst, BX_WRITE);
   // Check that native host access was not vetoed for that page
   if (!hostAddrDst) return 0;
 #if BX_SUPPORT_ICACHE
@@ -296,8 +292,7 @@ Bit32u BX_CPU_C::FastRepMOVSD(bxInstruction_c *i, unsigned srcSeg, bx_address sr
 
   // If we want to write directly into the physical memory array,
   // we need the A20 address.
-  hostAddrSrc = BX_MEM(0)->getHostMemAddr(BX_CPU_THIS,
-            A20ADDR(paddrSrc), BX_READ, DATA_ACCESS);
+  hostAddrSrc = BX_MEM(0)->getHostMemAddr(BX_CPU_THIS, A20ADDR(paddrSrc), BX_READ);
 #endif
   if (! hostAddrSrc) return 0;
 
@@ -319,8 +314,7 @@ Bit32u BX_CPU_C::FastRepMOVSD(bxInstruction_c *i, unsigned srcSeg, bx_address sr
 
   // If we want to write directly into the physical memory array,
   // we need the A20 address.
-  hostAddrDst = BX_MEM(0)->getHostMemAddr(BX_CPU_THIS,
-            paddrDst, BX_WRITE, DATA_ACCESS);
+  hostAddrDst = BX_MEM(0)->getHostMemAddr(BX_CPU_THIS, paddrDst, BX_WRITE);
   // Check that native host access was not vetoed for that page
   if (!hostAddrDst) return 0;
 #if BX_SUPPORT_ICACHE
@@ -402,8 +396,7 @@ Bit32u BX_CPU_C::FastRepSTOSB(bxInstruction_c *i, unsigned dstSeg, bx_address ds
 
   // If we want to write directly into the physical memory array,
   // we need the A20 address.
-  hostAddrDst = BX_MEM(0)->getHostMemAddr(BX_CPU_THIS,
-            paddrDst, BX_WRITE, DATA_ACCESS);
+  hostAddrDst = BX_MEM(0)->getHostMemAddr(BX_CPU_THIS, paddrDst, BX_WRITE);
   // Check that native host access was not vetoed for that page
   if (!hostAddrDst) return 0;
 #if BX_SUPPORT_ICACHE
@@ -477,8 +470,7 @@ Bit32u BX_CPU_C::FastRepSTOSW(bxInstruction_c *i, unsigned dstSeg, bx_address ds
 
   // If we want to write directly into the physical memory array,
   // we need the A20 address.
-  hostAddrDst = BX_MEM(0)->getHostMemAddr(BX_CPU_THIS,
-            paddrDst, BX_WRITE, DATA_ACCESS);
+  hostAddrDst = BX_MEM(0)->getHostMemAddr(BX_CPU_THIS, paddrDst, BX_WRITE);
   // Check that native host access was not vetoed for that page
   if (!hostAddrDst) return 0;
 #if BX_SUPPORT_ICACHE
@@ -554,8 +546,7 @@ Bit32u BX_CPU_C::FastRepSTOSD(bxInstruction_c *i, unsigned dstSeg, bx_address ds
 
   // If we want to write directly into the physical memory array,
   // we need the A20 address.
-  hostAddrDst = BX_MEM(0)->getHostMemAddr(BX_CPU_THIS,
-            paddrDst, BX_WRITE, DATA_ACCESS);
+  hostAddrDst = BX_MEM(0)->getHostMemAddr(BX_CPU_THIS, paddrDst, BX_WRITE);
   // Check that native host access was not vetoed for that page
   if (!hostAddrDst) return 0;
 #if BX_SUPPORT_ICACHE
diff --git a/bochs/gdbstub.cc b/bochs/gdbstub.cc
index 7c99b9f49..595ddbcff 100644
--- a/bochs/gdbstub.cc
+++ b/bochs/gdbstub.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: gdbstub.cc,v 1.34 2008-11-09 22:56:54 sshwarts Exp $
+// $Id: gdbstub.cc,v 1.35 2008-12-05 22:34:42 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2002-2006  The Bochs Project Team
@@ -420,10 +420,10 @@ static int access_linear(Bit64u laddress,
   valid = BX_CPU(0)->dbg_xlate_linear2phy(laddress, (bx_phy_address*)&phys);
   if (!valid) return(0);
 
-  if (rw == BX_READ) {
-    valid = BX_MEM(0)->dbg_fetch_mem(BX_CPU(0), phys, len, data);
-  } else {
+  if (rw & 1) {
     valid = BX_MEM(0)->dbg_set_mem(phys, len, data);
+  } else {
+    valid = BX_MEM(0)->dbg_fetch_mem(BX_CPU(0), phys, len, data);
   }
 
   return(valid);
diff --git a/bochs/memory/memory.h b/bochs/memory/memory.h
index 7001773f4..d6e9c4dc8 100644
--- a/bochs/memory/memory.h
+++ b/bochs/memory/memory.h
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: memory.h,v 1.52 2008-07-26 14:44:26 sshwarts Exp $
+// $Id: memory.h,v 1.53 2008-12-05 22:34:42 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -111,7 +111,7 @@ public:
   BX_MEM_SMF bx_bool dbg_set_mem(bx_phy_address addr, unsigned len, Bit8u *buf);
   BX_MEM_SMF bx_bool dbg_crc32(bx_phy_address addr1, bx_phy_address addr2, Bit32u *crc);
 #endif
-  BX_MEM_SMF Bit8u* getHostMemAddr(BX_CPU_C *cpu, bx_phy_address a20Addr, unsigned op, unsigned access_type);
+  BX_MEM_SMF Bit8u* getHostMemAddr(BX_CPU_C *cpu, bx_phy_address a20Addr, unsigned rw);
   BX_MEM_SMF bx_bool registerMemoryHandlers(void *param, memory_handler_t read_handler,
 		  memory_handler_t write_handler, bx_phy_address begin_addr, bx_phy_address end_addr);
   BX_MEM_SMF bx_bool unregisterMemoryHandlers(memory_handler_t read_handler, memory_handler_t write_handler,
diff --git a/bochs/memory/misc_mem.cc b/bochs/memory/misc_mem.cc
index 254fc1ac3..f10ce191a 100644
--- a/bochs/memory/misc_mem.cc
+++ b/bochs/memory/misc_mem.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: misc_mem.cc,v 1.118 2008-10-21 19:50:05 sshwarts Exp $
+// $Id: misc_mem.cc,v 1.119 2008-12-05 22:34:42 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2002  MandrakeSoft S.A.
@@ -76,7 +76,7 @@ void BX_MEM_C::init_memory(Bit32u memsize)
 {
   unsigned idx;
 
-  BX_DEBUG(("Init $Id: misc_mem.cc,v 1.118 2008-10-21 19:50:05 sshwarts Exp $"));
+  BX_DEBUG(("Init $Id: misc_mem.cc,v 1.119 2008-12-05 22:34:42 sshwarts Exp $"));
 
   if (BX_MEM_THIS actual_vector != NULL) {
     BX_INFO (("freeing existing memory vector"));
@@ -494,7 +494,7 @@ bx_bool BX_MEM_C::dbg_crc32(bx_phy_address addr1, bx_phy_address addr2, Bit32u *
 // code will perform an 'op' operation.  This address will be
 // used for direct access to guest memory as an acceleration by
 // a few instructions, like REP {MOV, INS, OUTS, etc}.
-// Values of 'op' are { BX_READ, BX_WRITE, BX_RW }.
+// Values of 'op' are { BX_READ, BX_WRITE, BX_EXECUTE, BX_RW }.
 //
 // The other assumption is that the calling code _only_ accesses memory
 // directly within the page that encompasses the address requested.
@@ -511,7 +511,7 @@ bx_bool BX_MEM_C::dbg_crc32(bx_phy_address addr1, bx_phy_address addr2, Bit32u *
 // 0xf0000 - 0xfffff    Upper BIOS Area (64K)
 //
 
-Bit8u *BX_MEM_C::getHostMemAddr(BX_CPU_C *cpu, bx_phy_address a20Addr, unsigned op, unsigned access_type)
+Bit8u *BX_MEM_C::getHostMemAddr(BX_CPU_C *cpu, bx_phy_address a20Addr, unsigned rw)
 {
   BX_ASSERT(cpu != 0); // getHostMemAddr could be used only inside the CPU
 
@@ -521,8 +521,10 @@ Bit8u *BX_MEM_C::getHostMemAddr(BX_CPU_C *cpu, bx_phy_address a20Addr, unsigned
     return(NULL); // Vetoed!  APIC address space
 #endif
 
+  bx_bool write = rw & 1;
+
   // allow direct access to SMRAM memory space for code and veto data
-  if (access_type == CODE_ACCESS) {
+  if (rw == BX_EXECUTE) {
     // reading from SMRAM memory space
     if ((a20Addr & 0xfffe0000) == 0x000a0000 && (BX_MEM_THIS smram_available))
     {
@@ -534,7 +536,7 @@ Bit8u *BX_MEM_C::getHostMemAddr(BX_CPU_C *cpu, bx_phy_address a20Addr, unsigned
 #if BX_SUPPORT_MONITOR_MWAIT
   if (BX_MEM_THIS is_monitor(a20Addr & ~0xfff, 0x1000)) {
     // Vetoed! Write monitored page !
-    if (op != BX_READ) return(NULL);
+    if (write) return(NULL);
   }
 #endif
 
@@ -547,7 +549,7 @@ Bit8u *BX_MEM_C::getHostMemAddr(BX_CPU_C *cpu, bx_phy_address a20Addr, unsigned
     memory_handler = memory_handler->next;
   }
 
-  if (op == BX_READ) {
+  if (! write) {
     if ((a20Addr & 0xfffe0000) == 0x000a0000)
       return(NULL); // Vetoed!  Mem mapped IO (VGA)
 #if BX_SUPPORT_PCI