Update recent CPU changes
This commit is contained in:
parent
63dc4d4e10
commit
d77c4d27cd
@ -10,6 +10,7 @@ Changes after 2.2.6 release:
|
||||
- Implemented SMI and NMI delivery (APIC) and handling in CPU (Stanislav)
|
||||
- Experimental implementation of System Management Mode (Stanislav)
|
||||
- Added emulation of SSE4 instructions (Stanislav Shwarstman)
|
||||
- Save and restore FPU opcode, FIP and FDP in FXSAVE/FRSTOR instructions
|
||||
- Many fixes in Bochs debugger and disassembler
|
||||
|
||||
- CPU x86-64 fixes
|
||||
@ -17,6 +18,7 @@ Changes after 2.2.6 release:
|
||||
- Fixed bug in CALL/JMP far through 64-bit callgate in x86-64 mode
|
||||
- Correctly decode, disassemble and execute 'XCHG R8, rAX' instruction
|
||||
- Fixed ENTER and LEAVE instructions in x86-64 mode (Stanislav)
|
||||
- Fixed CR4 exception condition (No Name)
|
||||
|
||||
- SMP
|
||||
- Support for Dual Core and Intel(R) HyperThreading Technology. Now you
|
||||
|
Loading…
Reference in New Issue
Block a user