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- updated the patch from tld.

This commit is contained in:
Christophe Bothamy 2002-05-29 21:52:36 +00:00
parent d78e428169
commit d5e43f24b4
1 changed files with 110 additions and 61 deletions
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171
bochs/patches/patch.fetchdecode-cache
View File

@ -17,8 +17,7 @@ http://tld.digitalcurse.com/bochs/cpu.cc which is meant to
replace the
file cpu/cpu.cc in the CVS snapshot 20020527 which you can find at
http://tld.digitalcurse.com/bochs/bochs-20020527.tar.bz2 if
you don't
have CVS access.
you don't have CVS access.
I'd like to hear comments on this.
@ -35,38 +34,80 @@ Instructions:
To patch, go to main bochs directory.
Type "patch -p0 < THIS_PATCH_FILE".
----------------------------------------------------------------------
Index: config.h.in
===================================================================
RCS file: /cvsroot/bochs/bochs/config.h.in,v
retrieving revision 1.48
diff -u -r1.48 config.h.in
--- config.h.in 18 Apr 2002 01:00:53 -0000 1.48
+++ config.h.in 29 May 2002 21:46:52 -0000
@@ -189,6 +189,14 @@
#define BX_SUPPORT_V8086_MODE 1
+
+// Use fetchdecode cache
+// 1 = use the cache
+// 0 = don't use the cache
+
+#define BX_FETCHDECODE_CACHE 01
+
+
// Support shadowing of ROM from C0000 to FFFFF.
// This allows that region to be written to.
#define BX_SHADOW_RAM 0
Index: cpu/cpu.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/cpu.cc,v
retrieving revision 1.28
diff -u -r1.28 cpu.cc
--- cpu/cpu.cc 18 Apr 2002 00:22:19 -0000 1.28
+++ cpu/cpu.cc 29 May 2002 08:56:13 -0000
@@ -37,6 +37,27 @@
+++ cpu/cpu.cc 29 May 2002 21:46:53 -0000
@@ -26,7 +26,6 @@
#define BX_INSTR_SPY 0
-
#define NEED_CPU_REG_SHORTCUTS 1
#include "bochs.h"
#define LOG_THIS BX_CPU_THIS_PTR
@@ -37,6 +36,35 @@
//unsigned counter[2] = { 0, 0 };
+#define TLD_DECODE_CACHE 1
+#if BX_FETCHDECODE_CACHE
+ // The number of entries. MUST be a power of 2
+ #define BX_FDCACHE_SIZE 0x0100
+ #define BX_FDCACHE_MASK (BX_FDCACHE_SIZE-1)
+
+#if TLD_DECODE_CACHE
+ #define TLDs_array_size_1 0x00ff
+ #define TLD_debug 0
+ #define TLD_stats 0x100000
+ // To get information about hit ratio every so operations
+ #define BX_FDCACHE_STATS 0x100000
+
+ struct TLDs_ARRAY {
+ unsigned long eip;
+ BxInstruction_t i;
+ } TLDs_array[TLDs_array_size_1+1];
+ // The following stuff must be added to the processor's data (or else... poor MP!)
+ // note from cb : still to do
+
+ unsigned long TLD_cs;
+ unsigned long TLD_SEL;
+ unsigned long TLD_EIP;
+ Bit32u fdcache_eip[BX_FDCACHE_SIZE]; // will store operation's IP
+
+ #if TLD_stats
+ int TLD_CACHE_HIT = 0;
+ int TLD_CACHE_ACC = TLD_stats;
+ #endif // TLD_stats
+#endif // TLD_DECODE_CACHE
+ // NOTE: This struct should really be aligned!
+ BxInstruction_t fdcache_i[BX_FDCACHE_SIZE]; // stores decoded instruction
+
+ Bit32u fdcache_cs; // the last used CS
+ Bit32u fdcache_32; // was the segment 32bit?
+
+ // End of stuff to insert
+
+ unsigned long bx_fdcache_sel,
+ bx_fdcache_eip;
+
+ #if BX_FDCACHE_STATS
+ int bx_fdcache_hit = 0; // cache hits
+ int bx_fdcache_acc = BX_FDCACHE_STATS; // total accesses (countdown)
+ #endif // BX_FDCACHE_STATS
+#endif // BX_FETCHDECODE_CACHE
#if BX_SIM_ID == 0 // only need to define once
@@ -106,7 +127,7 @@
@@ -106,11 +134,13 @@
BX_CPU_C::cpu_loop(Bit32s max_instr_count)
{
unsigned ret;
@ -75,62 +116,70 @@ diff -u -r1.28 cpu.cc
unsigned maxisize;
Bit8u *fetch_ptr;
Boolean is_32;
@@ -217,15 +238,65 @@
+printf("sizeof(BxInstruction_t) = %i\n", sizeof(BxInstruction_t));
+
#if BX_DEBUGGER
BX_CPU_THIS_PTR break_point = 0;
#ifdef MAGIC_BREAKPOINT
@@ -217,15 +247,67 @@
maxisize = 16;
if (BX_CPU_THIS_PTR bytesleft < 16)
maxisize = BX_CPU_THIS_PTR bytesleft;
- ret = FetchDecode(fetch_ptr, &i, maxisize, is_32);
+
+#if TLD_DECODE_CACHE
+ TLD_EIP = BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.base + EIP;
+ TLD_SEL = TLD_EIP & TLDs_array_size_1;
+#if BX_FETCHDECODE_CACHE
+ bx_fdcache_eip = EIP;
+ bx_fdcache_sel = bx_fdcache_eip & BX_FDCACHE_MASK;
+
+ i = &TLDs_array[TLD_SEL].i;
+/*
+ if (TLD_cs != BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.base) {
+ for (TLD_cs = TLDs_array_size_1; (signed)TLD_cs >= 0; --TLD_cs) {
+ TLDs_array[TLD_cs].eip = 0xFFFFFFFF;
+ i = &fdcache_i[bx_fdcache_sel];
+
+ // NOTE: I'm not sure this is the correct value to check for (I don't know bochs)
+ // Maybe I should also check for other things?
+ if (fdcache_cs != BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.base || fdcache_32 != is_32) {
+ // Clear the EIP values
+ for (int tmp = BX_FDCACHE_SIZE-1; tmp >= 0; --tmp) {
+ fdcache_eip[tmp] = 0xFFFFFFFF; // do NOT fill with 0s!
+ }
+ TLD_cs = BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.base;
+ fdcache_cs = BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.base;
+ fdcache_32 = is_32;
+ }
+*/
+ if (TLDs_array[TLD_SEL].eip == TLD_EIP) {
+ // HIT!
+ #if TLD_stats
+ TLD_CACHE_HIT++;
+
+ if (fdcache_eip[bx_fdcache_sel] == bx_fdcache_eip) {
+ // HIT! :-)
+ #if BX_FDCACHE_STATS
+ ++bx_fdcache_hit;
+ #endif
+
+ #if TLD_debug
+ printf("%8.8x:%8.8x !\n", BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.base, EIP);
+ #endif
+ ret = 1;
+ // (debugging stuff)
+ // printf("%8.8x:%8.8x !\n", BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.base, EIP);
+
+ ret = 1; // success!
+ } else {
+ // MISS :(
+ // MISS :'(
+ ret = FetchDecode(fetch_ptr, i, maxisize, is_32);
+
+ #if TLD_debug
+ printf("%8.8x:%8.8x\n", BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.base, EIP);
+ #endif
+ // (debugging stuff)
+ // printf("%8.8x:%8.8x\n", BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.base, EIP);
+
+ // NOTE: I don't know what ret is for. This way is safer, I guess...
+ if (ret) {
+ TLDs_array[TLD_SEL].eip = TLD_EIP;
+ fdcache_eip[bx_fdcache_sel] = bx_fdcache_eip; // store the computed value
+ } else {
+ TLDs_array[TLD_SEL].eip = 0xFFFFFFFF;
+ fdcache_eip[bx_fdcache_sel] = 0xFFFFFFFF;
+ }
+ }
+
+ #if TLD_stats
+ if (!--TLD_CACHE_ACC) {
+ TLD_CACHE_ACC = TLD_stats;
+ printf("%6.6x\n", TLD_CACHE_HIT);
+ TLD_CACHE_HIT = 0;
+ #if BX_FDCACHE_STATS
+ if (!--bx_fdcache_acc) {
+ bx_fdcache_acc = BX_FDCACHE_STATS;
+ printf("%6.6x\n", bx_fdcache_hit);
+ bx_fdcache_hit = 0;
+ }
+ #endif
+
+
+#else
+ #endif // BX_FDCACHE_STATS
+#else // #if BX_FETCHDECODE_CACHE
+ ret = FetchDecode(fetch_ptr, i, maxisize, is_32);
+#endif // TLD_DECODE_CACHE
+#endif // BX_FETCHDECODE_CACHE
if (ret) {
- if (i.ResolveModrm) {
@ -146,7 +195,7 @@ diff -u -r1.28 cpu.cc
fetch_decode_OK:
#if BX_DEBUGGER
@@ -239,34 +310,34 @@
@@ -239,34 +321,34 @@
}
#endif
@ -192,7 +241,7 @@ diff -u -r1.28 cpu.cc
ECX -= 1;
}
if (ECX == 0) goto repeat_done;
@@ -274,7 +345,7 @@
@@ -274,7 +356,7 @@
}
else { // 16bit addrsize
if (CX != 0) {
@ -201,7 +250,7 @@ diff -u -r1.28 cpu.cc
CX -= 1;
}
if (CX == 0) goto repeat_done;
@@ -302,12 +373,12 @@
@@ -302,12 +384,12 @@
repeat_done:
@ -217,7 +266,7 @@ diff -u -r1.28 cpu.cc
}
BX_CPU_THIS_PTR prev_eip = EIP; // commit new EIP
@@ -410,13 +481,13 @@
@@ -410,13 +492,13 @@
for (; j<16; j++) {
FetchBuffer[j] = *temp_ptr++;
}