diff --git a/bochs/cpu/cpu.cc b/bochs/cpu/cpu.cc
index eea4359cc..1e47d9201 100644
--- a/bochs/cpu/cpu.cc
+++ b/bochs/cpu/cpu.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: cpu.cc,v 1.53 2002-09-28 00:54:04 kevinlawton Exp $
+// $Id: cpu.cc,v 1.54 2002-09-28 09:38:58 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -114,19 +114,11 @@ extern void REGISTER_IADDR(bx_addr addr);
 BX_CPU_C::cpu_loop(Bit32s max_instr_count)
 {
   unsigned ret;
-  bxInstruction_c *i;
   bxInstruction_c iStorage BX_CPP_AlignN(32);
-  i = &iStorage;
+  bxInstruction_c *i = &iStorage;
 
-#if BX_USE_CPU_SMF
-#define DeclareExecute()      void (*execute)(bxInstruction_c *)
-#define DeclareResolveModRM() void (*resolveModRM)(bxInstruction_c *)
-#else
-#define DeclareExecute()      void (BX_CPU_C::*execute)(bxInstruction_c *)
-#define DeclareResolveModRM() void (BX_CPU_C::*resolveModRM)(bxInstruction_c *)
-#endif
-
-  DeclareExecute();
+  BxExecutePtr_t execute;
+  BxExecutePtr_t resolveModRM;
 
 #if BX_DEBUGGER
   BX_CPU_THIS_PTR break_point = 0;
@@ -206,8 +198,7 @@ async_events_processed:
 
     // iCache hit.  Instruction is already decoded and stored in
     // the instruction cache.
-    DeclareResolveModRM();
-    resolveModRM = i->ResolveModrm; // Get as soon as possible for speculation.
+    BxExecutePtr_t resolveModRM = i->ResolveModrm; // Get as soon as possible for speculation.
 
     execute = i->execute; // fetch as soon as possible for speculation.
     if (resolveModRM) {
@@ -254,8 +245,7 @@ async_events_processed:
       ret = fetchDecode(fetchPtr, i, maxFetch);
       }
 
-    DeclareResolveModRM();
-    resolveModRM = i->ResolveModrm; // Get function pointers as early
+    BxExecutePtr_t resolveModRM = i->ResolveModrm; // Get function pointers as early
     if (ret==0) {
 #if BX_SupportICache
       // Invalidate entry, since fetch-decode failed with partial updates
diff --git a/bochs/cpu/cpu.h b/bochs/cpu/cpu.h
index f304119af..df98baee1 100644
--- a/bochs/cpu/cpu.h
+++ b/bochs/cpu/cpu.h
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: cpu.h,v 1.86 2002-09-28 05:38:11 kevinlawton Exp $
+// $Id: cpu.h,v 1.87 2002-09-28 09:38:58 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -2963,7 +2963,7 @@ IMPLEMENT_EFLAG_ACCESSOR   (TF,  8)
 
 #define BxPrefix          0x0010 // bit  4
 #define BxAnother         0x0020 // bit  5
-#define SplitMod11b       0x0040 // bit  6
+#define BxSplitMod11b     0x0040 // bit  6
 #define BxRepeatable      0x0800 // bit 11 (pass through to metaInfo field)
 #define BxRepeatableZF    0x1000 // bit 12 (pass through to metaInfo field)
 #define BxGroupN          0x0100 // bits 8
diff --git a/bochs/cpu/fetchdecode.cc b/bochs/cpu/fetchdecode.cc
index bd036e4f7..6d1897962 100644
--- a/bochs/cpu/fetchdecode.cc
+++ b/bochs/cpu/fetchdecode.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: fetchdecode.cc,v 1.24 2002-09-28 05:38:11 kevinlawton Exp $
+// $Id: fetchdecode.cc,v 1.25 2002-09-28 09:38:58 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -533,7 +533,7 @@ static BxOpcodeInfo_t BxOpcodeInfo[512*2] = {
   /* 88 */  { BxAnother,  &BX_CPU_C::MOV_EbGb },
   /* 89 */  { BxAnother,  &BX_CPU_C::MOV_EwGw },
   /* 8A */  { BxAnother,  &BX_CPU_C::MOV_GbEb },
-  /* 8B */  { BxAnother | SplitMod11b, (BxExecutePtr_t)opcodesMOV_GwEw },
+  /* 8B */  { BxAnother | BxSplitMod11b, NULL, opcodesMOV_GwEw },
   /* 8C */  { BxAnother,  &BX_CPU_C::MOV_EwSw },
   /* 8D */  { BxAnother,  &BX_CPU_C::LEA_GwM },
   /* 8E */  { BxAnother,  &BX_CPU_C::MOV_SwEw },
@@ -1062,7 +1062,7 @@ static BxOpcodeInfo_t BxOpcodeInfo[512*2] = {
   /* 88 */  { BxAnother,  &BX_CPU_C::MOV_EbGb },
   /* 89 */  { BxAnother,  &BX_CPU_C::MOV_EdGd },
   /* 8A */  { BxAnother,  &BX_CPU_C::MOV_GbEb },
-  /* 8B */  { BxAnother | SplitMod11b, (BxExecutePtr_t)opcodesMOV_GdEd },
+  /* 8B */  { BxAnother | BxSplitMod11b, NULL, opcodesMOV_GdEd },
   /* 8C */  { BxAnother,  &BX_CPU_C::MOV_EwSw },
   /* 8D */  { BxAnother,  &BX_CPU_C::LEA_GdM },
   /* 8E */  { BxAnother,  &BX_CPU_C::MOV_SwEw },
@@ -1860,9 +1860,9 @@ modrm_done:
       // For high frequency opcodes, two variants of the instruction are
       // implemented; one for the mod=11b case (Reg-Reg), and one for
       // the other cases (Reg-Mem).
-      if (attr & SplitMod11b) {
+      if (attr & BxSplitMod11b) {
         BxOpcodeInfo_t *OpcodeInfoPtr;
-        OpcodeInfoPtr = (BxOpcodeInfo_t *) instruction->execute;
+        OpcodeInfoPtr = BxOpcodeInfo[b1+offset].AnotherArray;
         instruction->execute = OpcodeInfoPtr[mod==0xc0].ExecutePtr;
         }
       }