- VGA memory is now a part of the common video memory (same as real hardware)
- sequencer map mask bit handling simplified - some save/restore data format changes
This commit is contained in:
Volker Ruppert
parent
e810c83345
commit
d2d7c65e37
@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: svga_cirrus.cc,v 1.33 2006-05-29 22:33:38 sshwarts Exp $
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// $Id: svga_cirrus.cc,v 1.34 2006-08-18 15:43:19 vruppert Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2004 Makoto Suzuki (suzu)
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@ -236,15 +236,9 @@ void libvga_LTX_plugin_fini(void)
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bx_svga_cirrus_c::bx_svga_cirrus_c() : bx_vga_c ()
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{
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put("CLVGA");
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vidmem = NULL;
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}
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bx_svga_cirrus_c::~bx_svga_cirrus_c()
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{
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if (vidmem != NULL) {
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delete [] vidmem;
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}
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}
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bx_svga_cirrus_c::~bx_svga_cirrus_c() {}
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void bx_svga_cirrus_c::init(void)
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{
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@ -321,8 +315,8 @@ void bx_svga_cirrus_c::svga_init_members()
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BX_CIRRUS_THIS hw_cursor.size = 0;
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// memory allocation.
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if (BX_CIRRUS_THIS vidmem == NULL)
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BX_CIRRUS_THIS vidmem = new Bit8u[CIRRUS_VIDEO_MEMORY_BYTES];
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if (BX_CIRRUS_THIS s.memory == NULL)
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BX_CIRRUS_THIS s.memory = new Bit8u[CIRRUS_VIDEO_MEMORY_BYTES];
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// set some registers.
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@ -336,7 +330,7 @@ void bx_svga_cirrus_c::svga_init_members()
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BX_CIRRUS_THIS sequencer.reg[0x0F] = 0x98;
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BX_CIRRUS_THIS sequencer.reg[0x17] = CIRRUS_BUSTYPE_PCI;
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BX_CIRRUS_THIS sequencer.reg[0x15] = 0x04; // memory size 4MB
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BX_CIRRUS_THIS memsize = (4 << 20);
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BX_CIRRUS_THIS s.memsize = (4 << 20);
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} else
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#endif
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{
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@ -345,14 +339,14 @@ void bx_svga_cirrus_c::svga_init_members()
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BX_CIRRUS_THIS sequencer.reg[0x0F] = CIRRUS_MEMSIZE_2M;
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BX_CIRRUS_THIS sequencer.reg[0x17] = CIRRUS_BUSTYPE_ISA;
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BX_CIRRUS_THIS sequencer.reg[0x15] = 0x03; // memory size 2MB
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BX_CIRRUS_THIS memsize = (2 << 20);
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BX_CIRRUS_THIS s.memsize = (2 << 20);
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}
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BX_CIRRUS_THIS hidden_dac.lockindex = 5;
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BX_CIRRUS_THIS hidden_dac.data = 0;
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memset(BX_CIRRUS_THIS vidmem, 0xff, CIRRUS_VIDEO_MEMORY_BYTES);
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BX_CIRRUS_THIS disp_ptr = BX_CIRRUS_THIS vidmem;
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memset(BX_CIRRUS_THIS s.memory, 0xff, CIRRUS_VIDEO_MEMORY_BYTES);
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BX_CIRRUS_THIS disp_ptr = BX_CIRRUS_THIS s.memory;
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}
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void bx_svga_cirrus_c::reset(unsigned type)
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@ -373,7 +367,7 @@ void bx_svga_cirrus_c::register_state(void)
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char name[6];
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bx_list_c *reg;
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if (BX_CIRRUS_THIS vidmem != NULL) {
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if (!strcmp(SIM->get_param_string(BXPN_VGA_EXTENSION)->getptr(), "cirrus")) {
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bx_list_c *list = new bx_list_c(SIM->get_sr_root(), "svga_cirrus", "Cirrus SVGA State", 18);
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bx_list_c *crtc = new bx_list_c(list, "crtc");
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new bx_shadow_num_c(crtc, "index", &BX_CIRRUS_THIS crtc.index, BASE_HEX);
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@ -420,7 +414,6 @@ void bx_svga_cirrus_c::register_state(void)
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new bx_shadow_num_c(cursor, "x", &BX_CIRRUS_THIS hw_cursor.x, BASE_HEX);
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new bx_shadow_num_c(cursor, "y", &BX_CIRRUS_THIS hw_cursor.y, BASE_HEX);
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new bx_shadow_num_c(cursor, "size", &BX_CIRRUS_THIS hw_cursor.size, BASE_HEX);
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new bx_shadow_data_c(list, "vidmem", BX_CIRRUS_THIS vidmem, BX_CIRRUS_THIS memsize);
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#if BX_SUPPORT_PCI && BX_SUPPORT_CLGD54XX_PCI
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if (BX_CIRRUS_THIS pci_enabled) {
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bx_list_c *pci_conf = new bx_list_c(list, "pci_conf", 256);
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@ -512,7 +505,7 @@ void bx_svga_cirrus_c::mem_write_mode4and5_8bpp(Bit8u mode, Bit32u offset, Bit8u
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Bit8u val = value;
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Bit8u *dst;
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dst = BX_CIRRUS_THIS vidmem + offset;
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dst = BX_CIRRUS_THIS s.memory + offset;
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for (int x = 0; x < 8; x++) {
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if (val & 0x80) {
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*dst = BX_CIRRUS_THIS control.shadow_reg1;
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@ -529,7 +522,7 @@ void bx_svga_cirrus_c::mem_write_mode4and5_16bpp(Bit8u mode, Bit32u offset, Bit8
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Bit8u val = value;
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Bit8u *dst;
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dst = BX_CIRRUS_THIS vidmem + offset;
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dst = BX_CIRRUS_THIS s.memory + offset;
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for (int x = 0; x < 8; x++) {
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if (val & 0x80) {
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*dst = BX_CIRRUS_THIS control.shadow_reg1;
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@ -594,7 +587,7 @@ Bit8u bx_svga_cirrus_c::mem_read(Bit32u addr)
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}
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}
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ptr = BX_CIRRUS_THIS vidmem;
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ptr = BX_CIRRUS_THIS s.memory;
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offset = addr - BX_CIRRUS_THIS pci_memaddr;
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if ((BX_CIRRUS_THIS control.reg[0x0b] & 0x14) == 0x14) {
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offset <<= 4;
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@ -650,8 +643,8 @@ Bit8u bx_svga_cirrus_c::mem_read(Bit32u addr)
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} else if (BX_CIRRUS_THIS control.reg[0x0b] & 0x02) {
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offset <<= 3;
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}
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offset &= (BX_CIRRUS_THIS memsize - 1);
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return *(BX_CIRRUS_THIS vidmem + offset);
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offset &= (BX_CIRRUS_THIS s.memsize - 1);
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return *(BX_CIRRUS_THIS s.memory + offset);
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}
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else {
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return 0xff;
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@ -728,7 +721,7 @@ void bx_svga_cirrus_c::mem_write(Bit32u addr, Bit8u value)
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}
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mode = BX_CIRRUS_THIS control.reg[0x05] & 0x07;
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if ((mode < 4) || (mode > 5) || ((BX_CIRRUS_THIS control.reg[0x0b] & 0x4) == 0)) {
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*(BX_CIRRUS_THIS vidmem + offset) = value;
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*(BX_CIRRUS_THIS s.memory + offset) = value;
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} else {
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if ((BX_CIRRUS_THIS control.reg[0x0b] & 0x14) != 0x14) {
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mem_write_mode4and5_8bpp(mode, offset, value);
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@ -785,10 +778,10 @@ void bx_svga_cirrus_c::mem_write(Bit32u addr, Bit8u value)
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} else if (BX_CIRRUS_THIS control.reg[0x0b] & 0x02) {
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offset <<= 3;
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}
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offset &= (BX_CIRRUS_THIS memsize - 1);
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offset &= (BX_CIRRUS_THIS s.memsize - 1);
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mode = BX_CIRRUS_THIS control.reg[0x05] & 0x07;
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if ((mode < 4) || (mode > 5) || ((BX_CIRRUS_THIS control.reg[0x0b] & 0x4) == 0)) {
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*(BX_CIRRUS_THIS vidmem + offset) = value;
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*(BX_CIRRUS_THIS s.memory + offset) = value;
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} else {
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if ((BX_CIRRUS_THIS control.reg[0x0b] & 0x14) != 0x14) {
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mem_write_mode4and5_8bpp(mode, offset, value);
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@ -1088,7 +1081,7 @@ void bx_svga_cirrus_c::svga_modeupdate(void)
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BX_CIRRUS_THIS svga_yres = iHeight;
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BX_CIRRUS_THIS svga_bpp = iBpp;
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BX_CIRRUS_THIS svga_dispbpp = iDispBpp;
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BX_CIRRUS_THIS disp_ptr = BX_CIRRUS_THIS vidmem + iTopOffset;
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BX_CIRRUS_THIS disp_ptr = BX_CIRRUS_THIS s.memory + iTopOffset;
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}
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void bx_svga_cirrus_c::draw_hardware_cursor(unsigned xc, unsigned yc, bx_svga_tileinfo_t *info)
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@ -1115,7 +1108,7 @@ void bx_svga_cirrus_c::draw_hardware_cursor(unsigned xc, unsigned yc, bx_svga_ti
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if (info->bpp == 15) info->bpp = 16;
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tile_ptr = bx_gui->graphics_tile_get(xc, yc, &w, &h) +
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info->pitch * (cy0 - yc) + (info->bpp / 8) * (cx0 - xc);
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plane0_ptr = BX_CIRRUS_THIS vidmem + BX_CIRRUS_THIS memsize - 16384;
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plane0_ptr = BX_CIRRUS_THIS s.memory + BX_CIRRUS_THIS s.memsize - 16384;
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switch (BX_CIRRUS_THIS hw_cursor.size) {
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case 32:
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@ -1531,11 +1524,11 @@ void bx_svga_cirrus_c::update_bank_ptr(Bit8u bank_index)
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else
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offset <<= 12;
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if (BX_CIRRUS_THIS memsize <= offset) {
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if (BX_CIRRUS_THIS s.memsize <= offset) {
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limit = 0;
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BX_ERROR(("bank offset %08x is invalid",offset));
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} else {
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limit = BX_CIRRUS_THIS memsize - offset;
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limit = BX_CIRRUS_THIS s.memsize - offset;
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}
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if (!BX_CIRRUS_THIS banking_is_dual() && (bank_index != 0)) {
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@ -2504,14 +2497,14 @@ void bx_svga_cirrus_c::svga_bitblt()
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ReadHostWordFromLittleEndian(&BX_CIRRUS_THIS control.reg[0x26],tmp16);
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BX_CIRRUS_THIS bitblt.srcpitch = (int)tmp16 & (int)0x1fff;
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ReadHostDWordFromLittleEndian(&BX_CIRRUS_THIS control.reg[0x28],tmp32);
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dstaddr = tmp32 & (BX_CIRRUS_THIS memsize - 1);
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dstaddr = tmp32 & (BX_CIRRUS_THIS s.memsize - 1);
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ReadHostDWordFromLittleEndian(&BX_CIRRUS_THIS control.reg[0x2c],tmp32);
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srcaddr = tmp32 & (BX_CIRRUS_THIS memsize - 1);
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srcaddr = tmp32 & (BX_CIRRUS_THIS s.memsize - 1);
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BX_CIRRUS_THIS bitblt.srcaddr = srcaddr;
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BX_CIRRUS_THIS bitblt.bltmode = BX_CIRRUS_THIS control.reg[0x30];
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BX_CIRRUS_THIS bitblt.bltmodeext = BX_CIRRUS_THIS control.reg[0x33];
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BX_CIRRUS_THIS bitblt.bltrop = BX_CIRRUS_THIS control.reg[0x32];
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offset = dstaddr - (BX_CIRRUS_THIS disp_ptr - BX_CIRRUS_THIS vidmem);
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offset = dstaddr - (BX_CIRRUS_THIS disp_ptr - BX_CIRRUS_THIS s.memory);
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BX_CIRRUS_THIS redraw.x = (offset % BX_CIRRUS_THIS bitblt.dstpitch) / (BX_CIRRUS_THIS svga_bpp >> 3);
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BX_CIRRUS_THIS redraw.y = offset / BX_CIRRUS_THIS bitblt.dstpitch;
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BX_CIRRUS_THIS redraw.w = BX_CIRRUS_THIS bitblt.bltwidth / (BX_CIRRUS_THIS svga_bpp >> 3);
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@ -2561,7 +2554,7 @@ void bx_svga_cirrus_c::svga_bitblt()
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CIRRUS_BLTMODE_COLOREXPAND)) ==
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(CIRRUS_BLTMODE_PATTERNCOPY | CIRRUS_BLTMODE_COLOREXPAND)) {
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BX_CIRRUS_THIS bitblt.rop_handler = svga_get_fwd_rop_handler(BX_CIRRUS_THIS bitblt.bltrop);
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BX_CIRRUS_THIS bitblt.dst = BX_CIRRUS_THIS vidmem + dstaddr;
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BX_CIRRUS_THIS bitblt.dst = BX_CIRRUS_THIS s.memory + dstaddr;
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svga_solidfill();
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} else {
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@ -2601,7 +2594,7 @@ void bx_svga_cirrus_c::svga_setup_bitblt_cputovideo(Bit32u dstaddr,Bit32u srcadd
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BX_CIRRUS_THIS bitblt.bltmode &= ~CIRRUS_BLTMODE_MEMSYSSRC;
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BX_CIRRUS_THIS bitblt.dst = BX_CIRRUS_THIS vidmem + dstaddr;
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BX_CIRRUS_THIS bitblt.dst = BX_CIRRUS_THIS s.memory + dstaddr;
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BX_CIRRUS_THIS bitblt.src = NULL;
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BX_CIRRUS_THIS bitblt.memsrc_ptr = &BX_CIRRUS_THIS bitblt.memsrc[0];
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@ -2646,7 +2639,7 @@ void bx_svga_cirrus_c::svga_setup_bitblt_videotocpu(Bit32u dstaddr,Bit32u srcadd
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#if 0
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BX_CIRRUS_THIS bitblt.dst = NULL;
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BX_CIRRUS_THIS bitblt.src = BX_CIRRUS_THIS vidmem + srcaddr;
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BX_CIRRUS_THIS bitblt.src = BX_CIRRUS_THIS s.memory + srcaddr;
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BX_CIRRUS_THIS bitblt.memdst_ptr = &BX_CIRRUS_THIS bitblt.memdst[0];
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BX_CIRRUS_THIS bitblt.memdst_endptr = &BX_CIRRUS_THIS bitblt.memdst[0];
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@ -2666,14 +2659,14 @@ void bx_svga_cirrus_c::svga_setup_bitblt_videotocpu(Bit32u dstaddr,Bit32u srcadd
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void bx_svga_cirrus_c::svga_setup_bitblt_videotovideo(Bit32u dstaddr,Bit32u srcaddr)
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{
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BX_CIRRUS_THIS bitblt.dst = BX_CIRRUS_THIS vidmem + dstaddr;
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BX_CIRRUS_THIS bitblt.dst = BX_CIRRUS_THIS s.memory + dstaddr;
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if (BX_CIRRUS_THIS bitblt.bltmode & CIRRUS_BLTMODE_PATTERNCOPY) {
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BX_CIRRUS_THIS bitblt.bitblt_ptr = svga_patterncopy_static;
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BX_CIRRUS_THIS bitblt.src = BX_CIRRUS_THIS vidmem + (srcaddr & ~0x07);
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BX_CIRRUS_THIS bitblt.src = BX_CIRRUS_THIS s.memory + (srcaddr & ~0x07);
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} else {
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BX_CIRRUS_THIS bitblt.bitblt_ptr = svga_simplebitblt_static;
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BX_CIRRUS_THIS bitblt.src = BX_CIRRUS_THIS vidmem + srcaddr;
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BX_CIRRUS_THIS bitblt.src = BX_CIRRUS_THIS s.memory + srcaddr;
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}
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(*BX_CIRRUS_THIS bitblt.bitblt_ptr)();
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: svga_cirrus.h,v 1.9 2006-05-27 15:54:49 sshwarts Exp $
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// $Id: svga_cirrus.h,v 1.10 2006-08-18 15:43:20 vruppert Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2004 Makoto Suzuki (suzu)
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@ -205,10 +205,8 @@ private:
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unsigned svga_bpp;
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unsigned svga_dispbpp;
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Bit8u *vidmem;
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Bit32u bank_base[2];
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Bit32u bank_limit[2];
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Bit32u memsize;
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Bit8u *disp_ptr;
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#if BX_SUPPORT_PCI && BX_SUPPORT_CLGD54XX_PCI
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bx_bool pci_enabled;
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: vga.cc,v 1.136 2006-08-17 17:06:08 vruppert Exp $
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// $Id: vga.cc,v 1.137 2006-08-18 15:43:20 vruppert Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2002 MandrakeSoft S.A.
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@ -108,18 +108,14 @@ bx_vga_c::bx_vga_c()
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s.x_tilesize = X_TILESIZE;
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s.y_tilesize = Y_TILESIZE;
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timer_id = BX_NULL_TIMER_HANDLE;
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#if BX_SUPPORT_VBE
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s.vbe_memory = NULL;
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#endif
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s.memory = NULL;
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}
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bx_vga_c::~bx_vga_c()
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{
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#if BX_SUPPORT_VBE
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if (s.vbe_memory != NULL) {
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delete [] s.vbe_memory;
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if (s.memory != NULL) {
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delete [] s.memory;
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}
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#endif
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}
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void bx_vga_c::init(void)
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@ -133,6 +129,7 @@ void bx_vga_c::init(void)
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char *argv[16];
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char *ptr;
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char string[512];
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char *extname;
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#if BX_SUPPORT_VBE
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unsigned addr;
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#endif
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@ -215,9 +212,6 @@ void bx_vga_c::init(void)
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BX_VGA_THIS s.sequencer.index = 0;
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BX_VGA_THIS s.sequencer.map_mask = 0;
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for (i=0; i<4; i++) {
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BX_VGA_THIS s.sequencer.map_mask_bit[i] = 0;
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}
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BX_VGA_THIS s.sequencer.reset1 = 1;
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BX_VGA_THIS s.sequencer.reset2 = 1;
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BX_VGA_THIS s.sequencer.reg1 = 0;
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@ -226,7 +220,13 @@ void bx_vga_c::init(void)
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BX_VGA_THIS s.sequencer.odd_even = 1; // use sequential addressing mode
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BX_VGA_THIS s.sequencer.chain_four = 0; // use map mask & read map select
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memset(BX_VGA_THIS s.vga_memory, 0, sizeof(BX_VGA_THIS s.vga_memory));
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extname = SIM->get_param_string(BXPN_VGA_EXTENSION)->getptr();
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if ((strlen(extname) == 0) || (!strcmp(extname, "none"))) {
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BX_VGA_THIS s.memsize = 0x40000;
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if (BX_VGA_THIS s.memory == NULL)
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BX_VGA_THIS s.memory = new Bit8u[BX_VGA_THIS s.memsize];
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memset(BX_VGA_THIS s.memory, 0, BX_VGA_THIS s.memsize);
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}
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BX_VGA_THIS s.vga_mem_updated = 0;
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for (y=0; y<480/Y_TILESIZE; y++)
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@ -283,7 +283,7 @@ void bx_vga_c::init(void)
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|
||||
BX_VGA_THIS s.vbe_enabled=0;
|
||||
BX_VGA_THIS s.vbe_8bit_dac=0;
|
||||
if (!strcmp(SIM->get_param_string(BXPN_VGA_EXTENSION)->getptr(), "vbe")) {
|
||||
if (!strcmp(extname, "vbe")) {
|
||||
for (addr=VBE_DISPI_IOPORT_INDEX; addr<=VBE_DISPI_IOPORT_DATA; addr++) {
|
||||
DEV_register_ioread_handler(this, vbe_read_handler, addr, "vga video", 7);
|
||||
DEV_register_iowrite_handler(this, vbe_write_handler, addr, "vga video", 7);
|
||||
@ -298,9 +298,10 @@ void bx_vga_c::init(void)
|
||||
VBE_DISPI_LFB_PHYSICAL_ADDRESS,
|
||||
VBE_DISPI_LFB_PHYSICAL_ADDRESS + VBE_DISPI_TOTAL_VIDEO_MEMORY_BYTES - 1);
|
||||
|
||||
if (BX_VGA_THIS s.vbe_memory == NULL)
|
||||
BX_VGA_THIS s.vbe_memory = new Bit8u[VBE_DISPI_TOTAL_VIDEO_MEMORY_BYTES];
|
||||
memset(BX_VGA_THIS s.vbe_memory, 0, VBE_DISPI_TOTAL_VIDEO_MEMORY_BYTES);
|
||||
if (BX_VGA_THIS s.memory == NULL)
|
||||
BX_VGA_THIS s.memory = new Bit8u[VBE_DISPI_TOTAL_VIDEO_MEMORY_BYTES];
|
||||
memset(BX_VGA_THIS s.memory, 0, VBE_DISPI_TOTAL_VIDEO_MEMORY_BYTES);
|
||||
BX_VGA_THIS s.memsize = VBE_DISPI_TOTAL_VIDEO_MEMORY_BYTES;
|
||||
BX_VGA_THIS s.vbe_cur_dispi=VBE_DISPI_ID0;
|
||||
BX_VGA_THIS s.vbe_xres=640;
|
||||
BX_VGA_THIS s.vbe_yres=480;
|
||||
@ -451,7 +452,7 @@ void bx_vga_c::register_state(void)
|
||||
new bx_shadow_num_c(pel, "read_data_register", &BX_VGA_THIS s.pel.read_data_register, BASE_HEX);
|
||||
new bx_shadow_num_c(pel, "read_data_cycle", &BX_VGA_THIS s.pel.read_data_cycle);
|
||||
new bx_shadow_num_c(pel, "dac_state", &BX_VGA_THIS s.pel.dac_state);
|
||||
new bx_shadow_num_c(pel, "mask", &BX_VGA_THIS s.pel.mask);
|
||||
new bx_shadow_num_c(pel, "mask", &BX_VGA_THIS s.pel.mask, BASE_HEX);
|
||||
new bx_shadow_data_c(list, "pel_data", &BX_VGA_THIS s.pel.data[0].red, sizeof(BX_VGA_THIS s.pel.data));
|
||||
bx_list_c *gfxc = new bx_list_c(list, "graphics_ctrl", 20);
|
||||
new bx_shadow_num_c(gfxc, "index", &BX_VGA_THIS s.graphics_ctrl.index);
|
||||
@ -462,28 +463,24 @@ void bx_vga_c::register_state(void)
|
||||
new bx_shadow_num_c(gfxc, "raster_op", &BX_VGA_THIS s.graphics_ctrl.raster_op);
|
||||
new bx_shadow_num_c(gfxc, "read_map_select", &BX_VGA_THIS s.graphics_ctrl.read_map_select);
|
||||
new bx_shadow_num_c(gfxc, "write_mode", &BX_VGA_THIS s.graphics_ctrl.write_mode);
|
||||
new bx_shadow_bool_c(gfxc, "read_mode", &BX_VGA_THIS s.graphics_ctrl.read_mode);
|
||||
new bx_shadow_num_c(gfxc, "read_mode", &BX_VGA_THIS s.graphics_ctrl.read_mode);
|
||||
new bx_shadow_bool_c(gfxc, "odd_even", &BX_VGA_THIS s.graphics_ctrl.odd_even);
|
||||
new bx_shadow_bool_c(gfxc, "chain_odd_even", &BX_VGA_THIS s.graphics_ctrl.chain_odd_even);
|
||||
new bx_shadow_num_c(gfxc, "shift_reg", &BX_VGA_THIS s.graphics_ctrl.shift_reg);
|
||||
new bx_shadow_bool_c(gfxc, "graphics_alpha", &BX_VGA_THIS s.graphics_ctrl.graphics_alpha);
|
||||
new bx_shadow_num_c(gfxc, "memory_mapping", &BX_VGA_THIS s.graphics_ctrl.memory_mapping);
|
||||
new bx_shadow_num_c(gfxc, "color_dont_care", &BX_VGA_THIS s.graphics_ctrl.color_dont_care);
|
||||
new bx_shadow_num_c(gfxc, "bitmask", &BX_VGA_THIS s.graphics_ctrl.bitmask);
|
||||
new bx_shadow_num_c(gfxc, "latch0", &BX_VGA_THIS s.graphics_ctrl.latch[0]);
|
||||
new bx_shadow_num_c(gfxc, "latch1", &BX_VGA_THIS s.graphics_ctrl.latch[1]);
|
||||
new bx_shadow_num_c(gfxc, "latch2", &BX_VGA_THIS s.graphics_ctrl.latch[2]);
|
||||
new bx_shadow_num_c(gfxc, "latch3", &BX_VGA_THIS s.graphics_ctrl.latch[3]);
|
||||
new bx_shadow_num_c(gfxc, "color_dont_care", &BX_VGA_THIS s.graphics_ctrl.color_dont_care, BASE_HEX);
|
||||
new bx_shadow_num_c(gfxc, "bitmask", &BX_VGA_THIS s.graphics_ctrl.bitmask, BASE_HEX);
|
||||
new bx_shadow_num_c(gfxc, "latch0", &BX_VGA_THIS s.graphics_ctrl.latch[0], BASE_HEX);
|
||||
new bx_shadow_num_c(gfxc, "latch1", &BX_VGA_THIS s.graphics_ctrl.latch[1], BASE_HEX);
|
||||
new bx_shadow_num_c(gfxc, "latch2", &BX_VGA_THIS s.graphics_ctrl.latch[2], BASE_HEX);
|
||||
new bx_shadow_num_c(gfxc, "latch3", &BX_VGA_THIS s.graphics_ctrl.latch[3], BASE_HEX);
|
||||
bx_list_c *sequ = new bx_list_c(list, "sequencer", 13);
|
||||
new bx_shadow_num_c(sequ, "index", &BX_VGA_THIS s.sequencer.index);
|
||||
new bx_shadow_num_c(sequ, "map_mask", &BX_VGA_THIS s.sequencer.map_mask);
|
||||
new bx_shadow_bool_c(sequ, "map_mask_bit0", &BX_VGA_THIS s.sequencer.map_mask_bit[0]);
|
||||
new bx_shadow_bool_c(sequ, "map_mask_bit1", &BX_VGA_THIS s.sequencer.map_mask_bit[1]);
|
||||
new bx_shadow_bool_c(sequ, "map_mask_bit2", &BX_VGA_THIS s.sequencer.map_mask_bit[2]);
|
||||
new bx_shadow_bool_c(sequ, "map_mask_bit3", &BX_VGA_THIS s.sequencer.map_mask_bit[3]);
|
||||
new bx_shadow_bool_c(sequ, "reset1", &BX_VGA_THIS s.sequencer.reset1);
|
||||
new bx_shadow_bool_c(sequ, "reset2", &BX_VGA_THIS s.sequencer.reset2);
|
||||
new bx_shadow_num_c(sequ, "reg1", &BX_VGA_THIS s.sequencer.reg1);
|
||||
new bx_shadow_num_c(sequ, "reg1", &BX_VGA_THIS s.sequencer.reg1, BASE_HEX);
|
||||
new bx_shadow_num_c(sequ, "char_map_select", &BX_VGA_THIS s.sequencer.char_map_select);
|
||||
new bx_shadow_bool_c(sequ, "extended_mem", &BX_VGA_THIS s.sequencer.extended_mem);
|
||||
new bx_shadow_bool_c(sequ, "odd_even", &BX_VGA_THIS s.sequencer.odd_even);
|
||||
@ -496,11 +493,11 @@ void bx_vga_c::register_state(void)
|
||||
new bx_shadow_bool_c(list, "x_dotclockdiv2", &BX_VGA_THIS s.x_dotclockdiv2);
|
||||
new bx_shadow_bool_c(list, "y_doublescan", &BX_VGA_THIS s.y_doublescan);
|
||||
new bx_shadow_num_c(list, "last_bpp", &BX_VGA_THIS s.last_bpp);
|
||||
new bx_shadow_data_c(list, "memory", BX_VGA_THIS s.vga_memory, sizeof(BX_VGA_THIS s.vga_memory));
|
||||
new bx_shadow_data_c(list, "memory", BX_VGA_THIS s.memory, BX_VGA_THIS s.memsize);
|
||||
#if BX_SUPPORT_VBE
|
||||
if (BX_VGA_THIS s.vbe_memory != NULL) {
|
||||
if (!strcmp(SIM->get_param_string(BXPN_VGA_EXTENSION)->getptr(), "vbe")) {
|
||||
bx_list_c *vbe = new bx_list_c(list, "vbe", 18);
|
||||
new bx_shadow_num_c(vbe, "cur_dispi", &BX_VGA_THIS s.vbe_cur_dispi);
|
||||
new bx_shadow_num_c(vbe, "cur_dispi", &BX_VGA_THIS s.vbe_cur_dispi, BASE_HEX);
|
||||
new bx_shadow_num_c(vbe, "xres", &BX_VGA_THIS s.vbe_xres);
|
||||
new bx_shadow_num_c(vbe, "yres", &BX_VGA_THIS s.vbe_yres);
|
||||
new bx_shadow_num_c(vbe, "bpp", &BX_VGA_THIS s.vbe_bpp);
|
||||
@ -517,7 +514,6 @@ void bx_vga_c::register_state(void)
|
||||
new bx_shadow_bool_c(vbe, "lfb_enabled", &BX_VGA_THIS s.vbe_lfb_enabled);
|
||||
new bx_shadow_bool_c(vbe, "get_capabilities", &BX_VGA_THIS s.vbe_get_capabilities);
|
||||
new bx_shadow_bool_c(vbe, "8bit_dac", &BX_VGA_THIS s.vbe_8bit_dac);
|
||||
new bx_shadow_data_c(vbe, "memory", BX_VGA_THIS s.vbe_memory, VBE_DISPI_TOTAL_VIDEO_MEMORY_BYTES);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
@ -539,7 +535,7 @@ void bx_vga_c::after_restore_state(void)
|
||||
BX_VGA_THIS s.pel.data[i].blue<<2);
|
||||
}
|
||||
}
|
||||
bx_gui->set_text_charmap(&BX_VGA_THIS s.vga_memory[0x20000 + BX_VGA_THIS s.charmap_address]);
|
||||
bx_gui->set_text_charmap(&BX_VGA_THIS s.memory[0x20000 + BX_VGA_THIS s.charmap_address]);
|
||||
old_iWidth = BX_MAX_XRES;
|
||||
old_iHeight = BX_MAX_YRES;
|
||||
BX_VGA_THIS redraw_area(0, 0, BX_MAX_XRES, BX_MAX_YRES);
|
||||
@ -974,7 +970,6 @@ void bx_vga_c::write_handler_no_log(void *this_ptr, Bit32u address, Bit32u value
|
||||
|
||||
void bx_vga_c::write(Bit32u address, Bit32u value, unsigned io_len, bx_bool no_log)
|
||||
{
|
||||
unsigned i;
|
||||
Bit8u charmap1, charmap2, prev_memory_mapping;
|
||||
bx_bool prev_video_enabled, prev_line_graphics, prev_int_pal_size;
|
||||
bx_bool prev_graphics_alpha, prev_chain_odd_even;
|
||||
@ -1093,7 +1088,7 @@ void bx_vga_c::write(Bit32u address, Bit32u value, unsigned io_len, bx_bool no_l
|
||||
(value >> 7) & 0x01;
|
||||
if (((value >> 2) & 0x01) != prev_line_graphics) {
|
||||
bx_gui->set_text_charmap(
|
||||
& BX_VGA_THIS s.vga_memory[0x20000 + BX_VGA_THIS s.charmap_address]);
|
||||
& BX_VGA_THIS s.memory[0x20000 + BX_VGA_THIS s.charmap_address]);
|
||||
BX_VGA_THIS s.vga_mem_updated = 1;
|
||||
}
|
||||
if (((value >> 7) & 0x01) != prev_int_pal_size) {
|
||||
@ -1193,7 +1188,7 @@ void bx_vga_c::write(Bit32u address, Bit32u value, unsigned io_len, bx_bool no_l
|
||||
BX_VGA_THIS s.sequencer.char_map_select = 0;
|
||||
BX_VGA_THIS s.charmap_address = 0;
|
||||
bx_gui->set_text_charmap(
|
||||
& BX_VGA_THIS s.vga_memory[0x20000 + BX_VGA_THIS s.charmap_address]);
|
||||
& BX_VGA_THIS s.memory[0x20000 + BX_VGA_THIS s.charmap_address]);
|
||||
BX_VGA_THIS s.vga_mem_updated = 1;
|
||||
}
|
||||
BX_VGA_THIS s.sequencer.reset1 = (value >> 0) & 0x01;
|
||||
@ -1209,8 +1204,6 @@ void bx_vga_c::write(Bit32u address, Bit32u value, unsigned io_len, bx_bool no_l
|
||||
break;
|
||||
case 2: /* sequencer: map mask register */
|
||||
BX_VGA_THIS s.sequencer.map_mask = (value & 0x0f);
|
||||
for (i=0; i<4; i++)
|
||||
BX_VGA_THIS s.sequencer.map_mask_bit[i] = (value >> i) & 0x01;
|
||||
break;
|
||||
case 3: /* sequencer: character map select register */
|
||||
BX_VGA_THIS s.sequencer.char_map_select = value & 0x3f;
|
||||
@ -1221,7 +1214,7 @@ void bx_vga_c::write(Bit32u address, Bit32u value, unsigned io_len, bx_bool no_l
|
||||
if (BX_VGA_THIS s.CRTC.reg[0x09] > 0) {
|
||||
BX_VGA_THIS s.charmap_address = charmap_offset[charmap1];
|
||||
bx_gui->set_text_charmap(
|
||||
& BX_VGA_THIS s.vga_memory[0x20000 + BX_VGA_THIS s.charmap_address]);
|
||||
& BX_VGA_THIS s.memory[0x20000 + BX_VGA_THIS s.charmap_address]);
|
||||
BX_VGA_THIS s.vga_mem_updated = 1;
|
||||
}
|
||||
if (charmap2 != charmap1)
|
||||
@ -1578,7 +1571,7 @@ void bx_vga_c::update(void)
|
||||
iWidth=BX_VGA_THIS s.vbe_xres;
|
||||
iHeight=BX_VGA_THIS s.vbe_yres;
|
||||
pitch = BX_VGA_THIS s.line_offset;
|
||||
Bit8u *disp_ptr = &BX_VGA_THIS s.vbe_memory[BX_VGA_THIS s.vbe_virtual_start];
|
||||
Bit8u *disp_ptr = &BX_VGA_THIS s.memory[BX_VGA_THIS s.vbe_virtual_start];
|
||||
|
||||
if (bx_gui->graphics_tile_info(&info)) {
|
||||
if (info.is_indexed) {
|
||||
@ -1888,7 +1881,7 @@ void bx_vga_c::update(void)
|
||||
byte_offset += (x / 8);
|
||||
|
||||
bit_no = 7 - (x % 8);
|
||||
palette_reg_val = (((BX_VGA_THIS s.vga_memory[byte_offset]) >> bit_no) & 1);
|
||||
palette_reg_val = (((BX_VGA_THIS s.memory[byte_offset]) >> bit_no) & 1);
|
||||
DAC_regno = BX_VGA_THIS s.attribute_ctrl.palette_reg[palette_reg_val];
|
||||
BX_VGA_THIS s.tile[r*X_TILESIZE + c] = DAC_regno;
|
||||
}
|
||||
@ -1904,20 +1897,20 @@ void bx_vga_c::update(void)
|
||||
#if BX_SUPPORT_VBE
|
||||
if (BX_VGA_THIS s.vbe_enabled)
|
||||
{
|
||||
plane0 = &BX_VGA_THIS s.vbe_memory[0<<VBE_DISPI_4BPP_PLANE_SHIFT];
|
||||
plane1 = &BX_VGA_THIS s.vbe_memory[1<<VBE_DISPI_4BPP_PLANE_SHIFT];
|
||||
plane2 = &BX_VGA_THIS s.vbe_memory[2<<VBE_DISPI_4BPP_PLANE_SHIFT];
|
||||
plane3 = &BX_VGA_THIS s.vbe_memory[3<<VBE_DISPI_4BPP_PLANE_SHIFT];
|
||||
plane0 = &BX_VGA_THIS s.memory[0<<VBE_DISPI_4BPP_PLANE_SHIFT];
|
||||
plane1 = &BX_VGA_THIS s.memory[1<<VBE_DISPI_4BPP_PLANE_SHIFT];
|
||||
plane2 = &BX_VGA_THIS s.memory[2<<VBE_DISPI_4BPP_PLANE_SHIFT];
|
||||
plane3 = &BX_VGA_THIS s.memory[3<<VBE_DISPI_4BPP_PLANE_SHIFT];
|
||||
start_addr = BX_VGA_THIS s.vbe_virtual_start;
|
||||
line_compare = 0xffff;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
plane0 = &BX_VGA_THIS s.vga_memory[0<<16];
|
||||
plane1 = &BX_VGA_THIS s.vga_memory[1<<16];
|
||||
plane2 = &BX_VGA_THIS s.vga_memory[2<<16];
|
||||
plane3 = &BX_VGA_THIS s.vga_memory[3<<16];
|
||||
plane0 = &BX_VGA_THIS s.memory[0<<16];
|
||||
plane1 = &BX_VGA_THIS s.memory[1<<16];
|
||||
plane2 = &BX_VGA_THIS s.memory[2<<16];
|
||||
plane3 = &BX_VGA_THIS s.memory[3<<16];
|
||||
line_compare = BX_VGA_THIS s.line_compare;
|
||||
if (BX_VGA_THIS s.y_doublescan) line_compare >>= 1;
|
||||
}
|
||||
@ -2000,7 +1993,7 @@ void bx_vga_c::update(void)
|
||||
byte_offset += (x / 4);
|
||||
|
||||
attribute = 6 - 2*(x % 4);
|
||||
palette_reg_val = (BX_VGA_THIS s.vga_memory[byte_offset]) >> attribute;
|
||||
palette_reg_val = (BX_VGA_THIS s.memory[byte_offset]) >> attribute;
|
||||
palette_reg_val &= 3;
|
||||
DAC_regno = BX_VGA_THIS s.attribute_ctrl.palette_reg[palette_reg_val];
|
||||
BX_VGA_THIS s.tile[r*X_TILESIZE + c] = DAC_regno;
|
||||
@ -2036,7 +2029,7 @@ void bx_vga_c::update(void)
|
||||
plane = (pixelx % 4);
|
||||
byte_offset = start_addr + (plane * 65536) +
|
||||
(pixely * BX_VGA_THIS s.line_offset) + (pixelx & ~0x03);
|
||||
color = BX_VGA_THIS s.vga_memory[byte_offset];
|
||||
color = BX_VGA_THIS s.memory[byte_offset];
|
||||
BX_VGA_THIS s.tile[r*X_TILESIZE + c] = color;
|
||||
}
|
||||
}
|
||||
@ -2062,7 +2055,7 @@ void bx_vga_c::update(void)
|
||||
byte_offset = (plane * 65536) +
|
||||
(pixely * BX_VGA_THIS s.line_offset)
|
||||
+ (pixelx >> 2);
|
||||
color = BX_VGA_THIS s.vga_memory[start_addr + byte_offset];
|
||||
color = BX_VGA_THIS s.memory[start_addr + byte_offset];
|
||||
BX_VGA_THIS s.tile[r*X_TILESIZE + c] = color;
|
||||
}
|
||||
}
|
||||
@ -2151,11 +2144,11 @@ void bx_vga_c::update(void)
|
||||
cursor_y = ((cursor_address - start_address)/2) / (iWidth/cWidth);
|
||||
}
|
||||
bx_gui->text_update(BX_VGA_THIS s.text_snapshot,
|
||||
&BX_VGA_THIS s.vga_memory[start_address],
|
||||
&BX_VGA_THIS s.memory[start_address],
|
||||
cursor_x, cursor_y, tm_info, rows);
|
||||
// screen updated, copy new VGA memory contents into text snapshot
|
||||
memcpy(BX_VGA_THIS s.text_snapshot,
|
||||
&BX_VGA_THIS s.vga_memory[start_address],
|
||||
&BX_VGA_THIS s.memory[start_address],
|
||||
2*cols*rows);
|
||||
BX_VGA_THIS s.vga_mem_updated = 0;
|
||||
}
|
||||
@ -2237,24 +2230,24 @@ Bit8u bx_vga_c::mem_read(Bit32u addr)
|
||||
|
||||
if ( BX_VGA_THIS s.sequencer.chain_four ) {
|
||||
// Mode 13h: 320 x 200 256 color mode: chained pixel representation
|
||||
return BX_VGA_THIS s.vga_memory[(offset & ~0x03) + (offset % 4)*65536];
|
||||
return BX_VGA_THIS s.memory[(offset & ~0x03) + (offset % 4)*65536];
|
||||
}
|
||||
|
||||
#if BX_SUPPORT_VBE
|
||||
if (BX_VGA_THIS s.vbe_enabled)
|
||||
{
|
||||
plane0 = &BX_VGA_THIS s.vbe_memory[(0<<VBE_DISPI_4BPP_PLANE_SHIFT) + (BX_VGA_THIS s.vbe_bank<<16)];
|
||||
plane1 = &BX_VGA_THIS s.vbe_memory[(1<<VBE_DISPI_4BPP_PLANE_SHIFT) + (BX_VGA_THIS s.vbe_bank<<16)];
|
||||
plane2 = &BX_VGA_THIS s.vbe_memory[(2<<VBE_DISPI_4BPP_PLANE_SHIFT) + (BX_VGA_THIS s.vbe_bank<<16)];
|
||||
plane3 = &BX_VGA_THIS s.vbe_memory[(3<<VBE_DISPI_4BPP_PLANE_SHIFT) + (BX_VGA_THIS s.vbe_bank<<16)];
|
||||
plane0 = &BX_VGA_THIS s.memory[(0<<VBE_DISPI_4BPP_PLANE_SHIFT) + (BX_VGA_THIS s.vbe_bank<<16)];
|
||||
plane1 = &BX_VGA_THIS s.memory[(1<<VBE_DISPI_4BPP_PLANE_SHIFT) + (BX_VGA_THIS s.vbe_bank<<16)];
|
||||
plane2 = &BX_VGA_THIS s.memory[(2<<VBE_DISPI_4BPP_PLANE_SHIFT) + (BX_VGA_THIS s.vbe_bank<<16)];
|
||||
plane3 = &BX_VGA_THIS s.memory[(3<<VBE_DISPI_4BPP_PLANE_SHIFT) + (BX_VGA_THIS s.vbe_bank<<16)];
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
plane0 = &BX_VGA_THIS s.vga_memory[0<<16];
|
||||
plane1 = &BX_VGA_THIS s.vga_memory[1<<16];
|
||||
plane2 = &BX_VGA_THIS s.vga_memory[2<<16];
|
||||
plane3 = &BX_VGA_THIS s.vga_memory[3<<16];
|
||||
plane0 = &BX_VGA_THIS s.memory[0<<16];
|
||||
plane1 = &BX_VGA_THIS s.memory[1<<16];
|
||||
plane2 = &BX_VGA_THIS s.memory[2<<16];
|
||||
plane3 = &BX_VGA_THIS s.memory[3<<16];
|
||||
}
|
||||
|
||||
/* addr between 0xA0000 and 0xAFFFF */
|
||||
@ -2382,7 +2375,7 @@ void bx_vga_c::mem_write(Bit32u addr, Bit8u value)
|
||||
unsigned x_tileno, x_tileno2, y_tileno;
|
||||
|
||||
/* CGA 320x200x4 / 640x200x2 start */
|
||||
BX_VGA_THIS s.vga_memory[offset] = value;
|
||||
BX_VGA_THIS s.memory[offset] = value;
|
||||
offset -= start_addr;
|
||||
if (offset>=0x2000) {
|
||||
y_tileno = offset - 0x2000;
|
||||
@ -2435,7 +2428,7 @@ void bx_vga_c::mem_write(Bit32u addr, Bit8u value)
|
||||
unsigned x_tileno, y_tileno;
|
||||
|
||||
// 320 x 200 256 color mode: chained pixel representation
|
||||
BX_VGA_THIS s.vga_memory[(offset & ~0x03) + (offset % 4)*65536] = value;
|
||||
BX_VGA_THIS s.memory[(offset & ~0x03) + (offset % 4)*65536] = value;
|
||||
if (BX_VGA_THIS s.line_offset > 0) {
|
||||
offset -= start_addr;
|
||||
x_tileno = (offset % BX_VGA_THIS s.line_offset) / (X_TILESIZE/2);
|
||||
@ -2456,18 +2449,18 @@ void bx_vga_c::mem_write(Bit32u addr, Bit8u value)
|
||||
#if BX_SUPPORT_VBE
|
||||
if (BX_VGA_THIS s.vbe_enabled)
|
||||
{
|
||||
plane0 = &BX_VGA_THIS s.vbe_memory[(0<<VBE_DISPI_4BPP_PLANE_SHIFT) + (BX_VGA_THIS s.vbe_bank<<16)];
|
||||
plane1 = &BX_VGA_THIS s.vbe_memory[(1<<VBE_DISPI_4BPP_PLANE_SHIFT) + (BX_VGA_THIS s.vbe_bank<<16)];
|
||||
plane2 = &BX_VGA_THIS s.vbe_memory[(2<<VBE_DISPI_4BPP_PLANE_SHIFT) + (BX_VGA_THIS s.vbe_bank<<16)];
|
||||
plane3 = &BX_VGA_THIS s.vbe_memory[(3<<VBE_DISPI_4BPP_PLANE_SHIFT) + (BX_VGA_THIS s.vbe_bank<<16)];
|
||||
plane0 = &BX_VGA_THIS s.memory[(0<<VBE_DISPI_4BPP_PLANE_SHIFT) + (BX_VGA_THIS s.vbe_bank<<16)];
|
||||
plane1 = &BX_VGA_THIS s.memory[(1<<VBE_DISPI_4BPP_PLANE_SHIFT) + (BX_VGA_THIS s.vbe_bank<<16)];
|
||||
plane2 = &BX_VGA_THIS s.memory[(2<<VBE_DISPI_4BPP_PLANE_SHIFT) + (BX_VGA_THIS s.vbe_bank<<16)];
|
||||
plane3 = &BX_VGA_THIS s.memory[(3<<VBE_DISPI_4BPP_PLANE_SHIFT) + (BX_VGA_THIS s.vbe_bank<<16)];
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
plane0 = &BX_VGA_THIS s.vga_memory[0<<16];
|
||||
plane1 = &BX_VGA_THIS s.vga_memory[1<<16];
|
||||
plane2 = &BX_VGA_THIS s.vga_memory[2<<16];
|
||||
plane3 = &BX_VGA_THIS s.vga_memory[3<<16];
|
||||
plane0 = &BX_VGA_THIS s.memory[0<<16];
|
||||
plane1 = &BX_VGA_THIS s.memory[1<<16];
|
||||
plane2 = &BX_VGA_THIS s.memory[2<<16];
|
||||
plane3 = &BX_VGA_THIS s.memory[3<<16];
|
||||
}
|
||||
|
||||
switch (BX_VGA_THIS s.graphics_ctrl.write_mode) {
|
||||
@ -2715,17 +2708,17 @@ void bx_vga_c::mem_write(Bit32u addr, Bit8u value)
|
||||
|
||||
if (BX_VGA_THIS s.sequencer.map_mask & 0x0f) {
|
||||
BX_VGA_THIS s.vga_mem_updated = 1;
|
||||
if (BX_VGA_THIS s.sequencer.map_mask_bit[0])
|
||||
if (BX_VGA_THIS s.sequencer.map_mask & 0x01)
|
||||
plane0[offset] = new_val[0];
|
||||
if (BX_VGA_THIS s.sequencer.map_mask_bit[1])
|
||||
if (BX_VGA_THIS s.sequencer.map_mask & 0x02)
|
||||
plane1[offset] = new_val[1];
|
||||
if (BX_VGA_THIS s.sequencer.map_mask_bit[2]) {
|
||||
if (BX_VGA_THIS s.sequencer.map_mask & 0x04) {
|
||||
if ((offset & 0xe000) == BX_VGA_THIS s.charmap_address) {
|
||||
bx_gui->set_text_charbyte((offset & 0x1fff), new_val[2]);
|
||||
}
|
||||
plane2[offset] = new_val[2];
|
||||
}
|
||||
if (BX_VGA_THIS s.sequencer.map_mask_bit[3])
|
||||
if (BX_VGA_THIS s.sequencer.map_mask & 0x08)
|
||||
plane3[offset] = new_val[3];
|
||||
|
||||
unsigned x_tileno, y_tileno;
|
||||
@ -2933,7 +2926,7 @@ bx_vga_c::vbe_mem_read(Bit32u addr)
|
||||
if (offset > VBE_DISPI_TOTAL_VIDEO_MEMORY_BYTES)
|
||||
return 0;
|
||||
|
||||
return (BX_VGA_THIS s.vbe_memory[offset]);
|
||||
return (BX_VGA_THIS s.memory[offset]);
|
||||
}
|
||||
|
||||
void BX_CPP_AttrRegparmN(2)
|
||||
@ -2972,7 +2965,7 @@ bx_vga_c::vbe_mem_write(Bit32u addr, Bit8u value)
|
||||
// check for out of memory write
|
||||
if (offset < VBE_DISPI_TOTAL_VIDEO_MEMORY_BYTES)
|
||||
{
|
||||
BX_VGA_THIS s.vbe_memory[offset]=value;
|
||||
BX_VGA_THIS s.memory[offset]=value;
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -3325,7 +3318,7 @@ Bit32u bx_vga_c::vbe_write(Bit32u address, Bit32u value, unsigned io_len)
|
||||
BX_VGA_THIS s.vbe_lfb_enabled=(bx_bool)(value & VBE_DISPI_LFB_ENABLED);
|
||||
if ((value & VBE_DISPI_NOCLEARMEM) == 0)
|
||||
{
|
||||
memset(BX_VGA_THIS s.vbe_memory, 0, BX_VGA_THIS s.vbe_visible_screen_size);
|
||||
memset(BX_VGA_THIS s.memory, 0, BX_VGA_THIS s.vbe_visible_screen_size);
|
||||
}
|
||||
bx_gui->dimension_update(BX_VGA_THIS s.vbe_xres, BX_VGA_THIS s.vbe_yres, 0, 0, depth);
|
||||
BX_VGA_THIS s.last_bpp = depth;
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: vga.h,v 1.56 2006-08-15 16:48:23 vruppert Exp $
|
||||
// $Id: vga.h,v 1.57 2006-08-18 15:43:20 vruppert Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2002 MandrakeSoft S.A.
|
||||
@ -258,7 +258,6 @@ protected:
|
||||
struct {
|
||||
Bit8u index;
|
||||
Bit8u map_mask;
|
||||
bx_bool map_mask_bit[4];
|
||||
bx_bool reset1;
|
||||
bx_bool reset2;
|
||||
Bit8u reg1;
|
||||
@ -276,7 +275,8 @@ protected:
|
||||
unsigned line_compare;
|
||||
unsigned vertical_display_end;
|
||||
bx_bool vga_tile_updated[BX_NUM_X_TILES][BX_NUM_Y_TILES];
|
||||
Bit8u vga_memory[256 * 1024];
|
||||
Bit8u *memory;
|
||||
Bit32u memsize;
|
||||
Bit8u text_snapshot[128 * 1024]; // current text snapshot
|
||||
Bit8u tile[X_TILESIZE * Y_TILESIZE * 4]; /**< Currently allocates the tile as large as needed. */
|
||||
Bit16u charmap_address;
|
||||
@ -285,7 +285,6 @@ protected:
|
||||
Bit8u last_bpp;
|
||||
|
||||
#if BX_SUPPORT_VBE
|
||||
Bit8u *vbe_memory;
|
||||
Bit16u vbe_cur_dispi;
|
||||
Bit16u vbe_xres;
|
||||
Bit16u vbe_yres;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user