diff --git a/bochs/CHANGES b/bochs/CHANGES index cd478558b..736a9e354 100644 --- a/bochs/CHANGES +++ b/bochs/CHANGES @@ -5,6 +5,7 @@ Detailed change log : - CPU - fixed XMM registers restore in FXRSTOR instruction (Andrej Palkovsky) - print registers dump to the log if tripple fault occured + - fixed switch from vm8086 to protected mode - CPU (x86-64) (Stanislav) - implemented call_far/ret_far/jmp_far instructions in long mode diff --git a/bochs/cpu/cpu.h b/bochs/cpu/cpu.h index be1a9c9d3..ae1d665ed 100644 --- a/bochs/cpu/cpu.h +++ b/bochs/cpu/cpu.h @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: cpu.h,v 1.241 2005-09-11 20:00:29 sshwarts Exp $ +// $Id: cpu.h,v 1.242 2005-09-23 16:45:40 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -1632,11 +1632,9 @@ public: // for now... BX_SMF void MOVZX_GdEb(bxInstruction_c *); BX_SMF void MOVZX_GwEb(bxInstruction_c *); BX_SMF void MOVZX_GdEw(bxInstruction_c *); - BX_SMF void MOVZX_GwEw(bxInstruction_c *); BX_SMF void MOVSX_GdEb(bxInstruction_c *); BX_SMF void MOVSX_GwEb(bxInstruction_c *); BX_SMF void MOVSX_GdEw(bxInstruction_c *); - BX_SMF void MOVSX_GwEw(bxInstruction_c *); BX_SMF void BSWAP_EAX(bxInstruction_c *); BX_SMF void BSWAP_ECX(bxInstruction_c *); @@ -2025,7 +2023,7 @@ public: // for now... BX_SMF void CMPPS_VpsWpsIb(bxInstruction_c *i); BX_SMF void CMPSS_VssWssIb(bxInstruction_c *i); BX_SMF void PINSRW_PqEdIb(bxInstruction_c *i); - BX_SMF void PEXTRW_PqEdIb(bxInstruction_c *i); + BX_SMF void PEXTRW_GdPqIb(bxInstruction_c *i); BX_SMF void SHUFPS_VpsWpsIb(bxInstruction_c *i); BX_SMF void PMOVMSKB_GdPRq(bxInstruction_c *i); BX_SMF void PMINUB_PqQq(bxInstruction_c *i); @@ -2043,7 +2041,7 @@ public: // for now... /* SSE2 */ BX_SMF void MOVSD_VsdWsd(bxInstruction_c *i); BX_SMF void MOVSD_WsdVsd(bxInstruction_c *i); - BX_SMF void CVTPI2PD_VpdQd(bxInstruction_c *i); + BX_SMF void CVTPI2PD_VpdQq(bxInstruction_c *i); BX_SMF void CVTSI2SD_VsdEd(bxInstruction_c *i); BX_SMF void CVTTPD2PI_PqWpd(bxInstruction_c *i); BX_SMF void CVTTSD2SI_GdWsd(bxInstruction_c *i); @@ -2051,7 +2049,7 @@ public: // for now... BX_SMF void CVTSD2SI_GdWsd(bxInstruction_c *i); BX_SMF void UCOMISD_VsdWsd(bxInstruction_c *i); BX_SMF void COMISD_VpdWpd(bxInstruction_c *i); - BX_SMF void MOVMSKPD_EdVRpd(bxInstruction_c *i); + BX_SMF void MOVMSKPD_GdVRpd(bxInstruction_c *i); BX_SMF void SQRTPD_VpdWpd(bxInstruction_c *i); BX_SMF void SQRTSD_VsdWsd(bxInstruction_c *i); BX_SMF void ADDPD_VpdWpd(bxInstruction_c *i); @@ -2099,7 +2097,7 @@ public: // for now... BX_SMF void CMPSD_VsdWsdIb(bxInstruction_c *i); BX_SMF void MOVNTI_MdGd(bxInstruction_c *i); BX_SMF void PINSRW_VdqEdIb(bxInstruction_c *i); - BX_SMF void PEXTRW_VdqEdIb(bxInstruction_c *i); + BX_SMF void PEXTRW_GdVRdqIb(bxInstruction_c *i); BX_SMF void SHUFPD_VpdWpdIb(bxInstruction_c *i); BX_SMF void PSRLW_VdqWdq(bxInstruction_c *i); BX_SMF void PSRLD_VdqWdq(bxInstruction_c *i); diff --git a/bochs/cpu/data_xfer16.cc b/bochs/cpu/data_xfer16.cc index 138caa491..1f319fa9c 100644 --- a/bochs/cpu/data_xfer16.cc +++ b/bochs/cpu/data_xfer16.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: data_xfer16.cc,v 1.34 2005-06-21 17:01:18 sshwarts Exp $ +// $Id: data_xfer16.cc,v 1.35 2005-09-23 16:45:41 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -182,22 +182,6 @@ void BX_CPU_C::MOVZX_GwEb(bxInstruction_c *i) BX_WRITE_16BIT_REG(i->nnn(), (Bit16u) op2_8); } -void BX_CPU_C::MOVZX_GwEw(bxInstruction_c *i) -{ - Bit16u op2_16; - - if (i->modC0()) { - op2_16 = BX_READ_16BIT_REG(i->rm()); - } - else { - /* pointer, segment address pair */ - read_virtual_word(i->seg(), RMAddr(i), &op2_16); - } - - /* normal move */ - BX_WRITE_16BIT_REG(i->nnn(), op2_16); -} - void BX_CPU_C::MOVSX_GwEb(bxInstruction_c *i) { Bit8u op2_8; @@ -213,22 +197,6 @@ void BX_CPU_C::MOVSX_GwEb(bxInstruction_c *i) /* sign extend byte op2 into word op1 */ BX_WRITE_16BIT_REG(i->nnn(), (Bit8s) op2_8); } - -void BX_CPU_C::MOVSX_GwEw(bxInstruction_c *i) -{ - Bit16u op2_16; - - if (i->modC0()) { - op2_16 = BX_READ_16BIT_REG(i->rm()); - } - else { - /* pointer, segment address pair */ - read_virtual_word(i->seg(), RMAddr(i), &op2_16); - } - - /* normal move */ - BX_WRITE_16BIT_REG(i->nnn(), op2_16); -} #endif void BX_CPU_C::XCHG_EwGw(bxInstruction_c *i) diff --git a/bochs/cpu/fetchdecode.cc b/bochs/cpu/fetchdecode.cc index 48d470df7..f4dc12da2 100644 --- a/bochs/cpu/fetchdecode.cc +++ b/bochs/cpu/fetchdecode.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: fetchdecode.cc,v 1.85 2005-08-08 19:56:06 sshwarts Exp $ +// $Id: fetchdecode.cc,v 1.86 2005-09-23 16:45:41 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -869,7 +869,7 @@ static BxOpcodeInfo_t BxOpcodeInfo[512*2] = { /* 0F B4 */ { BxAnother, &BX_CPU_C::LFS_GvMp }, /* 0F B5 */ { BxAnother, &BX_CPU_C::LGS_GvMp }, /* 0F B6 */ { BxAnother, &BX_CPU_C::MOVZX_GwEb }, - /* 0F B7 */ { BxAnother, &BX_CPU_C::MOVZX_GwEw }, + /* 0F B7 */ { BxAnother | BxSplitMod11b, NULL, opcodesMOV_GwEw }, // MOVZX_GwEw /* 0F B8 */ { 0, &BX_CPU_C::BxError }, /* 0F B9 */ { 0, &BX_CPU_C::UndefinedOpcode }, // UD2 opcode /* 0F BA */ { BxAnother | BxGroup8, NULL, BxOpcodeInfoG8EwIb }, @@ -877,7 +877,7 @@ static BxOpcodeInfo_t BxOpcodeInfo[512*2] = { /* 0F BC */ { BxAnother, &BX_CPU_C::BSF_GwEw }, /* 0F BD */ { BxAnother, &BX_CPU_C::BSR_GwEw }, /* 0F BE */ { BxAnother, &BX_CPU_C::MOVSX_GwEb }, - /* 0F BF */ { BxAnother, &BX_CPU_C::MOVSX_GwEw }, + /* 0F BF */ { BxAnother | BxSplitMod11b, NULL, opcodesMOV_GwEw }, // MOVSX_GwEw /* 0F C0 */ { BxAnother | BxLockable, &BX_CPU_C::XADD_EbGb }, /* 0F C1 */ { BxAnother | BxLockable, &BX_CPU_C::XADD_EwGw }, /* 0F C2 */ { BxAnother | BxImmediate_Ib | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0fc2 }, diff --git a/bochs/cpu/fetchdecode.h b/bochs/cpu/fetchdecode.h index e086d57b4..edbfd5e2a 100755 --- a/bochs/cpu/fetchdecode.h +++ b/bochs/cpu/fetchdecode.h @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: fetchdecode.h,v 1.17 2005-05-12 18:07:41 sshwarts Exp $ +// $Id: fetchdecode.h,v 1.18 2005-09-23 16:45:41 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (c) 2003 Stanislav Shwartsman @@ -1092,7 +1092,7 @@ static BxOpcodeInfo_t BxOpcodeGroupSSE_0f29[4] = { static BxOpcodeInfo_t BxOpcodeGroupSSE_0f2a[4] = { /* -- */ { 0, &BX_CPU_C::CVTPI2PS_VpsQq }, - /* 66 */ { 0, &BX_CPU_C::CVTPI2PD_VpdQd }, + /* 66 */ { 0, &BX_CPU_C::CVTPI2PD_VpdQq }, /* F2 */ { 0, &BX_CPU_C::CVTSI2SD_VsdEd }, /* F3 */ { 0, &BX_CPU_C::CVTSI2SS_VssEd } }; @@ -1134,7 +1134,7 @@ static BxOpcodeInfo_t BxOpcodeGroupSSE_0f2f[4] = { static BxOpcodeInfo_t BxOpcodeGroupSSE_0f50[4] = { /* -- */ { 0, &BX_CPU_C::MOVMSKPS_GdVRps }, - /* 66 */ { 0, &BX_CPU_C::MOVMSKPD_EdVRpd }, + /* 66 */ { 0, &BX_CPU_C::MOVMSKPD_GdVRpd }, /* F2 */ { 0, &BX_CPU_C::BxError }, /* F3 */ { 0, &BX_CPU_C::BxError } }; @@ -1434,8 +1434,8 @@ static BxOpcodeInfo_t BxOpcodeGroupSSE_0fc4[4] = { }; static BxOpcodeInfo_t BxOpcodeGroupSSE_0fc5[4] = { - /* -- */ { BxImmediate_Ib, &BX_CPU_C::PEXTRW_PqEdIb }, - /* 66 */ { BxImmediate_Ib, &BX_CPU_C::PEXTRW_VdqEdIb }, + /* -- */ { BxImmediate_Ib, &BX_CPU_C::PEXTRW_GdPqIb }, + /* 66 */ { BxImmediate_Ib, &BX_CPU_C::PEXTRW_GdVRdqIb }, /* F2 */ { 0, &BX_CPU_C::BxError }, /* F3 */ { 0, &BX_CPU_C::BxError } }; diff --git a/bochs/cpu/fetchdecode64.cc b/bochs/cpu/fetchdecode64.cc index 236a2b8d7..4686d03f3 100644 --- a/bochs/cpu/fetchdecode64.cc +++ b/bochs/cpu/fetchdecode64.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: fetchdecode64.cc,v 1.82 2005-08-08 19:56:09 sshwarts Exp $ +// $Id: fetchdecode64.cc,v 1.83 2005-09-23 16:45:41 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -627,7 +627,7 @@ static BxOpcodeInfo_t BxOpcodeInfo64[512*3] = { /* 60 */ { 0, &BX_CPU_C::BxError }, /* 61 */ { 0, &BX_CPU_C::BxError }, /* 62 */ { 0, &BX_CPU_C::BxError }, - /* 63 */ { BxAnother, &BX_CPU_C::MOVSX_GwEw }, + /* 63 */ { BxAnother | BxSplitMod11b, NULL, opcodesMOV_GwEw }, // MOVSX_GwEw /* 64 */ { BxPrefix | BxAnother, &BX_CPU_C::BxError }, // FS: /* 65 */ { BxPrefix | BxAnother, &BX_CPU_C::BxError }, // GS: /* 66 */ { BxPrefix | BxAnother, &BX_CPU_C::BxError }, // OS: @@ -974,7 +974,7 @@ static BxOpcodeInfo_t BxOpcodeInfo64[512*3] = { /* 0F B4 */ { BxAnother, &BX_CPU_C::LFS_GvMp }, /* 0F B5 */ { BxAnother, &BX_CPU_C::LGS_GvMp }, /* 0F B6 */ { BxAnother, &BX_CPU_C::MOVZX_GwEb }, - /* 0F B7 */ { BxAnother, &BX_CPU_C::MOVZX_GwEw }, + /* 0F B7 */ { BxAnother | BxSplitMod11b, NULL, opcodesMOV_GwEw }, // MOVZX_GwEw /* 0F B8 */ { 0, &BX_CPU_C::BxError }, /* 0F B9 */ { 0, &BX_CPU_C::UndefinedOpcode }, // UD2 opcode /* 0F BA */ { BxAnother | BxGroup8, NULL, BxOpcodeInfo64G8EwIb }, @@ -982,7 +982,7 @@ static BxOpcodeInfo_t BxOpcodeInfo64[512*3] = { /* 0F BC */ { BxAnother, &BX_CPU_C::BSF_GwEw }, /* 0F BD */ { BxAnother, &BX_CPU_C::BSR_GwEw }, /* 0F BE */ { BxAnother, &BX_CPU_C::MOVSX_GwEb }, - /* 0F BF */ { BxAnother, &BX_CPU_C::MOVSX_GwEw }, + /* 0F BF */ { BxAnother | BxSplitMod11b, NULL, opcodesMOV_GwEw }, // MOVSX_GwEw /* 0F C0 */ { BxAnother | BxLockable, &BX_CPU_C::XADD_EbGb }, /* 0F C1 */ { BxAnother | BxLockable, &BX_CPU_C::XADD_EwGw }, /* 0F C2 */ { BxAnother | BxImmediate_Ib | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0fc2 }, @@ -1148,7 +1148,7 @@ static BxOpcodeInfo_t BxOpcodeInfo64[512*3] = { /* 60 */ { 0, &BX_CPU_C::BxError }, /* 61 */ { 0, &BX_CPU_C::BxError }, /* 62 */ { 0, &BX_CPU_C::BxError }, - /* 63 */ { BxAnother | BxSplitMod11b, NULL, opcodesMOV_GdEd }, + /* 63 */ { BxAnother | BxSplitMod11b, NULL, opcodesMOV_GdEd }, // MOVSX_GdEd /* 64 */ { BxPrefix | BxAnother, &BX_CPU_C::BxError }, // FS: /* 65 */ { BxPrefix | BxAnother, &BX_CPU_C::BxError }, // GS: /* 66 */ { BxPrefix | BxAnother, &BX_CPU_C::BxError }, // OS: diff --git a/bochs/cpu/mmx.cc b/bochs/cpu/mmx.cc index 370c98bdb..1a1875b25 100644 --- a/bochs/cpu/mmx.cc +++ b/bochs/cpu/mmx.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: mmx.cc,v 1.48 2005-09-12 18:08:35 sshwarts Exp $ +// $Id: mmx.cc,v 1.49 2005-09-23 16:45:41 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (c) 2002 Stanislav Shwartsman @@ -777,7 +777,7 @@ void BX_CPU_C::PINSRW_PqEdIb(bxInstruction_c *i) } /* 0F C5 */ -void BX_CPU_C::PEXTRW_PqEdIb(bxInstruction_c *i) +void BX_CPU_C::PEXTRW_GdPqIb(bxInstruction_c *i) { #if BX_SUPPORT_3DNOW || BX_SUPPORT_SSE >= 1 BX_CPU_THIS_PTR prepareMMX(); @@ -787,7 +787,7 @@ void BX_CPU_C::PEXTRW_PqEdIb(bxInstruction_c *i) BX_WRITE_32BIT_REGZ(i->nnn(), result); #else - BX_INFO(("PEXTRW_PqEdIb: required SSE or 3DNOW, use --enable-sse or --enable-3dnow options")); + BX_INFO(("PEXTRW_GdPqIb: required SSE or 3DNOW, use --enable-sse or --enable-3dnow options")); UndefinedOpcode(i); #endif } diff --git a/bochs/cpu/sse.cc b/bochs/cpu/sse.cc index 1a5226475..8c1cdb84a 100644 --- a/bochs/cpu/sse.cc +++ b/bochs/cpu/sse.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: sse.cc,v 1.33 2005-09-12 18:08:35 sshwarts Exp $ +// $Id: sse.cc,v 1.34 2005-09-23 16:45:41 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (c) 2003 Stanislav Shwartsman @@ -365,7 +365,7 @@ void BX_CPU_C::PINSRW_VdqEdIb(bxInstruction_c *i) } /* 66 0F C5 */ -void BX_CPU_C::PEXTRW_VdqEdIb(bxInstruction_c *i) +void BX_CPU_C::PEXTRW_GdVRdqIb(bxInstruction_c *i) { #if BX_SUPPORT_SSE >= 2 BX_CPU_THIS_PTR prepareSSE(); @@ -376,7 +376,7 @@ void BX_CPU_C::PEXTRW_VdqEdIb(bxInstruction_c *i) BX_WRITE_32BIT_REGZ(i->nnn(), result); #else - BX_INFO(("PEXTRW_VdqEdIb: required SSE2, use --enable-sse option")); + BX_INFO(("PEXTRW_GdVRdqIb: required SSE2, use --enable-sse option")); UndefinedOpcode(i); #endif } diff --git a/bochs/cpu/sse_move.cc b/bochs/cpu/sse_move.cc index 52d14bafa..6b7dfdcdf 100644 --- a/bochs/cpu/sse_move.cc +++ b/bochs/cpu/sse_move.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: sse_move.cc,v 1.44 2005-09-12 18:08:35 sshwarts Exp $ +// $Id: sse_move.cc,v 1.45 2005-09-23 16:45:41 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (c) 2003 Stanislav Shwartsman @@ -800,7 +800,7 @@ void BX_CPU_C::MOVMSKPS_GdVRps(bxInstruction_c *i) } /* 66 0F 50 */ -void BX_CPU_C::MOVMSKPD_EdVRpd(bxInstruction_c *i) +void BX_CPU_C::MOVMSKPD_GdVRpd(bxInstruction_c *i) { #if BX_SUPPORT_SSE >= 2 BX_CPU_THIS_PTR prepareSSE(); @@ -813,7 +813,7 @@ void BX_CPU_C::MOVMSKPD_EdVRpd(bxInstruction_c *i) BX_WRITE_32BIT_REGZ(i->rm(), val32); #else - BX_INFO(("MOVMSKPD_EdVRpd: required SSE2, use --enable-sse option")); + BX_INFO(("MOVMSKPD_GdVRpd: required SSE2, use --enable-sse option")); UndefinedOpcode(i); #endif } diff --git a/bochs/cpu/sse_pfp.cc b/bochs/cpu/sse_pfp.cc index 76a62838f..85c42be9a 100644 --- a/bochs/cpu/sse_pfp.cc +++ b/bochs/cpu/sse_pfp.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: sse_pfp.cc,v 1.21 2005-05-12 18:07:44 sshwarts Exp $ +// $Id: sse_pfp.cc,v 1.22 2005-09-23 16:45:41 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (c) 2003 Stanislav Shwartsman @@ -125,7 +125,7 @@ void BX_CPU_C::CVTPI2PS_VpsQq(bxInstruction_c *i) * Convert two 32bit signed integers from MMX/MEM to two double precision FP * Possible floating point exceptions: - */ -void BX_CPU_C::CVTPI2PD_VpdQd(bxInstruction_c *i) +void BX_CPU_C::CVTPI2PD_VpdQq(bxInstruction_c *i) { #if BX_SUPPORT_SSE >= 2 BX_CPU_THIS_PTR prepareSSE(); diff --git a/bochs/disasm/dis_tables.h b/bochs/disasm/dis_tables.h index 858b302e9..07392d6be 100755 --- a/bochs/disasm/dis_tables.h +++ b/bochs/disasm/dis_tables.h @@ -254,7 +254,7 @@ static BxDisasmOpcodeInfo_t BxDisasmGroupSSE_0f29[4] = { static BxDisasmOpcodeInfo_t BxDisasmGroupSSE_0f2a[4] = { /* -- */ { "cvtpi2ps", 0, Vps, Qq, XX }, - /* 66 */ { "cvtpi2pd", 0, Vpd, Qd, XX }, + /* 66 */ { "cvtpi2pd", 0, Vpd, Qq, XX }, /* F2 */ { "cvtsi2sd", 0, Vsd, Ed, XX }, /* F3 */ { "cvtsi2ss", 0, Vss, Ed, XX } }; @@ -296,7 +296,7 @@ static BxDisasmOpcodeInfo_t BxDisasmGroupSSE_0f2f[4] = { static BxDisasmOpcodeInfo_t BxDisasmGroupSSE_0f50[4] = { /* -- */ { "movmskps", 0, Gd, Vps, XX }, - /* 66 */ { "movmskpd", 0, Ed, Vpd, XX }, + /* 66 */ { "movmskpd", 0, Gd, Vpd, XX }, /* F2 */ { INVALID }, /* F3 */ { INVALID } }; @@ -596,8 +596,8 @@ static BxDisasmOpcodeInfo_t BxDisasmGroupSSE_0fc4[4] = { }; static BxDisasmOpcodeInfo_t BxDisasmGroupSSE_0fc5[4] = { - /* -- */ { "pextrw", 0, Pq, Ed, Ib }, - /* 66 */ { "pextrw", 0, Vdq, Ed, Ib }, + /* -- */ { "pextrw", 0, Gd, Pq, Ib }, + /* 66 */ { "pextrw", 0, Gd, Vdq, Ib }, /* F2 */ { INVALID }, /* F3 */ { INVALID } };