optimization
This commit is contained in:
Stanislav Shwartsman
parent
78badcbde4
commit
d0bd30e4b9
@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: cpu.h,v 1.655 2010-03-17 21:55:18 sshwarts Exp $
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// $Id: cpu.h,v 1.656 2010-03-18 15:19:16 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001-2009 The Bochs Project
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@ -977,9 +977,6 @@ public: // for now...
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jmp_buf jmp_buf_env;
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Bit8u curr_exception;
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bx_address save_eip;
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bx_address save_esp;
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// Boundaries of current page, based on EIP
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bx_address eipPageBias;
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Bit32u eipPageWindowSize;
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: exception.cc,v 1.153 2010-03-17 21:55:18 sshwarts Exp $
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// $Id: exception.cc,v 1.154 2010-03-18 15:19:16 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001-2009 The Bochs Project
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@ -354,6 +354,8 @@ void BX_CPU_C::protected_mode_int(Bit8u vector, unsigned soft_int, bx_bool push_
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task_switch(0, &tss_selector, &tss_descriptor,
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BX_TASK_FROM_INT, dword1, dword2);
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RSP_SPECULATIVE;
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// if interrupt was caused by fault with error code
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// stack limits must allow push of 2 more bytes, else #SS(0)
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// push error code onto stack
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@ -371,6 +373,8 @@ void BX_CPU_C::protected_mode_int(Bit8u vector, unsigned soft_int, bx_bool push_
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exception(BX_GP_EXCEPTION, 0);
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}
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RSP_COMMIT;
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return;
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case BX_286_INTERRUPT_GATE:
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@ -780,9 +784,6 @@ void BX_CPU_C::interrupt(Bit8u vector, unsigned type, bx_bool push_error, Bit16u
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BX_CPU_THIS_PTR debug_trap = 0;
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BX_CPU_THIS_PTR inhibit_mask = 0;
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BX_CPU_THIS_PTR save_eip = RIP;
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BX_CPU_THIS_PTR save_esp = RSP;
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#if BX_SUPPORT_VMX
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BX_CPU_THIS_PTR in_event = 1;
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#endif
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@ -794,12 +795,16 @@ void BX_CPU_C::interrupt(Bit8u vector, unsigned type, bx_bool push_error, Bit16u
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else
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#endif
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{
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RSP_SPECULATIVE;
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if(real_mode()) {
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real_mode_int(vector, push_error, error_code);
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}
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else {
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protected_mode_int(vector, soft_int, push_error, error_code);
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}
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RSP_COMMIT;
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}
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#if BX_X86_DEBUGGER
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@ -891,11 +896,6 @@ void BX_CPU_C::exception(unsigned vector, Bit16u error_code)
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#endif
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if (BX_CPU_THIS_PTR errorno > 0) {
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// if not initial error, restore previous register values from
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// previous attempt to handle exception
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RIP = BX_CPU_THIS_PTR save_eip;
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RSP = BX_CPU_THIS_PTR save_esp;
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if (BX_CPU_THIS_PTR errorno > 2 || BX_CPU_THIS_PTR curr_exception == BX_ET_DOUBLE_FAULT) {
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debug(BX_CPU_THIS_PTR prev_rip); // print debug information to the log
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#if BX_SUPPORT_VMX
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: soft_int.cc,v 1.59 2010-03-15 13:22:14 sshwarts Exp $
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// $Id: soft_int.cc,v 1.60 2010-03-18 15:19:16 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001-2009 The Bochs Project
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@ -73,13 +73,9 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::INT1(bxInstruction_c *i)
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BX_CPU_THIS_PTR EXT = 1;
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RSP_SPECULATIVE;
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// interrupt is not RSP safe
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interrupt(1, BX_PRIVILEGED_SOFTWARE_INTERRUPT, 0, 0);
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RSP_COMMIT;
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BX_CPU_THIS_PTR EXT = 0;
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BX_INSTR_FAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_INT,
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@ -99,13 +95,9 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::INT3(bxInstruction_c *i)
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BX_CPU_THIS_PTR show_flag |= Flag_softint;
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#endif
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RSP_SPECULATIVE;
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// interrupt is not RSP safe
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interrupt(3, BX_SOFTWARE_EXCEPTION, 0, 0);
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RSP_COMMIT;
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BX_INSTR_FAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_INT,
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value,
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EIP);
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@ -160,13 +152,9 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::INTO(bxInstruction_c *i)
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BX_CPU_THIS_PTR show_flag |= Flag_softint;
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#endif
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RSP_SPECULATIVE;
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// interrupt is not RSP safe
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interrupt(4, BX_SOFTWARE_EXCEPTION, 0, 0);
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RSP_COMMIT;
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BX_INSTR_FAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_INT,
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value,
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EIP);
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: tasking.cc,v 1.85 2010-03-14 15:51:27 sshwarts Exp $
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// $Id: tasking.cc,v 1.86 2010-03-18 15:19:16 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001-2009 The Bochs Project
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@ -435,9 +435,6 @@ void BX_CPU_C::task_switch(bxInstruction_c *i, bx_selector_t *tss_selector,
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BX_CPU_THIS_PTR speculative_rsp = 0;
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BX_CPU_THIS_PTR save_eip = EIP;
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BX_CPU_THIS_PTR save_esp = ESP;
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writeEFlags(newEFLAGS, EFlagsValidMask);
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// Fill in selectors for all segment registers. If errors
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