diff --git a/bochs/cpu/cpu.h b/bochs/cpu/cpu.h
index ee2ddd33c..5fae0722d 100644
--- a/bochs/cpu/cpu.h
+++ b/bochs/cpu/cpu.h
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: cpu.h,v 1.552 2009-01-16 18:18:58 sshwarts Exp $
+// $Id: cpu.h,v 1.553 2009-01-17 18:56:25 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -3149,7 +3149,6 @@ public: // for now...
   BX_SMF void    set_ar_byte(bx_descriptor_t *d, Bit8u ar_byte) BX_CPP_AttrRegparmN(2);
   BX_SMF Bit32u  get_descriptor_l(const bx_descriptor_t *) BX_CPP_AttrRegparmN(1);
   BX_SMF Bit32u  get_descriptor_h(const bx_descriptor_t *) BX_CPP_AttrRegparmN(1);
-  BX_SMF Bit16u  get_segment_ar_data(const bx_descriptor_t *d) BX_CPP_AttrRegparmN(1);
   BX_SMF bx_bool set_segment_ar_data(bx_segment_reg_t *seg, bx_bool valid, Bit16u raw_selector,
                          bx_address base, Bit32u limit_scaled, Bit16u ar_data);
   BX_SMF void    check_cs(bx_descriptor_t *descriptor, Bit16u cs_raw, Bit8u check_rpl, Bit8u check_cpl);
diff --git a/bochs/cpu/segment_ctrl_pro.cc b/bochs/cpu/segment_ctrl_pro.cc
index 218609b84..6a6123e07 100644
--- a/bochs/cpu/segment_ctrl_pro.cc
+++ b/bochs/cpu/segment_ctrl_pro.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: segment_ctrl_pro.cc,v 1.106 2009-01-16 18:18:58 sshwarts Exp $
+// $Id: segment_ctrl_pro.cc,v 1.107 2009-01-17 18:56:25 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -322,9 +322,7 @@ BX_CPU_C::parse_selector(Bit16u raw_selector, bx_selector_t *selector)
   Bit8u  BX_CPP_AttrRegparmN(1)
 BX_CPU_C::ar_byte(const bx_descriptor_t *d)
 {
-  if (d->valid == 0) {
-    return(0);
-  }
+  if (d->valid == 0) return(0);
 
   return (d->type) |
          (d->segment << 4) |
@@ -346,9 +344,7 @@ BX_CPU_C::get_descriptor_l(const bx_descriptor_t *d)
 {
   Bit32u val;
 
-  if (d->valid == 0) {
-    return(0);
-  }
+//if (d->valid == 0) return(0);
 
   if (d->segment) {
     val = ((d->u.segment.base & 0xffff) << 16) | (d->u.segment.limit & 0xffff);
@@ -369,7 +365,7 @@ BX_CPU_C::get_descriptor_l(const bx_descriptor_t *d)
         return(val);
 
       default:
-        BX_PANIC(("#get_descriptor_l(): type %d not finished", d->type));
+        BX_ERROR(("#get_descriptor_l(): type %d not finished", d->type));
         return(0);
     }
   }
@@ -380,9 +376,7 @@ BX_CPU_C::get_descriptor_h(const bx_descriptor_t *d)
 {
   Bit32u val;
 
-  if (d->valid == 0) {
-    return(0);
-  }
+//if (d->valid == 0) return(0);
 
   if (d->segment) {
     val = (d->u.segment.base & 0xff000000) |
@@ -425,55 +419,13 @@ BX_CPU_C::get_descriptor_h(const bx_descriptor_t *d)
         return(val);
 
       default:
-        BX_PANIC(("#get_descriptor_h(): type %d not finished", d->type));
+        BX_ERROR(("#get_descriptor_h(): type %d not finished", d->type));
         return(0);
     }
   }
 }
 
 #if BX_CPU_LEVEL >= 3
-  Bit16u BX_CPP_AttrRegparmN(1)
-BX_CPU_C::get_segment_ar_data(const bx_descriptor_t *d)
-{
-  Bit16u val = 0;
-
-  if (d->segment) { /* data/code segment descriptors */
-    val = (d->type) |
-          (d->segment << 4) |
-          (d->dpl << 5) |
-          (d->p << 7) |
-          (d->u.segment.avl << 12) |
-#if BX_SUPPORT_X86_64
-          (d->u.segment.l << 13) |
-#endif
-          (d->u.segment.d_b << 14) |
-          (d->u.segment.g << 15);
-
-    return val;
-  }
-
-  switch (d->type) {
-    case BX_SYS_SEGMENT_AVAIL_286_TSS:
-    case BX_SYS_SEGMENT_BUSY_286_TSS:
-        BX_ASSERT(d->u.system.g   == 0);
-        BX_ASSERT(d->u.system.avl == 0);
-        // fall through
-    case BX_SYS_SEGMENT_LDT:
-    case BX_SYS_SEGMENT_AVAIL_386_TSS:
-    case BX_SYS_SEGMENT_BUSY_386_TSS:
-        val = (d->type) |
-              (d->dpl << 5) |
-              (d->p << 7) |
-              (d->u.system.avl << 12) |
-              (d->u.system.g << 15);
-        break;
-    default:
-        BX_PANIC(("get_segment_ar_data(): case %u unsupported", (unsigned) d->type));
-  }
-
-  return val;
-}
-
 bx_bool BX_CPU_C::set_segment_ar_data(bx_segment_reg_t *seg, bx_bool valid,
             Bit16u raw_selector, bx_address base, Bit32u limit_scaled, Bit16u ar_data)
 {
diff --git a/bochs/cpu/smm.cc b/bochs/cpu/smm.cc
index 11c19f3d0..8f1ec2587 100755
--- a/bochs/cpu/smm.cc
+++ b/bochs/cpu/smm.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: smm.cc,v 1.51 2009-01-16 18:18:58 sshwarts Exp $
+// $Id: smm.cc,v 1.52 2009-01-17 18:56:25 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //   Copyright (c) 2006 Stanislav Shwartsman
@@ -270,7 +270,7 @@ void BX_CPU_C::smram_save_state(Bit32u *saved_state)
   SMRAM_FIELD(saved_state, SMRAM_TR_BASE_HI32) = (Bit32u)(BX_CPU_THIS_PTR tr.cache.u.system.base >> 32);
   SMRAM_FIELD(saved_state, SMRAM_TR_BASE_LO32) = (Bit32u)(BX_CPU_THIS_PTR tr.cache.u.system.base & 0xffffffff);
   SMRAM_FIELD(saved_state, SMRAM_TR_LIMIT) = BX_CPU_THIS_PTR tr.cache.u.system.limit_scaled;
-  Bit32u tr_ar = get_segment_ar_data(&BX_CPU_THIS_PTR tr.cache) | (BX_CPU_THIS_PTR tr.cache.valid << 8);
+  Bit32u tr_ar = ((get_descriptor_h(&BX_CPU_THIS_PTR tr.cache) >> 8) & 0xffff) | (BX_CPU_THIS_PTR tr.cache.valid << 8);
   SMRAM_FIELD(saved_state, SMRAM_TR_SELECTOR_AR) = BX_CPU_THIS_PTR tr.selector.value | (tr_ar << 16);
 
   // --- IDTR --- //
@@ -281,7 +281,7 @@ void BX_CPU_C::smram_save_state(Bit32u *saved_state)
   SMRAM_FIELD(saved_state, SMRAM_LDTR_BASE_HI32) = (Bit32u)(BX_CPU_THIS_PTR ldtr.cache.u.system.base >> 32);
   SMRAM_FIELD(saved_state, SMRAM_LDTR_BASE_LO32) = (Bit32u)(BX_CPU_THIS_PTR ldtr.cache.u.system.base & 0xffffffff);
   SMRAM_FIELD(saved_state, SMRAM_LDTR_LIMIT) = BX_CPU_THIS_PTR ldtr.cache.u.system.limit_scaled;
-  Bit32u ldtr_ar = get_segment_ar_data(&BX_CPU_THIS_PTR ldtr.cache) | (BX_CPU_THIS_PTR ldtr.cache.valid << 8);
+  Bit32u ldtr_ar = ((get_descriptor_h(&BX_CPU_THIS_PTR ldtr.cache) >> 8) & 0xffff) | (BX_CPU_THIS_PTR ldtr.cache.valid << 8);
   SMRAM_FIELD(saved_state, SMRAM_LDTR_SELECTOR_AR) = BX_CPU_THIS_PTR ldtr.selector.value | (ldtr_ar << 16);
   // --- GDTR --- //
   SMRAM_FIELD(saved_state, SMRAM_GDTR_BASE_HI32) = (Bit32u)(BX_CPU_THIS_PTR gdtr.base >> 32);
@@ -292,42 +292,42 @@ void BX_CPU_C::smram_save_state(Bit32u *saved_state)
   SMRAM_FIELD(saved_state, SMRAM_GS_BASE_HI32) = (Bit32u)(seg->cache.u.segment.base >> 32);
   SMRAM_FIELD(saved_state, SMRAM_GS_BASE_LO32) = (Bit32u)(seg->cache.u.segment.base & 0xffffffff);
   SMRAM_FIELD(saved_state, SMRAM_GS_LIMIT) = seg->cache.u.segment.limit_scaled;
-  Bit32u seg_ar = get_segment_ar_data(&seg->cache) | (seg->cache.valid << 8);
+  Bit32u seg_ar = ((get_descriptor_h(&seg->cache) >> 8) & 0xffff) | (seg->cache.valid << 8);
   SMRAM_FIELD(saved_state, SMRAM_GS_SELECTOR_AR) = seg->selector.value | (seg_ar << 16);
   // --- FS selector --- //
   seg = &(BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS]);
   SMRAM_FIELD(saved_state, SMRAM_FS_BASE_HI32) = (Bit32u)(seg->cache.u.segment.base >> 32);
   SMRAM_FIELD(saved_state, SMRAM_FS_BASE_LO32) = (Bit32u)(seg->cache.u.segment.base & 0xffffffff);
   SMRAM_FIELD(saved_state, SMRAM_FS_LIMIT) = seg->cache.u.segment.limit_scaled;
-  seg_ar = get_segment_ar_data(&seg->cache) | (seg->cache.valid << 8);
+  seg_ar = ((get_descriptor_h(&seg->cache) >> 8) & 0xffff) | (seg->cache.valid << 8);
   SMRAM_FIELD(saved_state, SMRAM_FS_SELECTOR_AR) = seg->selector.value | (seg_ar << 16);
   // --- DS selector --- //
   seg = &(BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS]);
   SMRAM_FIELD(saved_state, SMRAM_DS_BASE_HI32) = (Bit32u)(seg->cache.u.segment.base >> 32);
   SMRAM_FIELD(saved_state, SMRAM_DS_BASE_LO32) = (Bit32u)(seg->cache.u.segment.base & 0xffffffff);
   SMRAM_FIELD(saved_state, SMRAM_DS_LIMIT) = seg->cache.u.segment.limit_scaled;
-  seg_ar = get_segment_ar_data(&seg->cache) | (seg->cache.valid << 8);
+  seg_ar = ((get_descriptor_h(&seg->cache) >> 8) & 0xffff) | (seg->cache.valid << 8);
   SMRAM_FIELD(saved_state, SMRAM_DS_SELECTOR_AR) = seg->selector.value | (seg_ar << 16);
   // --- SS selector --- //
   seg = &(BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS]);
   SMRAM_FIELD(saved_state, SMRAM_SS_BASE_HI32) = (Bit32u)(seg->cache.u.segment.base >> 32);
   SMRAM_FIELD(saved_state, SMRAM_SS_BASE_LO32) = (Bit32u)(seg->cache.u.segment.base & 0xffffffff);
   SMRAM_FIELD(saved_state, SMRAM_SS_LIMIT) = seg->cache.u.segment.limit_scaled;
-  seg_ar = get_segment_ar_data(&seg->cache) | (seg->cache.valid << 8);
+  seg_ar = ((get_descriptor_h(&seg->cache) >> 8) & 0xffff) | (seg->cache.valid << 8);
   SMRAM_FIELD(saved_state, SMRAM_SS_SELECTOR_AR) = seg->selector.value | (seg_ar << 16);
   // --- CS selector --- //
   seg = &(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS]);
   SMRAM_FIELD(saved_state, SMRAM_CS_BASE_HI32) = (Bit32u)(seg->cache.u.segment.base >> 32);
   SMRAM_FIELD(saved_state, SMRAM_CS_BASE_LO32) = (Bit32u)(seg->cache.u.segment.base & 0xffffffff);
   SMRAM_FIELD(saved_state, SMRAM_CS_LIMIT) = seg->cache.u.segment.limit_scaled;
-  seg_ar = get_segment_ar_data(&seg->cache) | (seg->cache.valid << 8);
+  seg_ar = ((get_descriptor_h(&seg->cache) >> 8) & 0xffff) | (seg->cache.valid << 8);
   SMRAM_FIELD(saved_state, SMRAM_CS_SELECTOR_AR) = seg->selector.value | (seg_ar << 16);
   // --- ES selector --- //
   seg = &(BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES]);
   SMRAM_FIELD(saved_state, SMRAM_ES_BASE_HI32) = (Bit32u)(seg->cache.u.segment.base >> 32);
   SMRAM_FIELD(saved_state, SMRAM_ES_BASE_LO32) = (Bit32u)(seg->cache.u.segment.base & 0xffffffff);
   SMRAM_FIELD(saved_state, SMRAM_ES_LIMIT) = seg->cache.u.segment.limit_scaled;
-  seg_ar = get_segment_ar_data(&seg->cache) | (seg->cache.valid << 8);
+  seg_ar = ((get_descriptor_h(&seg->cache) >> 8) & 0xffff) | (seg->cache.valid << 8);
   SMRAM_FIELD(saved_state, SMRAM_ES_SELECTOR_AR) = seg->selector.value | (seg_ar << 16);
 }
 
@@ -577,24 +577,24 @@ void BX_CPU_C::smram_save_state(Bit32u *saved_state)
   bx_segment_reg_t *seg = &(BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS]);
   SMRAM_FIELD(saved_state, SMRAM_SS_BASE) = seg->cache.u.segment.base;
   SMRAM_FIELD(saved_state, SMRAM_SS_LIMIT) = seg->cache.u.segment.limit_scaled;
-  Bit32u seg_ar = get_segment_ar_data(&seg->cache) | (seg->cache.valid << 8);
+  Bit32u seg_ar = ((get_descriptor_h(&seg->cache) >> 8) & 0xffff) | (seg->cache.valid << 8);
   SMRAM_FIELD(saved_state, SMRAM_SS_SELECTOR_AR) = seg->selector.value | (seg_ar << 16);
   // --- CS selector --- //
   seg = &(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS]);
   SMRAM_FIELD(saved_state, SMRAM_CS_BASE) = seg->cache.u.segment.base;
   SMRAM_FIELD(saved_state, SMRAM_CS_LIMIT) = seg->cache.u.segment.limit_scaled;
-  seg_ar = get_segment_ar_data(&seg->cache) | (seg->cache.valid << 8);
+  seg_ar = ((get_descriptor_h(&seg->cache) >> 8) & 0xffff) | (seg->cache.valid << 8);
   SMRAM_FIELD(saved_state, SMRAM_CS_SELECTOR_AR) = seg->selector.value | (seg_ar << 16);
   // --- ES selector --- //
   seg = &(BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES]);
   SMRAM_FIELD(saved_state, SMRAM_ES_BASE) = seg->cache.u.segment.base;
   SMRAM_FIELD(saved_state, SMRAM_ES_LIMIT) = seg->cache.u.segment.limit_scaled;
-  seg_ar = get_segment_ar_data(&seg->cache) | (seg->cache.valid << 8);
+  seg_ar = ((get_descriptor_h(&seg->cache) >> 8) & 0xffff) | (seg->cache.valid << 8);
   SMRAM_FIELD(saved_state, SMRAM_ES_SELECTOR_AR) = seg->selector.value | (seg_ar << 16);
   // --- LDTR --- //
   SMRAM_FIELD(saved_state, SMRAM_LDTR_BASE) = BX_CPU_THIS_PTR ldtr.cache.u.system.base;
   SMRAM_FIELD(saved_state, SMRAM_LDTR_LIMIT) = BX_CPU_THIS_PTR ldtr.cache.u.system.limit_scaled;
-  Bit32u ldtr_ar = get_segment_ar_data(&BX_CPU_THIS_PTR ldtr.cache) | (BX_CPU_THIS_PTR ldtr.cache.valid << 8);
+  Bit32u ldtr_ar = ((get_descriptor_h(&BX_CPU_THIS_PTR ldtr.cache) >> 8) & 0xffff) | (BX_CPU_THIS_PTR ldtr.cache.valid << 8);
   SMRAM_FIELD(saved_state, SMRAM_LDTR_SELECTOR_AR) = BX_CPU_THIS_PTR ldtr.selector.value | (ldtr_ar << 16);
   // --- GDTR --- //
   SMRAM_FIELD(saved_state, SMRAM_GDTR_BASE) = BX_CPU_THIS_PTR gdtr.base;
@@ -605,7 +605,7 @@ void BX_CPU_C::smram_save_state(Bit32u *saved_state)
   // --- Task Register --- //
   SMRAM_FIELD(saved_state, SMRAM_TR_BASE) = BX_CPU_THIS_PTR tr.cache.u.system.base;
   SMRAM_FIELD(saved_state, SMRAM_TR_LIMIT) = BX_CPU_THIS_PTR tr.cache.u.system.limit_scaled;
-  Bit32u tr_ar = get_segment_ar_data(&BX_CPU_THIS_PTR tr.cache) | (BX_CPU_THIS_PTR tr.cache.valid << 8);
+  Bit32u tr_ar = ((get_descriptor_h(&BX_CPU_THIS_PTR tr.cache) >> 8) & 0xffff) | (BX_CPU_THIS_PTR tr.cache.valid << 8);
   SMRAM_FIELD(saved_state, SMRAM_TR_SELECTOR_AR) = BX_CPU_THIS_PTR tr.selector.value | (tr_ar << 16);
 
   // --- IDTR --- //
@@ -616,19 +616,19 @@ void BX_CPU_C::smram_save_state(Bit32u *saved_state)
   seg = &(BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS]);
   SMRAM_FIELD(saved_state, SMRAM_GS_BASE) = seg->cache.u.segment.base;
   SMRAM_FIELD(saved_state, SMRAM_GS_LIMIT) = seg->cache.u.segment.limit_scaled;
-  seg_ar = get_segment_ar_data(&seg->cache) | (seg->cache.valid << 8);
+  seg_ar = ((get_descriptor_h(&seg->cache) >> 8) & 0xffff) | (seg->cache.valid << 8);
   SMRAM_FIELD(saved_state, SMRAM_GS_SELECTOR_AR) = seg->selector.value | (seg_ar << 16);
   // --- FS selector --- //
   seg = &(BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS]);
   SMRAM_FIELD(saved_state, SMRAM_FS_BASE) = seg->cache.u.segment.base;
   SMRAM_FIELD(saved_state, SMRAM_FS_LIMIT) = seg->cache.u.segment.limit_scaled;
-  seg_ar = get_segment_ar_data(&seg->cache) | (seg->cache.valid << 8);
+  seg_ar = ((get_descriptor_h(&seg->cache) >> 8) & 0xffff) | (seg->cache.valid << 8);
   SMRAM_FIELD(saved_state, SMRAM_FS_SELECTOR_AR) = seg->selector.value | (seg_ar << 16);
   // --- DS selector --- //
   seg = &(BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS]);
   SMRAM_FIELD(saved_state, SMRAM_DS_BASE) = seg->cache.u.segment.base;
   SMRAM_FIELD(saved_state, SMRAM_DS_LIMIT) = seg->cache.u.segment.limit_scaled;
-  seg_ar = get_segment_ar_data(&seg->cache) | (seg->cache.valid << 8);
+  seg_ar = ((get_descriptor_h(&seg->cache) >> 8) & 0xffff) | (seg->cache.valid << 8);
   SMRAM_FIELD(saved_state, SMRAM_DS_SELECTOR_AR) = seg->selector.value | (seg_ar << 16);
 
   /* base+0x7f28 to base+7f18 is reserved */