From cc4a068d7ba3f728889355040a0fd6850deeb186 Mon Sep 17 00:00:00 2001
From: Stanislav Shwartsman <sshwarts@users.sourceforge.net>
Date: Fri, 21 Dec 2007 21:14:48 +0000
Subject: [PATCH] VM8086 is always ON'

---
 bochs/cpu/vm8086.cc | 41 ++++++++---------------------------------
 1 file changed, 8 insertions(+), 33 deletions(-)

diff --git a/bochs/cpu/vm8086.cc b/bochs/cpu/vm8086.cc
index aa44d1153..49af3a60f 100644
--- a/bochs/cpu/vm8086.cc
+++ b/bochs/cpu/vm8086.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: vm8086.cc,v 1.34 2007-12-20 20:58:38 sshwarts Exp $
+// $Id: vm8086.cc,v 1.35 2007-12-21 21:14:48 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -31,13 +31,7 @@
 #include "cpu.h"
 #define LOG_THIS BX_CPU_THIS_PTR
 
-#if BX_SUPPORT_X86_64==0
-// Make life easier for merging 64&32-bit code.
-#define RIP EIP
-#define RSP ESP
-#endif
-
-
+//
 // Notes:
 //
 // The high bits of the 32bit eip image are ignored by
@@ -49,9 +43,7 @@
 // eIP out of code limits.
 //
 // IRET to VM does affect IOPL, IF, VM, and RF
-
-
-#if BX_SUPPORT_V8086_MODE
+//
 
 #if BX_CPU_LEVEL >= 3
 
@@ -111,7 +103,7 @@ void BX_CPU_C::stack_return_to_v86(Bit32u new_eip, Bit32u raw_cs_selector,
   BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.value = raw_fs_selector;
   BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.value = raw_gs_selector;
   BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.value = raw_ss_selector;
-  RSP = new_esp;	// full 32 bit are loaded
+  ESP = new_esp;	// full 32 bit are loaded
 
   init_v8086_mode();
 }
@@ -147,7 +139,7 @@ void BX_CPU_C::iret16_stack_return_from_v86(bxInstruction_c *i)
     }
 
     load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], cs_raw);
-    RIP = (Bit32u) ip;
+    EIP = (Bit32u) ip;
 
     // IF, IOPL unchanged, EFLAGS.VIF = TMP_FLAGS.IF
     Bit32u changeMask = EFlagsOSZAPCMask | EFlagsTFMask | 
@@ -161,7 +153,7 @@ void BX_CPU_C::iret16_stack_return_from_v86(bxInstruction_c *i)
 #endif
 
   load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], cs_raw);
-  RIP = (Bit32u) ip;
+  EIP = (Bit32u) ip;
   write_flags(flags16, /*IOPL*/ 0, /*IF*/ 1);
 }
 
@@ -194,7 +186,7 @@ void BX_CPU_C::iret32_stack_return_from_v86(bxInstruction_c *i)
   flags32 = pop_32();
 
   load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], (Bit16u) cs_raw);
-  RIP = eip;
+  EIP = eip;
   // VIF, VIP, VM, IOPL unchanged
   writeEFlags(flags32, change_mask);
 }
@@ -224,7 +216,7 @@ void BX_CPU_C::v86_redirect_interrupt(Bit32u vector)
   push_16(old_IP);
 
   load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], (Bit16u) temp_CS);
-  RIP = temp_IP;
+  EIP = temp_IP;
 
   BX_CPU_THIS_PTR clear_TF();
   BX_CPU_THIS_PTR clear_RF();
@@ -260,7 +252,6 @@ void BX_CPU_C::init_v8086_mode(void)
   handleAlignmentCheck(); // CPL was modified
 #endif
 
-
   BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.valid   = 1;
   BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.p       = 1;
   BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.dpl     = 3;
@@ -333,19 +324,3 @@ void BX_CPU_C::init_v8086_mode(void)
 }
 
 #endif /* BX_CPU_LEVEL >= 3 */
-
-#else  // BX_SUPPORT_V8086_MODE
-
-// compiled without v8086 mode support
-
-void BX_CPU_C::stack_return_to_v86(Bit32u new_eip, Bit32u raw_cs_selector, Bit32u flags32)
-{
-  BX_PANIC(("stack_return_to_v86: virtual 8086 mode not supported !"));
-}
-
-void BX_CPU_C::stack_return_from_v86(void)
-{
-  BX_PANIC(("stack_return_from_v86: virtual 8086 mode not supported !"));
-}
-
-#endif // BX_SUPPORT_V8086_MODE