diff --git a/bochs/disasm/dis_tables.inc b/bochs/disasm/dis_tables.inc index ec757ff1a..d78d2fac8 100755 --- a/bochs/disasm/dis_tables.inc +++ b/bochs/disasm/dis_tables.inc @@ -3819,9 +3819,9 @@ static BxDisasmOpcodeTable_t BxDisasmOpcodes64w[256*2] = { /* 0F 1E */ { 0, &Ia_Invalid }, /* 0F 1F */ { 0, &Ia_multibyte_nop }, /* 0F 20 */ { 0, &Ia_movq_Rq_Cq }, - /* 0F 21 */ { 0, &Ia_movl_Rd_Dd }, + /* 0F 21 */ { 0, &Ia_movq_Rq_Dq }, /* 0F 22 */ { 0, &Ia_movq_Cq_Rq }, - /* 0F 23 */ { 0, &Ia_movl_Dd_Rd }, + /* 0F 23 */ { 0, &Ia_movq_Dq_Rq }, /* 0F 24 */ { 0, &Ia_Invalid }, /* 0F 25 */ { 0, &Ia_Invalid }, /* 0F 26 */ { 0, &Ia_Invalid }, @@ -4337,9 +4337,9 @@ static BxDisasmOpcodeTable_t BxDisasmOpcodes64d[256*2] = { /* 0F 1E */ { 0, &Ia_Invalid }, /* 0F 1F */ { 0, &Ia_multibyte_nop }, /* 0F 20 */ { 0, &Ia_movq_Rq_Cq }, - /* 0F 21 */ { 0, &Ia_movl_Rd_Dd }, + /* 0F 21 */ { 0, &Ia_movq_Rq_Dq }, /* 0F 22 */ { 0, &Ia_movq_Cq_Rq }, - /* 0F 23 */ { 0, &Ia_movl_Dd_Rd }, + /* 0F 23 */ { 0, &Ia_movq_Dq_Rq }, /* 0F 24 */ { 0, &Ia_Invalid }, /* 0F 25 */ { 0, &Ia_Invalid }, /* 0F 26 */ { 0, &Ia_Invalid }, diff --git a/bochs/disasm/resolve.cc b/bochs/disasm/resolve.cc index b18bea1a8..84a540de7 100755 --- a/bochs/disasm/resolve.cc +++ b/bochs/disasm/resolve.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: resolve.cc,v 1.11 2006-04-27 15:11:45 sshwarts Exp $ +// $Id: resolve.cc,v 1.12 2006-06-26 21:06:26 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// #include @@ -9,6 +9,8 @@ void disassembler::decode_modrm(x86_insn *insn) { insn->modrm = fetch_byte(); BX_DECODE_MODRM(insn->modrm, insn->mod, insn->nnn, insn->rm); + // MOVs with CRx and DRx always use register ops and ignore the mod field. + if ((insn->b1 & ~3) == 0x120) insn->mod = 3; insn->nnn |= insn->rex_r; if (insn->mod == 3) {