diff --git a/bochs/cpu/cpu.cc b/bochs/cpu/cpu.cc
index 43bd4eb87..fc9db6d7b 100644
--- a/bochs/cpu/cpu.cc
+++ b/bochs/cpu/cpu.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: cpu.cc,v 1.311 2010-04-19 11:09:35 sshwarts Exp $
+// $Id: cpu.cc,v 1.312 2010-04-20 06:14:55 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001-2009  The Bochs Project
@@ -107,7 +107,6 @@ void BX_CPU_C::cpu_loop(Bit32u max_instr_count)
   BX_CPU_THIS_PTR prev_rip = RIP; // commit new EIP
   BX_CPU_THIS_PTR speculative_rsp = 0;
   BX_CPU_THIS_PTR EXT = 0;
-  BX_CPU_THIS_PTR errorno = 0;
 
   while (1) {
 
@@ -589,7 +588,6 @@ unsigned BX_CPU_C::handleAsyncEvent(void)
     // it was a sofware interrupt instruction, and need to effect the
     // commit here.  This code mirrors similar code above.
     BX_CPU_THIS_PTR prev_rip = RIP; // commit new RIP
-    BX_CPU_THIS_PTR speculative_rsp = 0;
     BX_CPU_THIS_PTR EXT = 0;
   }
   else if (BX_HRQ && BX_DBG_ASYNC_DMA) {