diff --git a/bochs/iodev/devices.cc b/bochs/iodev/devices.cc
index cd7ce499b..b55122135 100644
--- a/bochs/iodev/devices.cc
+++ b/bochs/iodev/devices.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: devices.cc,v 1.95 2006-03-14 18:11:22 sshwarts Exp $
+// $Id: devices.cc,v 1.96 2006-03-26 22:15:05 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2002  MandrakeSoft S.A.
@@ -105,7 +105,7 @@ void bx_devices_c::init(BX_MEM_C *newmem)
 {
   unsigned i;
 
-  BX_DEBUG(("Init $Id: devices.cc,v 1.95 2006-03-14 18:11:22 sshwarts Exp $"));
+  BX_DEBUG(("Init $Id: devices.cc,v 1.96 2006-03-26 22:15:05 sshwarts Exp $"));
   mem = newmem;
 
   /* set no-default handlers, will be overwritten by the real default handler */
@@ -316,6 +316,7 @@ void bx_devices_c::init(BX_MEM_C *newmem)
 
 void bx_devices_c::reset(unsigned type)
 {
+  mem->disable_smram();
   pluginUnmapped->reset(type);
 #if BX_SUPPORT_PCI
   if (SIM->get_param_bool(BXPN_I440FX_SUPPORT)->get ()) {
diff --git a/bochs/iodev/pci.cc b/bochs/iodev/pci.cc
index 3517ba3f5..9bc8905b3 100644
--- a/bochs/iodev/pci.cc
+++ b/bochs/iodev/pci.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: pci.cc,v 1.46 2006-03-07 21:11:19 sshwarts Exp $
+// $Id: pci.cc,v 1.47 2006-03-26 22:15:06 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2002  MandrakeSoft S.A.
@@ -61,7 +61,6 @@ bx_pci_bridge_c::bx_pci_bridge_c()
 bx_pci_bridge_c::~bx_pci_bridge_c()
 {
   // nothing for now
-  BX_DEBUG(("Exit."));
 }
 
 void bx_pci_bridge_c::init(void)
@@ -146,6 +145,7 @@ bx_pci_bridge_c::reset(unsigned type)
   BX_PCI_THIS s.i440fx.pci_conf[0x58] = 0x10;
   for (i=0x59; i<0x60; i++)
     BX_PCI_THIS s.i440fx.pci_conf[i] = 0x00;
+  BX_PCI_THIS s.i440fx.pci_conf[0x72] = 0x02;
 }
 
 // static IO port read callback handler
@@ -291,6 +291,9 @@ void bx_pci_bridge_c::pci_write_handler(Bit8u address, Bit32u value, unsigned io
         case 0x06:
         case 0x0c:
           break;
+        case 0x72:
+          smram_control(value);  // SMRAM conrol register
+          break;
         default:
           BX_PCI_THIS s.i440fx.pci_conf[address+i] = value8;
           BX_DEBUG(("440FX PMC write register 0x%02x value 0x%02x", address+i, value8));
@@ -299,6 +302,62 @@ void bx_pci_bridge_c::pci_write_handler(Bit8u address, Bit32u value, unsigned io
   }
 }
 
+void bx_pci_bridge_c::smram_control(Bit8u value8)
+{
+  //
+  // From i440FX chipset manual:
+  //
+  // [7:7] Reserved.
+  // [6:6] SMM Space Open (DOPEN), when DOPEN=1 and DLCK=0, SMM space DRAM
+  //       became visible even CPU not indicte SMM mode access. This is
+  //       indended to help BIOS to initialize SMM space.
+  // [5:5] SMM Space Closed (DCLS), when DCLS=1, SMM space is not accessible
+  //       for data references, even if CPU indicates SMM mode access. Code
+  //       references may still access SMM space DRAM.
+  // [4:4] SMM Space Locked (DLCK), when DLCK=1, DOPEN is set to 0 and
+  //       both DLCK and DOPEN became R/O. DLCK can only be cleared by
+  //       a power-on reset.
+  // [3:3] SMRAM Enable (SMRAME)
+  // [2:0] SMM space base segment, program the location of SMM space
+  //       reserved.
+  //
+
+  // SMRAM space access cycles:
+
+  // | SMRAME | DLCK | DCLS | DOPEN | CPU_SMM |    | Code | Data |
+  // ------------------------------------------    ---------------
+  // |    0   |  X   |  X   |   X   |    X    | -> |  PCI |  PCI |
+  // |    1   |  0   |  X   |   0   |    0    | -> |  PCI |  PCI |
+  // |    1   |  0   |  0   |   0   |    1    | -> | DRAM | DRAM |
+  // |    1   |  0   |  0   |   1   |    X    | -> | DRAM | DRAM |
+  // |    1   |  1   |  0   |   X   |    1    | -> | DRAM | DRAM |
+  // |    1   |  0   |  1   |   0   |    1    | -> | DRAM |  PCI |
+  // |    1   |  0   |  1   |   1   |    X    | -> | ---- | ---- |
+  // |    1   |  1   |  X   |   X   |    0    | -> |  PCI |  PCI |
+  // |    1   |  1   |  1   |   X   |    1    | -> | DRAM |  PCI |
+  // ------------------------------------------    ---------------
+
+  value8 = (value8 & 0x78) | 0x2; // ignore reserved bits
+
+  if (BX_PCI_THIS s.i440fx.pci_conf[0x72] & 0x10)
+  {
+    value8 &= 0xbf; // set DOPEN=0, DLCK=1
+    value8 |= 0x10;
+  }
+
+  if ((value8 & 0x08) == 0) {
+    bx_devices.mem->disable_smram();
+  }
+  else {
+    bx_bool DOPEN = (value8 & 0x40) > 0, DCLS = (value8 & 0x20) > 0;
+    if(DOPEN && DCLS) BX_PANIC(("SMRAM control: DOPEN not mutually exclusive with DCLS !"));
+    bx_devices.mem->enable_smram(DOPEN, DCLS);
+  }
+
+  BX_INFO(("setting SMRAM control register to 0x%02x", value8));
+  BX_PCI_THIS s.i440fx.pci_conf[0x72] = value8;
+}               
+
 Bit8u bx_pci_bridge_c::rd_memType(Bit32u addr)
 {
    switch ((addr & 0xFC000) >> 12) {
diff --git a/bochs/iodev/pci.h b/bochs/iodev/pci.h
index cbb4626d6..93297f0b8 100644
--- a/bochs/iodev/pci.h
+++ b/bochs/iodev/pci.h
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: pci.h,v 1.24 2006-03-07 21:11:19 sshwarts Exp $
+// $Id: pci.h,v 1.25 2006-03-26 22:15:06 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2002  MandrakeSoft S.A.
@@ -90,6 +90,8 @@ private:
     bx_def440fx_t i440fx;
   } s;
 
+  void smram_control(Bit8u value);
+
   static Bit32u read_handler(void *this_ptr, Bit32u address, unsigned io_len);
   static void   write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len);
 #if !BX_USE_PCI_SMF
diff --git a/bochs/memory/memory.cc b/bochs/memory/memory.cc
index 73439c4dc..5c17c2bcd 100644
--- a/bochs/memory/memory.cc
+++ b/bochs/memory/memory.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: memory.cc,v 1.51 2006-03-26 18:58:01 sshwarts Exp $
+// $Id: memory.cc,v 1.52 2006-03-26 22:15:07 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -78,9 +78,10 @@ BX_MEM_C::writePhysicalPage(BX_CPU_C *cpu, Bit32u addr, unsigned len, void *data
     }
 #endif
 
-    if ((a20addr & 0xfffe0000) == 0x000a0000) {
-      // SMMRAM memory space
-      if (BX_MEM_THIS smram_enabled > 1 || cpu->smm_mode())
+    if ((a20addr & 0xfffe0000) == 0x000a0000 && (BX_MEM_THIS smram_available))
+    {
+      // SMRAM memory space
+      if (BX_MEM_THIS smram_enable || (cpu->smm_mode() && !BX_MEM_THIS smram_restricted))
         goto mem_write;
     }
   }
@@ -235,9 +236,10 @@ BX_MEM_C::readPhysicalPage(BX_CPU_C *cpu, Bit32u addr, unsigned len, void *data)
     }
 #endif
 
-    if ((a20addr & 0xfffe0000) == 0x000a0000) {
-      // SMMRAM memory space
-      if (BX_MEM_THIS smram_enabled > 1 || cpu->smm_mode())
+    if ((a20addr & 0xfffe0000) == 0x000a0000 && (BX_MEM_THIS smram_available))
+    {
+      // SMRAM memory space
+      if (BX_MEM_THIS smram_enable || (cpu->smm_mode() && !BX_MEM_THIS smram_restricted))
         goto mem_read;
     }
   }
diff --git a/bochs/memory/memory.h b/bochs/memory/memory.h
index 993cbca65..ee89fd97d 100644
--- a/bochs/memory/memory.h
+++ b/bochs/memory/memory.h
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: memory.h,v 1.34 2006-03-26 19:39:37 sshwarts Exp $
+// $Id: memory.h,v 1.35 2006-03-26 22:15:07 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -68,7 +68,9 @@ private:
   struct memory_handler_struct **memory_handlers;
   bx_bool rom_present[65];
   bx_bool pci_enabled;
-  unsigned smram_enabled;
+  bx_bool smram_available;
+  bx_bool smram_enable;
+  bx_bool smram_restricted;
   
 public:
   Bit8u   *actual_vector;
@@ -88,7 +90,7 @@ public:
  ~BX_MEM_C();
   BX_MEM_SMF void    alloc_vector_aligned (size_t bytes, size_t alignment) BX_CPP_AttrRegparmN(2);
   BX_MEM_SMF void    init_memory(int memsize);
-  BX_MEM_SMF void    enable_smram(bx_bool code_only);
+  BX_MEM_SMF void    enable_smram(bx_bool enable, bx_bool restricted);
   BX_MEM_SMF void    disable_smram(void);
   BX_MEM_SMF void    readPhysicalPage(BX_CPU_C *cpu, Bit32u addr,
                                       unsigned len, void *data) BX_CPP_AttrRegparmN(3);
diff --git a/bochs/memory/misc_mem.cc b/bochs/memory/misc_mem.cc
index 80b2d2c78..cec654f2f 100644
--- a/bochs/memory/misc_mem.cc
+++ b/bochs/memory/misc_mem.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: misc_mem.cc,v 1.84 2006-03-26 19:48:54 sshwarts Exp $
+// $Id: misc_mem.cc,v 1.85 2006-03-26 22:15:07 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2002  MandrakeSoft S.A.
@@ -94,7 +94,7 @@ void BX_MEM_C::init_memory(int memsize)
 {
   int idx;
 
-  BX_DEBUG(("Init $Id: misc_mem.cc,v 1.84 2006-03-26 19:48:54 sshwarts Exp $"));
+  BX_DEBUG(("Init $Id: misc_mem.cc,v 1.85 2006-03-26 22:15:07 sshwarts Exp $"));
   // you can pass 0 if memory has been allocated already through
   // the constructor, or the desired size of memory if it hasn't
 
@@ -115,7 +115,9 @@ void BX_MEM_C::init_memory(int memsize)
     BX_INFO(("%.2fMB", (float)(BX_MEM_THIS megabytes)));
   }
   BX_MEM_THIS pci_enabled = SIM->get_param_bool(BXPN_I440FX_SUPPORT)->get();
-  BX_MEM_THIS smram_enabled = 0;
+  BX_MEM_THIS smram_available = 0;
+  BX_MEM_THIS smram_enable = 0;
+  BX_MEM_THIS smram_restricted = 0;
 
 #if BX_DEBUGGER
   if (megabytes > BX_MAX_DIRTY_PAGE_TABLE_MEGS) {
@@ -437,7 +439,7 @@ bx_bool BX_MEM_C::dbg_fetch_mem(Bit32u addr, unsigned len, Bit8u *buf)
   for (; len>0; len--) {
     // Reading standard PCI/ISA Video Mem / SMMRAM
     if ((addr & 0xfffe0000) == 0x000a0000) {
-      if (BX_MEM_THIS smram_enabled)
+      if (BX_MEM_THIS smram_enable)
         *buf = vector[addr];
       else 
         *buf = DEV_vga_mem_read(addr);
@@ -503,7 +505,7 @@ bx_bool BX_MEM_C::dbg_set_mem(Bit32u addr, unsigned len, Bit8u *buf)
   for (; len>0; len--) {
     // Write to standard PCI/ISA Video Mem / SMMRAM
     if ((a20Addr & 0xfffe0000) == 0x000a0000) {
-      if (BX_MEM_THIS smram_enabled)
+      if (BX_MEM_THIS smram_enable)
         vector[addr] = *buf;
       else 
         DEV_vga_mem_write(addr, *buf);
@@ -581,11 +583,12 @@ Bit8u *BX_MEM_C::getHostMemAddr(BX_CPU_C *cpu, Bit32u a20Addr, unsigned op, unsi
     return(NULL); // Vetoed!  APIC address space
 #endif
 
-  // allow direct access to SMMRAM memory space for code and veto data
+  // allow direct access to SMRAM memory space for code and veto data
   if (access_type == CODE_ACCESS) {
-    // reading from SMMRAM memory space
-    if ((a20Addr & 0xfffe0000) == 0x000a0000) {
-      if (BX_MEM_THIS smram_enabled || cpu->smm_mode())
+    // reading from SMRAM memory space
+    if ((a20Addr & 0xfffe0000) == 0x000a0000 && (BX_MEM_THIS smram_available))
+    {
+      if (BX_MEM_THIS smram_enable || cpu->smm_mode())
         return (Bit8u *) & vector[a20Addr];
     }
   }
@@ -748,12 +751,16 @@ BX_MEM_C::unregisterMemoryHandlers(memory_handler_t read_handler, memory_handler
   return ret;
 }
 
-BX_MEM_SMF void BX_MEM_C::enable_smram(bx_bool code_only)
+BX_MEM_SMF void BX_MEM_C::enable_smram(bx_bool enable, bx_bool restricted)
 {
-  BX_MEM_THIS smram_enabled = code_only ? 1 : 2;
+  BX_MEM_THIS smram_available = 1;
+  BX_MEM_THIS smram_enable = (enable > 0);
+  BX_MEM_THIS smram_restricted = (restricted > 0);
 }
 
 BX_MEM_SMF void BX_MEM_C::disable_smram(void)
 {
-  BX_MEM_THIS smram_enabled = 0;
+  BX_MEM_THIS smram_available  = 0;
+  BX_MEM_THIS smram_enable     = 0;
+  BX_MEM_THIS smram_restricted = 0;
 }