diff --git a/bochs/iodev/acpi.cc b/bochs/iodev/acpi.cc index e1f2a0617..9a3b0a4ed 100644 --- a/bochs/iodev/acpi.cc +++ b/bochs/iodev/acpi.cc @@ -2,7 +2,7 @@ // $Id$ ///////////////////////////////////////////////////////////////////////// // -// Copyright (C) 2006 Volker Ruppert +// Copyright (C) 2006-2013 Volker Ruppert // // This library is free software; you can redistribute it and/or // modify it under the terms of the GNU Lesser General Public @@ -22,7 +22,6 @@ // PIIX4 ACPI support // - // Define BX_PLUGGABLE in files that can be compiled into plugins. For // platforms that require a special tag on exported symbols, BX_PLUGGABLE // is used to know when we are exporting symbols and when we are importing. @@ -125,8 +124,6 @@ void bx_acpi_ctrl_c::init(void) { // called once when bochs initializes - unsigned i; - BX_ACPI_THIS s.devfunc = BX_PCI_DEVICE(1, 3); DEV_register_pci_handlers(this, &BX_ACPI_THIS s.devfunc, BX_PLUGIN_ACPI, "ACPI Controller"); @@ -137,28 +134,12 @@ void bx_acpi_ctrl_c::init(void) } DEV_register_iowrite_handler(this, write_handler, ACPI_DBG_IO_ADDR, "ACPI", 4); - for (i=0; i<256; i++) { - BX_ACPI_THIS pci_conf[i] = 0x0; - } BX_ACPI_THIS s.pm_base = 0x0; BX_ACPI_THIS s.sm_base = 0x0; - // readonly registers - static const struct init_vals_t { - unsigned addr; - unsigned char val; - } init_vals[] = { - { 0x00, 0x86 }, { 0x01, 0x80 }, - { 0x02, 0x13 }, { 0x03, 0x71 }, - { 0x08, 0x03 }, // revision number - { 0x0a, 0x80 }, // other bridge device - { 0x0b, 0x06 }, // bridge device - { 0x0e, 0x00 }, // header type - { 0x3d, BX_PCI_INTA } // interrupt pin #1 - }; - for (i = 0; i < sizeof(init_vals) / sizeof(*init_vals); ++i) { - BX_ACPI_THIS pci_conf[init_vals[i].addr] = init_vals[i].val; - } + // initialize readonly registers + init_pci_conf(0x8086, 0x7113, 0x03, 0x068000, 0x00); + BX_ACPI_THIS pci_conf[0x3d] = BX_PCI_INTA; } void bx_acpi_ctrl_c::reset(unsigned type) diff --git a/bochs/iodev/devices.cc b/bochs/iodev/devices.cc index 67020daea..7a7b63cf5 100644 --- a/bochs/iodev/devices.cc +++ b/bochs/iodev/devices.cc @@ -2,7 +2,7 @@ // $Id$ ///////////////////////////////////////////////////////////////////////// // -// Copyright (C) 2002-2012 The Bochs Project +// Copyright (C) 2002-2013 The Bochs Project // // I/O port handlers API Copyright (C) 2003 by Frank Cornelis // @@ -1138,6 +1138,20 @@ void bx_devices_c::mouse_motion(int delta_x, int delta_y, int delta_z, unsigned } // generic PCI support +void bx_pci_device_stub_c::init_pci_conf(Bit16u vid, Bit16u did, Bit8u rev, Bit32u classc, Bit8u headt) +{ + memset(pci_conf, 0, 256); + pci_conf[0x00] = (Bit8u)(vid & 0xff); + pci_conf[0x01] = (Bit8u)(vid >> 8); + pci_conf[0x02] = (Bit8u)(did & 0xff); + pci_conf[0x03] = (Bit8u)(did >> 8); + pci_conf[0x08] = rev; + pci_conf[0x09] = (Bit8u)(classc & 0xff); + pci_conf[0x0a] = (Bit8u)((classc >> 8) & 0xff); + pci_conf[0x0b] = (Bit8u)((classc >> 16) & 0xff); + pci_conf[0x0e] = headt; +} + void bx_pci_device_stub_c::register_pci_state(bx_list_c *list) { char name[6]; diff --git a/bochs/iodev/display/svga_cirrus.cc b/bochs/iodev/display/svga_cirrus.cc index 61b19e592..ad3402c26 100644 --- a/bochs/iodev/display/svga_cirrus.cc +++ b/bochs/iodev/display/svga_cirrus.cc @@ -2372,32 +2372,22 @@ void bx_svga_cirrus_c::svga_mmio_blt_write(Bit32u address,Bit8u value) void bx_svga_cirrus_c::svga_init_pcihandlers(void) { - int i; - Bit8u devfunc = 0x00; DEV_register_pci_handlers(BX_CIRRUS_THIS_PTR, &devfunc, "cirrus", "SVGA Cirrus PCI"); - for (i=0; i<256; i++) { - BX_CIRRUS_THIS pci_conf[i] = 0x0; - } + // initialize readonly registers + BX_CIRRUS_THIS init_pci_conf(PCI_VENDOR_CIRRUS, PCI_DEVICE_CLGD5446, 0x00, + (PCI_CLASS_BASE_DISPLAY << 16) | (PCI_CLASS_SUB_VGA << 8), + PCI_CLASS_HEADERTYPE_00h); + BX_CIRRUS_THIS pci_conf[0x04] = (PCI_COMMAND_IOACCESS | PCI_COMMAND_MEMACCESS); - WriteHostWordToLittleEndian( - &BX_CIRRUS_THIS pci_conf[0x00], PCI_VENDOR_CIRRUS); - WriteHostWordToLittleEndian( - &BX_CIRRUS_THIS pci_conf[0x02], PCI_DEVICE_CLGD5446); - WriteHostWordToLittleEndian( - &BX_CIRRUS_THIS pci_conf[0x04], - (PCI_COMMAND_IOACCESS | PCI_COMMAND_MEMACCESS)); WriteHostDWordToLittleEndian( &BX_CIRRUS_THIS pci_conf[0x10], (PCI_MAP_MEM | PCI_MAP_MEMFLAGS_32BIT | PCI_MAP_MEMFLAGS_CACHEABLE)); WriteHostDWordToLittleEndian( &BX_CIRRUS_THIS pci_conf[0x14], (PCI_MAP_MEM | PCI_MAP_MEMFLAGS_32BIT)); - BX_CIRRUS_THIS pci_conf[0x0a] = PCI_CLASS_SUB_VGA; - BX_CIRRUS_THIS pci_conf[0x0b] = PCI_CLASS_BASE_DISPLAY; - BX_CIRRUS_THIS pci_conf[0x0e] = PCI_CLASS_HEADERTYPE_00h; BX_CIRRUS_THIS pci_base_address[0] = 0; BX_CIRRUS_THIS pci_base_address[1] = 0; diff --git a/bochs/iodev/display/vga.cc b/bochs/iodev/display/vga.cc index 533fb54a8..abb198c5c 100644 --- a/bochs/iodev/display/vga.cc +++ b/bochs/iodev/display/vga.cc @@ -2,7 +2,7 @@ // $Id$ ///////////////////////////////////////////////////////////////////////// // -// Copyright (C) 2002-2012 The Bochs Project +// Copyright (C) 2002-2013 The Bochs Project // PCI VGA dummy adapter Copyright (C) 2002,2003 Mike Nordell // // This library is free software; you can redistribute it and/or @@ -155,31 +155,16 @@ void bx_vga_c::init_vga_extension(void) } #if BX_SUPPORT_PCI Bit8u devfunc = 0x00; - unsigned i; if (BX_VGA_THIS pci_enabled) { DEV_register_pci_handlers(this, &devfunc, "pcivga", "Experimental PCI VGA"); - for (i = 0; i < 256; i++) { - BX_VGA_THIS pci_conf[i] = 0x0; - } - // readonly registers - static const struct init_vals_t { - unsigned addr; - unsigned char val; - } init_vals[] = { - // Note that the values for vendor and device id are selected at random! - // There might actually be "real" values for "experimental" vendor and - // device that should be used! - { 0x00, 0x34 }, { 0x01, 0x12 }, // 0x1234 - experimental vendor - { 0x02, 0x11 }, { 0x03, 0x11 }, // 0x1111 - experimental device - { 0x0a, 0x00 }, // class_sub VGA controller - { 0x0b, 0x03 }, // class_base display - { 0x0e, 0x00 } // header_type_generic - }; - for (i = 0; i < sizeof(init_vals) / sizeof(*init_vals); ++i) { - BX_VGA_THIS pci_conf[init_vals[i].addr] = init_vals[i].val; - } + // initialize readonly registers + // Note that the values for vendor and device id are selected at random! + // There might actually be "real" values for "experimental" vendor and + // device that should be used! + init_pci_conf(0x1234, 0x1111, 0x00, 0x030000, 0x00); + if (BX_VGA_THIS vbe_present) { BX_VGA_THIS pci_conf[0x10] = 0x08; BX_VGA_THIS pci_base_address[0] = 0; diff --git a/bochs/iodev/display/voodoo.cc b/bochs/iodev/display/voodoo.cc index 9b1fac347..7f7726665 100644 --- a/bochs/iodev/display/voodoo.cc +++ b/bochs/iodev/display/voodoo.cc @@ -186,11 +186,6 @@ void bx_voodoo_c::init(void) DEV_register_pci_handlers(this, &BX_VOODOO_THIS s.devfunc, BX_PLUGIN_VOODOO, "Experimental 3dfx Voodoo Graphics (SST-1/2)"); - for (unsigned i=0; i<256; i++) { - BX_VOODOO_THIS pci_conf[i] = 0x0; - } - BX_VOODOO_THIS pci_base_address[0] = 0; - if (BX_VOODOO_THIS s.mode_change_timer_id == BX_NULL_TIMER_HANDLE) { BX_VOODOO_THIS s.mode_change_timer_id = bx_virt_timer.register_timer(this, mode_change_timer_handler, 1000, 0, 0, "voodoo_mode_change"); @@ -204,15 +199,14 @@ void bx_voodoo_c::init(void) v = new voodoo_state; Bit8u model = (Bit8u)SIM->get_param_enum("model", base)->get(); if (model == VOODOO_2) { - BX_VOODOO_THIS pci_conf[0x02] = 0x02; - BX_VOODOO_THIS pci_conf[0x08] = 0x02; - BX_VOODOO_THIS pci_conf[0x0a] = 0x80; - BX_VOODOO_THIS pci_conf[0x0b] = 0x03; + init_pci_conf(0x121a, 0x0002, 0x02, 0x038000, 0x00); BX_VOODOO_THIS pci_conf[0x10] = 0x08; } else { - BX_VOODOO_THIS pci_conf[0x02] = 0x01; - BX_VOODOO_THIS pci_conf[0x08] = 0x01; + init_pci_conf(0x121a, 0x0001, 0x01, 0x000000, 0x00); } + BX_VOODOO_THIS pci_conf[0x3d] = BX_PCI_INTA; + BX_VOODOO_THIS pci_base_address[0] = 0; + voodoo_init(model); BX_INFO(("Voodoo initialized")); @@ -226,16 +220,12 @@ void bx_voodoo_c::reset(unsigned type) unsigned addr; unsigned char val; } reset_vals[] = { - { 0x00, 0x1a }, { 0x01, 0x12 }, { 0x04, 0x00 }, { 0x05, 0x00 }, // command io / memory { 0x06, 0x00 }, { 0x07, 0x00 }, // status - { 0x09, 0x00 }, // interface - { 0x0e, 0x00 }, // header type generic // address space 0x10 - 0x13 { 0x11, 0x00 }, { 0x12, 0x00 }, { 0x13, 0x00 }, { 0x3c, 0x00 }, // IRQ - { 0x3d, BX_PCI_INTA }, // INT // initEnable { 0x40, 0x00 }, { 0x41, 0x00 }, { 0x42, 0x00 }, { 0x43, 0x00 }, diff --git a/bochs/iodev/iodev.h b/bochs/iodev/iodev.h index 999faf339..d602a5d9f 100644 --- a/bochs/iodev/iodev.h +++ b/bochs/iodev/iodev.h @@ -100,8 +100,8 @@ public: virtual void pci_write_handler(Bit8u address, Bit32u value, unsigned io_len) {} + void init_pci_conf(Bit16u vid, Bit16u did, Bit8u rev, Bit32u classc, Bit8u headt); void register_pci_state(bx_list_c *list); - void load_pci_rom(const char *path); protected: diff --git a/bochs/iodev/network/e1000.cc b/bochs/iodev/network/e1000.cc index d25ea847f..233d0de52 100644 --- a/bochs/iodev/network/e1000.cc +++ b/bochs/iodev/network/e1000.cc @@ -455,9 +455,10 @@ void bx_e1000_c::init(void) DEV_register_pci_handlers(this, &BX_E1000_THIS s.devfunc, BX_PLUGIN_E1000, "Experimental Intel(R) Gigabit Ethernet"); - for (unsigned i=0; i<256; i++) { - BX_E1000_THIS pci_conf[i] = 0x0; - } + // initialize readonly registers + init_pci_conf(0x8086, 0x100e, 0x03, 0x020000, 0x00); + BX_E1000_THIS pci_conf[0x3d] = BX_PCI_INTA; + BX_E1000_THIS pci_base_address[0] = 0; BX_E1000_THIS pci_base_address[1] = 0; BX_E1000_THIS pci_rom_address = 0; @@ -488,15 +489,8 @@ void bx_e1000_c::reset(unsigned type) unsigned addr; unsigned char val; } reset_vals[] = { - { 0x00, 0x86 }, { 0x01, 0x80 }, - { 0x02, 0x0e }, { 0x03, 0x10 }, { 0x04, 0x03 }, { 0x05, 0x00 }, // command io / memory { 0x06, 0x00 }, { 0x07, 0x00 }, // status - { 0x08, 0x03 }, // revision number - { 0x09, 0x00 }, // interface - { 0x0a, 0x00 }, // class_sub - { 0x0b, 0x02 }, // class_base Network Controller - { 0x0e, 0x00 }, // header type generic // address space 0x10 - 0x13 { 0x10, 0x00 }, { 0x11, 0x00 }, { 0x12, 0x00 }, { 0x13, 0x00 }, @@ -504,8 +498,6 @@ void bx_e1000_c::reset(unsigned type) { 0x14, 0x01 }, { 0x15, 0x00 }, { 0x16, 0x00 }, { 0x17, 0x00 }, { 0x3c, 0x00 }, // IRQ - { 0x3d, BX_PCI_INTA }, // INT - }; for (i = 0; i < sizeof(reset_vals) / sizeof(*reset_vals); ++i) { BX_E1000_THIS pci_conf[reset_vals[i].addr] = reset_vals[i].val; diff --git a/bochs/iodev/network/ne2k.cc b/bochs/iodev/network/ne2k.cc index acd4b1928..e1f2fc692 100644 --- a/bochs/iodev/network/ne2k.cc +++ b/bochs/iodev/network/ne2k.cc @@ -194,18 +194,10 @@ void bx_ne2k_c::init(void) DEV_register_pci_handlers(this, &BX_NE2K_THIS s.devfunc, BX_PLUGIN_NE2K, devname); - for (unsigned i=0; i<256; i++) - BX_NE2K_THIS pci_conf[i] = 0x0; - // readonly registers - BX_NE2K_THIS pci_conf[0x00] = 0xec; - BX_NE2K_THIS pci_conf[0x01] = 0x10; - BX_NE2K_THIS pci_conf[0x02] = 0x29; - BX_NE2K_THIS pci_conf[0x03] = 0x80; + // initialize readonly registers + init_pci_conf(0x10ec, 0x8029, 0x00, 0x020000, 0x00); BX_NE2K_THIS pci_conf[0x04] = 0x01; BX_NE2K_THIS pci_conf[0x07] = 0x02; - BX_NE2K_THIS pci_conf[0x0a] = 0x00; - BX_NE2K_THIS pci_conf[0x0b] = 0x02; - BX_NE2K_THIS pci_conf[0x0e] = 0x00; BX_NE2K_THIS pci_conf[0x10] = 0x01; BX_NE2K_THIS pci_conf[0x3d] = BX_PCI_INTA; BX_NE2K_THIS s.base_address = 0x0; diff --git a/bochs/iodev/network/pcipnic.cc b/bochs/iodev/network/pcipnic.cc index ab018f8f6..d41f496e4 100644 --- a/bochs/iodev/network/pcipnic.cc +++ b/bochs/iodev/network/pcipnic.cc @@ -151,9 +151,9 @@ void bx_pcipnic_c::init(void) DEV_register_pci_handlers(this, &BX_PNIC_THIS s.devfunc, BX_PLUGIN_PCIPNIC, "Experimental PCI Pseudo NIC"); - for (unsigned i=0; i<256; i++) { - BX_PNIC_THIS pci_conf[i] = 0x0; - } + // initialize readonly registers + init_pci_conf(PNIC_PCI_VENDOR, PNIC_PCI_DEVICE, 0x01, 0x020000, 0x00); + BX_PNIC_THIS pci_conf[0x3d] = BX_PCI_INTA; BX_PNIC_THIS s.statusbar_id = bx_gui->register_statusitem("PNIC", 1); @@ -178,23 +178,13 @@ void bx_pcipnic_c::reset(unsigned type) unsigned addr; unsigned char val; } reset_vals[] = { - { 0x00, PNIC_PCI_VENDOR & 0xff }, - { 0x01, PNIC_PCI_VENDOR >> 8 }, - { 0x02, PNIC_PCI_DEVICE & 0xff }, - { 0x03, PNIC_PCI_DEVICE >> 8 }, { 0x04, 0x01 }, { 0x05, 0x00 }, // command_io { 0x06, 0x00 }, { 0x07, 0x00 }, // status - { 0x08, 0x01 }, // revision number - { 0x09, 0x00 }, // interface - { 0x0a, 0x00 }, // class_sub - { 0x0b, 0x02 }, // class_base Network Controller - { 0x0D, 0x20 }, // bus latency - { 0x0e, 0x00 }, // header_type_generic + { 0x0d, 0x20 }, // bus latency // address space 0x20 - 0x23 { 0x20, 0x01 }, { 0x21, 0x00 }, { 0x22, 0x00 }, { 0x23, 0x00 }, { 0x3c, 0x00, }, // IRQ - { 0x3d, BX_PCI_INTA }, // INT { 0x6a, 0x01 }, // PNIC clock { 0xc1, 0x20 } // PIRQ enable diff --git a/bochs/iodev/pci.cc b/bochs/iodev/pci.cc index c88403cdb..251f64019 100644 --- a/bochs/iodev/pci.cc +++ b/bochs/iodev/pci.cc @@ -76,19 +76,11 @@ void bx_pci_bridge_c::init(void) BX_PCI_THIS chipset = SIM->get_param_enum(BXPN_PCI_CHIPSET)->get(); DEV_register_pci_handlers(this, &devfunc, BX_PLUGIN_PCI, csname[BX_PCI_THIS chipset]); - for (i=0; i<256; i++) - BX_PCI_THIS pci_conf[i] = 0x0; - // readonly registers - BX_PCI_THIS pci_conf[0x00] = 0x86; - BX_PCI_THIS pci_conf[0x01] = 0x80; - BX_PCI_THIS pci_conf[0x0b] = 0x06; + // initialize readonly registers if (BX_PCI_THIS chipset == BX_PCI_CHIPSET_I440FX) { - BX_PCI_THIS pci_conf[0x02] = 0x37; - BX_PCI_THIS pci_conf[0x03] = 0x12; + init_pci_conf(0x8086, 0x1237, 0x00, 0x060000, 0x00); } else { - BX_PCI_THIS pci_conf[0x02] = 0x22; - BX_PCI_THIS pci_conf[0x03] = 0x01; - BX_PCI_THIS pci_conf[0x08] = 0x02; + init_pci_conf(0x8086, 0x0122, 0x02, 0x060000, 0x00); } // DRAM module setup diff --git a/bochs/iodev/pci2isa.cc b/bochs/iodev/pci2isa.cc index 9f328e16b..2a3eb0c2f 100644 --- a/bochs/iodev/pci2isa.cc +++ b/bochs/iodev/pci2isa.cc @@ -88,27 +88,17 @@ void bx_piix3_c::init(void) DEV_register_ioread_handler(this, read_handler, 0x04D1, "PIIX3 PCI-to-ISA bridge", 1); DEV_register_ioread_handler(this, read_handler, 0x0CF9, "PIIX3 PCI-to-ISA bridge", 1); - for (i=0; i<256; i++) - BX_P2I_THIS pci_conf[i] = 0x0; for (i=0; i<16; i++) BX_P2I_THIS s.irq_registry[i] = 0x0; for (i=0; i<16; i++) BX_P2I_THIS s.irq_level[i] = 0x0; - // readonly registers - BX_P2I_THIS pci_conf[0x00] = 0x86; - BX_P2I_THIS pci_conf[0x01] = 0x80; + // initialize readonly registers if (BX_P2I_THIS s.chipset == BX_PCI_CHIPSET_I440FX) { - BX_P2I_THIS pci_conf[0x02] = 0x00; - BX_P2I_THIS pci_conf[0x03] = 0x70; + init_pci_conf(0x8086, 0x7000, 0x00, 0x060100, 0x80); } else { - BX_P2I_THIS pci_conf[0x02] = 0x2e; - BX_P2I_THIS pci_conf[0x03] = 0x12; - BX_P2I_THIS pci_conf[0x08] = 0x01; + init_pci_conf(0x8086, 0x122e, 0x01, 0x060100, 0x80); } BX_P2I_THIS pci_conf[0x04] = 0x07; - BX_P2I_THIS pci_conf[0x0a] = 0x01; - BX_P2I_THIS pci_conf[0x0b] = 0x06; - BX_P2I_THIS pci_conf[0x0e] = 0x80; // irq routing registers BX_P2I_THIS pci_conf[0x60] = 0x80; BX_P2I_THIS pci_conf[0x61] = 0x80; diff --git a/bochs/iodev/pci_ide.cc b/bochs/iodev/pci_ide.cc index d3b813224..d07ed83f0 100644 --- a/bochs/iodev/pci_ide.cc +++ b/bochs/iodev/pci_ide.cc @@ -94,22 +94,12 @@ void bx_pci_ide_c::init(void) BX_PIDE_THIS s.bmdma[1].buffer = new Bit8u[0x20000]; BX_PIDE_THIS s.chipset = SIM->get_param_enum(BXPN_PCI_CHIPSET)->get(); - for (i=0; i<256; i++) - BX_PIDE_THIS pci_conf[i] = 0x0; - // readonly registers - BX_PIDE_THIS pci_conf[0x00] = 0x86; - BX_PIDE_THIS pci_conf[0x01] = 0x80; + // initialize readonly registers if (BX_PIDE_THIS s.chipset == BX_PCI_CHIPSET_I440FX) { - BX_PIDE_THIS pci_conf[0x02] = 0x10; - BX_PIDE_THIS pci_conf[0x03] = 0x70; + init_pci_conf(0x8086, 0x7010, 0x00, 0x010180, 0x00); } else { - BX_PIDE_THIS pci_conf[0x02] = 0x30; - BX_PIDE_THIS pci_conf[0x03] = 0x12; + init_pci_conf(0x8086, 0x1230, 0x00, 0x010180, 0x00); } - BX_PIDE_THIS pci_conf[0x09] = 0x80; - BX_PIDE_THIS pci_conf[0x0a] = 0x01; - BX_PIDE_THIS pci_conf[0x0b] = 0x01; - BX_PIDE_THIS pci_conf[0x0e] = 0x00; BX_PIDE_THIS pci_conf[0x20] = 0x01; BX_PIDE_THIS pci_base_address[4] = 0; } diff --git a/bochs/iodev/sound/es1370.cc b/bochs/iodev/sound/es1370.cc index a5629e5af..19be9d238 100644 --- a/bochs/iodev/sound/es1370.cc +++ b/bochs/iodev/sound/es1370.cc @@ -218,9 +218,10 @@ void bx_es1370_c::init(void) DEV_register_pci_handlers(this, &BX_ES1370_THIS s.devfunc, BX_PLUGIN_ES1370, "Experimental ES1370 soundcard"); - for (unsigned i=0; i<256; i++) { - BX_ES1370_THIS pci_conf[i] = 0x0; - } + // initialize readonly registers + init_pci_conf(0x1274, 0x5000, 0x00, 0x040100, 0x00); + BX_ES1370_THIS pci_conf[0x3d] = BX_PCI_INTA; + BX_ES1370_THIS pci_base_address[0] = 0; BX_ES1370_THIS soundmod = DEV_sound_get_module(); @@ -265,22 +266,14 @@ void bx_es1370_c::reset(unsigned type) unsigned addr; unsigned char val; } reset_vals[] = { - { 0x00, 0x74 }, { 0x01, 0x12 }, - { 0x02, 0x00 }, { 0x03, 0x50 }, - { 0x04, 0x05 }, { 0x05, 0x00 }, // command_io - { 0x06, 0x00 }, { 0x07, 0x04 }, // status - { 0x08, 0x00 }, // revision number - { 0x09, 0x00 }, // interface - { 0x0a, 0x01 }, // class_sub - { 0x0b, 0x04 }, // class_base Multimedia Audio Device - { 0x0e, 0x00 }, // header type generic + { 0x04, 0x05 }, { 0x05, 0x00 }, // command_io + { 0x06, 0x00 }, { 0x07, 0x04 }, // status // address space 0x10 - 0x13 { 0x10, 0x01 }, { 0x11, 0x00 }, { 0x12, 0x00 }, { 0x13, 0x00 }, { 0x2c, 0x42 }, { 0x2d, 0x49 }, // subsystem vendor { 0x2e, 0x4c }, { 0x2f, 0x4c }, // subsystem id { 0x3c, 0x00 }, // IRQ - { 0x3d, BX_PCI_INTA }, // INT { 0x3e, 0x0c }, // min_gnt { 0x3f, 0x80 }, // max_lat diff --git a/bochs/iodev/usb/usb_ohci.cc b/bochs/iodev/usb/usb_ohci.cc index a7e3d5ee4..11237679b 100644 --- a/bochs/iodev/usb/usb_ohci.cc +++ b/bochs/iodev/usb/usb_ohci.cc @@ -183,8 +183,8 @@ void bx_usb_ohci_c::init(void) DEV_register_pci_handlers(this, &BX_OHCI_THIS hub.devfunc, BX_PLUGIN_USB_OHCI, "Experimental USB OHCI"); - for (i=0; i<256; i++) - BX_OHCI_THIS pci_conf[i] = 0x0; + // initialize readonly registers + init_pci_conf(0x11c1, 0x5803, 0x11, 0x0c0310, 0x00); BX_OHCI_THIS pci_base_address[0] = 0x0; BX_OHCI_THIS hub.ohci_done_count = 7; @@ -225,16 +225,9 @@ void bx_usb_ohci_c::reset(unsigned type) unsigned addr; unsigned char val; } reset_vals[] = { - { 0x00, 0xC1 }, { 0x01, 0x11 }, // 0x11C1 = vendor - { 0x02, 0x03 }, { 0x03, 0x58 }, // 0x5803 = device { 0x04, 0x06 }, { 0x05, 0x00 }, // command_io { 0x06, 0x10 }, { 0x07, 0x02 }, // status (bit 4 = 1, has capabilities list.) - { 0x08, 0x11 }, // revision number - { 0x09, 0x10 }, // interface - { 0x0a, 0x03 }, // class_sub USB Host Controller - { 0x0b, 0x0c }, // class_base Serial Bus Controller - { 0x0D, 0x40 }, // bus latency - { 0x0e, 0x00 }, // header_type_generic + { 0x0d, 0x40 }, // bus latency // address space 0x10 - 0x13 { 0x10, 0x00 }, { 0x11, 0x50 }, // diff --git a/bochs/iodev/usb/usb_uhci.cc b/bochs/iodev/usb/usb_uhci.cc index 9f861fbd2..6e9a83fdf 100644 --- a/bochs/iodev/usb/usb_uhci.cc +++ b/bochs/iodev/usb/usb_uhci.cc @@ -174,9 +174,9 @@ void bx_usb_uhci_c::init(void) DEV_register_pci_handlers(this, &BX_UHCI_THIS hub.devfunc, BX_PLUGIN_USB_UHCI, "Experimental USB UHCI"); - for (i=0; i<256; i++) { - BX_UHCI_THIS pci_conf[i] = 0x0; - } + // initialize readonly registers + init_pci_conf(0x8086, 0x7020, 0x01, 0x0c0300, 0x00); + BX_UHCI_THIS pci_conf[0x3d] = BX_PCI_INTD; BX_UHCI_THIS pci_base_address[4] = 0x0; @@ -212,21 +212,13 @@ void bx_usb_uhci_c::reset(unsigned type) unsigned addr; unsigned char val; } reset_vals[] = { - { 0x00, 0x86 }, { 0x01, 0x80 }, // 0x8086 = vendor - { 0x02, 0x20 }, { 0x03, 0x70 }, // 0x7020 = device { 0x04, 0x05 }, { 0x05, 0x00 }, // command_io { 0x06, 0x80 }, { 0x07, 0x02 }, // status - { 0x08, 0x01 }, // revision number - { 0x09, 0x00 }, // interface - { 0x0a, 0x03 }, // class_sub USB Host Controller - { 0x0b, 0x0c }, // class_base Serial Bus Controller - { 0x0D, 0x20 }, // bus latency - { 0x0e, 0x00 }, // header_type_generic + { 0x0d, 0x20 }, // bus latency // address space 0x20 - 0x23 { 0x20, 0x01 }, { 0x21, 0x00 }, { 0x22, 0x00 }, { 0x23, 0x00 }, { 0x3c, 0x00 }, // IRQ - { 0x3d, BX_PCI_INTD }, // INT { 0x60, 0x10 }, // USB revision 1.0 { 0x6a, 0x01 }, // USB clock { 0xc1, 0x20 } // PIRQ enable diff --git a/bochs/iodev/usb/usb_xhci.cc b/bochs/iodev/usb/usb_xhci.cc index b568807a9..a8d3f3aed 100644 --- a/bochs/iodev/usb/usb_xhci.cc +++ b/bochs/iodev/usb/usb_xhci.cc @@ -181,8 +181,10 @@ void bx_usb_xhci_c::init(void) DEV_register_pci_handlers(this, &BX_XHCI_THIS hub.devfunc, BX_PLUGIN_USB_XHCI, "Experimental USB xHCI"); - for (i=0; i<256; i++) - BX_XHCI_THIS pci_conf[i] = 0x0; + // initialize readonly registers + // TODO: Change the VendorID and DeviceID to something else ???? + init_pci_conf(0x1033, 0x0194, 0x03, 0x0c0330, 0x00); + BX_XHCI_THIS pci_conf[0x3d] = BX_PCI_INTD; BX_XHCI_THIS pci_base_address[0] = 0x0; @@ -223,17 +225,10 @@ void bx_usb_xhci_c::reset(unsigned type) unsigned addr; unsigned char val; } reset_vals[] = { - { 0x00, 0x33 }, { 0x01, 0x10 }, // 0x1033 = vendor // TODO: Change the VendorID and DeviceID to something else ???? - { 0x02, 0x94 }, { 0x03, 0x01 }, // 0x0194 = device { 0x04, 0x06 }, { 0x05, 0x01 }, // command_io { 0x06, 0x10 }, { 0x07, 0x00 }, // status (has caps list) - { 0x08, 0x03 }, // revision number = 0x03 - { 0x09, 0x30 }, // interface - { 0x0A, 0x03 }, // class_sub USB Host Controller - { 0x0B, 0x0C }, // class_base Serial Bus Controller - { 0x0C, 0x10 }, // cache line size - { 0x0D, 0x00 }, // bus latency - { 0x0E, 0x00 }, // header_type_generic + { 0x0c, 0x10 }, // cache line size + { 0x0d, 0x00 }, // bus latency // address space 0x10 - 0x13 { 0x10, 0x04 }, { 0x11, 0x00 }, // @@ -245,7 +240,6 @@ void bx_usb_xhci_c::reset(unsigned type) { 0x34, 0x50 }, // offset of capabilities list within configuration space { 0x3C, 0x0A }, // IRQ - { 0x3D, BX_PCI_INTD }, // INT { 0x3E, 0x00 }, // minimum time bus master needs PCI bus ownership, in 250ns units { 0x3F, 0x00 }, // maximum latency, in 250ns units (bus masters only) (read-only)