From c6d07ae1b5a66d111367517ea2763e18863d967f Mon Sep 17 00:00:00 2001 From: Stanislav Shwartsman Date: Tue, 20 Sep 2011 06:02:27 +0000 Subject: [PATCH] store modrm() for x87 in Ib() byte because x87 have no Ib() --- bochs/cpu/fetchdecode.cc | 7 +++---- bochs/cpu/fetchdecode64.cc | 7 +++---- bochs/cpu/instr.h | 6 +++--- 3 files changed, 9 insertions(+), 11 deletions(-) diff --git a/bochs/cpu/fetchdecode.cc b/bochs/cpu/fetchdecode.cc index c750ccf77..ff05c8f9e 100644 --- a/bochs/cpu/fetchdecode.cc +++ b/bochs/cpu/fetchdecode.cc @@ -1362,6 +1362,7 @@ fetch_b1: #if BX_SUPPORT_FPU i->setVL(BX_NO_VL); #endif + i->modRMForm.Id = 0; unsigned index = b1 + (os_32 << 9); // *512 @@ -1457,13 +1458,12 @@ fetch_b1: vvv = nnn; i->setVvv(vvv); + i->setModRM(b2); /* for x87 */ + // MOVs with CRx and DRx always use register ops and ignore the mod field. if ((b1 & ~3) == 0x120) mod = 0xc0; - if ((b1 & 0xff8) == 0xd8) - i->setModRM(b2); - if (mod == 0xc0) { // mod == 11b i->assertModC0(); i->setRm(rm); @@ -1737,7 +1737,6 @@ modrm_done: } } - i->modRMForm.Id = 0; unsigned imm_mode = attr & BxImmediate; if (imm_mode) { // make sure iptr was advanced after Ib(), Iw() and Id() diff --git a/bochs/cpu/fetchdecode64.cc b/bochs/cpu/fetchdecode64.cc index 09dc2f0ce..d08e54dad 100644 --- a/bochs/cpu/fetchdecode64.cc +++ b/bochs/cpu/fetchdecode64.cc @@ -1817,6 +1817,7 @@ fetch_b1: i->setB1(b1); i->setVL(BX_NO_VL); + i->modRMForm.Id = 0; unsigned index = b1+offset; @@ -1918,13 +1919,12 @@ fetch_b1: vvv = nnn; i->setVvv(vvv); + i->setModRM(b2); /* for x87 */ + // MOVs with CRx and DRx always use register ops and ignore the mod field. if ((b1 & ~3) == 0x120) mod = 0xc0; - if ((b1 & 0xff8) == 0xd8) - i->setModRM(b2); - if (mod == 0xc0) { // mod == 11b i->setRm(rm); i->assertModC0(); @@ -2147,7 +2147,6 @@ modrm_done: } } - i->modRMForm.Id = 0; unsigned imm_mode = attr & BxImmediate; if (imm_mode) { // make sure iptr was advanced after Ib(), Iw() and Id() diff --git a/bochs/cpu/instr.h b/bochs/cpu/instr.h index 5ea61eeaf..491407e6c 100644 --- a/bochs/cpu/instr.h +++ b/bochs/cpu/instr.h @@ -128,7 +128,6 @@ public: #define BX_INSTR_METADATA_BASE 4 #define BX_INSTR_METADATA_INDEX 5 #define BX_INSTR_METADATA_SCALE 6 -#define BX_INSTR_METADATA_MODRM 7 /* modrm for FPU only */ #define BX_INSTR_METADATA_VVV 7 // using 5-bit field for registers (16 regs in 64-bit, RIP, NIL) @@ -184,10 +183,11 @@ public: metaData[BX_INSTR_METADATA_B1] = b1 & 0xff; } BX_CPP_INLINE void setModRM(unsigned modrm) { - metaData[BX_INSTR_METADATA_MODRM] = modrm; + // none of x87 instructions has immediate + modRMForm.Ib = modrm; } BX_CPP_INLINE unsigned modrm() const { - return metaData[BX_INSTR_METADATA_MODRM]; + return modRMForm.Ib; } BX_CPP_INLINE void setNnn(unsigned nnn) { metaData[BX_INSTR_METADATA_NNN] = nnn;