diff --git a/bochs/cpu/access.cc b/bochs/cpu/access.cc index b1113d3df..dff9dd67d 100644 --- a/bochs/cpu/access.cc +++ b/bochs/cpu/access.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: access.cc,v 1.107 2008-05-10 20:35:03 sshwarts Exp $ +// $Id: access.cc,v 1.108 2008-05-12 19:19:03 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -1343,7 +1343,7 @@ BX_CPU_C::read_virtual_dqword_aligned(unsigned s, bx_address offset, Bit8u *data // If double quadword access is unaligned, #GP(0). bx_address laddr = BX_CPU_THIS_PTR get_laddr(s, offset); if (laddr & 0xf) { - BX_DEBUG(("read_virtual_dqword_aligned: access not aligned to 16-byte")); + BX_DEBUG(("read_virtual_dqword_aligned(): access not aligned to 16-byte")); exception(BX_GP_EXCEPTION, 0, 0); } @@ -1366,7 +1366,7 @@ BX_CPU_C::write_virtual_dqword_aligned(unsigned s, bx_address offset, Bit8u *dat // If double quadword access is unaligned, #GP(0). bx_address laddr = BX_CPU_THIS_PTR get_laddr(s, offset); if (laddr & 0xf) { - BX_DEBUG(("write_virtual_dqword_aligned: access not aligned to 16-byte")); + BX_DEBUG(("write_virtual_dqword_aligned(): access not aligned to 16-byte")); exception(BX_GP_EXCEPTION, 0, 0); } @@ -1433,7 +1433,7 @@ accessOK: #if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK if (BX_CPU_THIS_PTR alignment_check() && curr_pl == 3) { if (laddr & 1) { - BX_ERROR(("write_new_stack_word(): #AC misaligned access")); + BX_ERROR(("write_new_stack_word_32(): #AC misaligned access")); exception(BX_AC_EXCEPTION, 0, 0); } } @@ -1485,7 +1485,7 @@ accessOK: #if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK if (BX_CPU_THIS_PTR alignment_check() && curr_pl == 3) { if (laddr & 3) { - BX_ERROR(("write_new_stack_dword(): #AC misaligned access")); + BX_ERROR(("write_new_stack_dword_32(): #AC misaligned access")); exception(BX_AC_EXCEPTION, 0, 0); } } diff --git a/bochs/cpu/access64.cc b/bochs/cpu/access64.cc index e9a158f4d..f1397e25a 100755 --- a/bochs/cpu/access64.cc +++ b/bochs/cpu/access64.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: access64.cc,v 1.3 2008-05-10 21:30:30 sshwarts Exp $ +// $Id: access64.cc,v 1.4 2008-05-12 19:19:03 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (c) 2008 Stanislav Shwartsman @@ -112,14 +112,14 @@ BX_CPU_C::write_virtual_word_64(unsigned s, Bit64u offset, Bit16u data) #endif if (! IsCanonical(laddr)) { - BX_ERROR(("write_virtual_word(): canonical failure")); + BX_ERROR(("write_virtual_word_64(): canonical failure")); exception(int_number(seg), 0, 0); } #if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK if (BX_CPU_THIS_PTR alignment_check()) { if (laddr & 1) { - BX_ERROR(("write_virtual_word(): #AC misaligned access")); + BX_ERROR(("write_virtual_word_64(): #AC misaligned access")); exception(BX_AC_EXCEPTION, 0, 0); } } @@ -161,14 +161,14 @@ BX_CPU_C::write_virtual_dword_64(unsigned s, Bit64u offset, Bit32u data) #endif if (! IsCanonical(laddr)) { - BX_ERROR(("write_virtual_dword(): canonical failure")); + BX_ERROR(("write_virtual_dword_64(): canonical failure")); exception(int_number(seg), 0, 0); } #if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK if (BX_CPU_THIS_PTR alignment_check()) { if (laddr & 3) { - BX_ERROR(("write_virtual_dword(): #AC misaligned access")); + BX_ERROR(("write_virtual_dword_64(): #AC misaligned access")); exception(BX_AC_EXCEPTION, 0, 0); } } @@ -210,14 +210,14 @@ BX_CPU_C::write_virtual_qword_64(unsigned s, Bit64u offset, Bit64u data) #endif if (! IsCanonical(laddr)) { - BX_ERROR(("write_virtual_qword(): canonical failure")); + BX_ERROR(("write_virtual_qword_64(): canonical failure")); exception(int_number(seg), 0, 0); } #if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK if (BX_CPU_THIS_PTR alignment_check()) { if (laddr & 7) { - BX_ERROR(("write_virtual_qword(): #AC misaligned access")); + BX_ERROR(("write_virtual_qword_64(): #AC misaligned access")); exception(BX_AC_EXCEPTION, 0, 0); } } @@ -257,7 +257,7 @@ BX_CPU_C::read_virtual_byte_64(unsigned s, Bit64u offset) #endif if (! IsCanonical(laddr)) { - BX_ERROR(("read_virtual_byte(): canonical failure")); + BX_ERROR(("read_virtual_byte_64(): canonical failure")); exception(int_number(seg), 0, 0); } @@ -296,14 +296,14 @@ BX_CPU_C::read_virtual_word_64(unsigned s, Bit64u offset) #endif if (! IsCanonical(laddr)) { - BX_ERROR(("read_virtual_word(): canonical failure")); + BX_ERROR(("read_virtual_word_64(): canonical failure")); exception(int_number(seg), 0, 0); } #if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK if (BX_CPU_THIS_PTR alignment_check()) { if (laddr & 1) { - BX_ERROR(("read_virtual_word(): #AC misaligned access")); + BX_ERROR(("read_virtual_word_64(): #AC misaligned access")); exception(BX_AC_EXCEPTION, 0, 0); } } @@ -344,14 +344,14 @@ BX_CPU_C::read_virtual_dword_64(unsigned s, Bit64u offset) #endif if (! IsCanonical(laddr)) { - BX_ERROR(("read_virtual_dword(): canonical failure")); + BX_ERROR(("read_virtual_dword_64(): canonical failure")); exception(int_number(seg), 0, 0); } #if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK if (BX_CPU_THIS_PTR alignment_check()) { if (laddr & 3) { - BX_ERROR(("read_virtual_dword(): #AC misaligned access")); + BX_ERROR(("read_virtual_dword_64(): #AC misaligned access")); exception(BX_AC_EXCEPTION, 0, 0); } } @@ -392,14 +392,14 @@ BX_CPU_C::read_virtual_qword_64(unsigned s, Bit64u offset) #endif if (! IsCanonical(laddr)) { - BX_ERROR(("read_virtual_qword(): canonical failure")); + BX_ERROR(("read_virtual_qword_64(): canonical failure")); exception(int_number(seg), 0, 0); } #if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK if (BX_CPU_THIS_PTR alignment_check()) { if (laddr & 7) { - BX_ERROR(("read_virtual_qword(): #AC misaligned access")); + BX_ERROR(("read_virtual_qword_64(): #AC misaligned access")); exception(BX_AC_EXCEPTION, 0, 0); } } @@ -448,7 +448,7 @@ BX_CPU_C::read_RMW_virtual_byte_64(unsigned s, Bit64u offset) #endif if (! IsCanonical(laddr)) { - BX_ERROR(("read_RMW_virtual_byte(): canonical failure")); + BX_ERROR(("read_RMW_virtual_byte_64(): canonical failure")); exception(int_number(seg), 0, 0); } @@ -491,14 +491,14 @@ BX_CPU_C::read_RMW_virtual_word_64(unsigned s, Bit64u offset) #endif if (! IsCanonical(laddr)) { - BX_ERROR(("read_RMW_virtual_word(): canonical failure")); + BX_ERROR(("read_RMW_virtual_word_64(): canonical failure")); exception(int_number(seg), 0, 0); } #if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK if (BX_CPU_THIS_PTR alignment_check()) { if (laddr & 1) { - BX_ERROR(("read_RMW_virtual_word(): #AC misaligned access")); + BX_ERROR(("read_RMW_virtual_word_64(): #AC misaligned access")); exception(BX_AC_EXCEPTION, 0, 0); } } @@ -543,14 +543,14 @@ BX_CPU_C::read_RMW_virtual_dword_64(unsigned s, Bit64u offset) #endif if (! IsCanonical(laddr)) { - BX_ERROR(("read_RMW_virtual_dword(): canonical failure")); + BX_ERROR(("read_RMW_virtual_dword_64(): canonical failure")); exception(int_number(seg), 0, 0); } #if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK if (BX_CPU_THIS_PTR alignment_check()) { if (laddr & 3) { - BX_ERROR(("read_RMW_virtual_dword(): #AC misaligned access")); + BX_ERROR(("read_RMW_virtual_dword_64(): #AC misaligned access")); exception(BX_AC_EXCEPTION, 0, 0); } } @@ -595,14 +595,14 @@ BX_CPU_C::read_RMW_virtual_qword_64(unsigned s, Bit64u offset) #endif if (! IsCanonical(laddr)) { - BX_ERROR(("read_RMW_virtual_qword(): canonical failure")); + BX_ERROR(("read_RMW_virtual_qword_64(): canonical failure")); exception(int_number(seg), 0, 0); } #if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK if (BX_CPU_THIS_PTR alignment_check()) { if (laddr & 7) { - BX_ERROR(("read_RMW_virtual_qword(): #AC misaligned access")); + BX_ERROR(("read_RMW_virtual_qword_64(): #AC misaligned access")); exception(BX_AC_EXCEPTION, 0, 0); } } @@ -638,14 +638,14 @@ void BX_CPU_C::write_new_stack_qword_64(Bit64u laddr, unsigned curr_pl, Bit64u d #endif if (! IsCanonical(laddr)) { - BX_ERROR(("write_new_stack_qword(): canonical failure")); + BX_ERROR(("write_new_stack_qword_64(): canonical failure")); exception(BX_SS_EXCEPTION, 0, 0); } #if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK if (BX_CPU_THIS_PTR alignment_check() && curr_pl == 3) { if (laddr & 7) { - BX_ERROR(("write_new_stack_qword(): #AC misaligned access")); + BX_ERROR(("write_new_stack_qword_64(): #AC misaligned access")); exception(BX_AC_EXCEPTION, 0, 0); } } diff --git a/bochs/cpu/ctrl_xfer_pro.cc b/bochs/cpu/ctrl_xfer_pro.cc index ac71185d8..9def0e5ec 100644 --- a/bochs/cpu/ctrl_xfer_pro.cc +++ b/bochs/cpu/ctrl_xfer_pro.cc @@ -1,5 +1,5 @@ //////////////////////////////////////////////////////////////////////// -// $Id: ctrl_xfer_pro.cc,v 1.72 2008-04-20 18:10:32 sshwarts Exp $ +// $Id: ctrl_xfer_pro.cc,v 1.73 2008-05-12 19:19:03 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -62,20 +62,23 @@ void BX_CPU_C::check_cs(bx_descriptor_t *descriptor, Bit16u cs_raw, Bit8u check_ // if non-conforming, code segment descriptor DPL must = CPL else #GP(selector) if (IS_CODE_SEGMENT_NON_CONFORMING(descriptor->type)) { if (descriptor->dpl != check_cpl) { - BX_ERROR(("check_cs(0x%04x): non-conforming code seg descriptor dpl != cpl", cs_raw)); + BX_ERROR(("check_cs(0x%04x): non-conforming code seg descriptor dpl != cpl, dpl=%d, cpl=%d", + cs_raw, descriptor->dpl, check_cpl)); exception(BX_GP_EXCEPTION, cs_raw & 0xfffc, 0); } /* RPL of destination selector must be <= CPL else #GP(selector) */ if (check_rpl > check_cpl) { - BX_ERROR(("check_cs(0x%04x): non-conforming code seg selector rpl > cpl", cs_raw)); + BX_ERROR(("check_cs(0x%04x): non-conforming code seg selector rpl > cpl, rpl=%d, cpl=%d", + cs_raw, check_rpl, check_cpl)); exception(BX_GP_EXCEPTION, cs_raw & 0xfffc, 0); } } // if conforming, then code segment descriptor DPL must <= CPL else #GP(selector) else { if (descriptor->dpl > check_cpl) { - BX_ERROR(("check_cs(0x%04x): conforming code seg descriptor dpl > cpl", cs_raw)); + BX_ERROR(("check_cs(0x%04x): conforming code seg descriptor dpl > cpl, dpl=%d, cpl=%d", + cs_raw, descriptor->dpl, check_cpl)); exception(BX_GP_EXCEPTION, cs_raw & 0xfffc, 0); } } diff --git a/bochs/cpu/paging.cc b/bochs/cpu/paging.cc index eaba4a86b..20a77af03 100644 --- a/bochs/cpu/paging.cc +++ b/bochs/cpu/paging.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: paging.cc,v 1.130 2008-05-11 19:58:41 sshwarts Exp $ +// $Id: paging.cc,v 1.131 2008-05-12 19:19:03 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -1194,9 +1194,9 @@ void BX_CPU_C::access_write_linear(bx_address laddr, unsigned len, unsigned curr BX_CPU_THIS_PTR address_xlation.len2 = len - BX_CPU_THIS_PTR address_xlation.len1; BX_CPU_THIS_PTR address_xlation.pages = 2; + bx_address laddr2 = laddr + BX_CPU_THIS_PTR address_xlation.len1; BX_CPU_THIS_PTR address_xlation.paddress2 = - dtranslate_linear(laddr + BX_CPU_THIS_PTR address_xlation.len1, - curr_pl, BX_WRITE); + dtranslate_linear(laddr2, curr_pl, BX_WRITE); #ifdef BX_LITTLE_ENDIAN BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, @@ -1208,11 +1208,9 @@ void BX_CPU_C::access_write_linear(bx_address laddr, unsigned len, unsigned curr BX_WRITE, (Bit8u*) data); BX_MEM(0)->writePhysicalPage(BX_CPU_THIS, BX_CPU_THIS_PTR address_xlation.paddress1, BX_CPU_THIS_PTR address_xlation.len1, data); - BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1, - BX_CPU_THIS_PTR address_xlation.paddress2, + BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr2, BX_CPU_THIS_PTR address_xlation.paddress2, BX_CPU_THIS_PTR address_xlation.len2, BX_WRITE); - BX_DBG_LIN_MEMORY_ACCESS(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1, - BX_CPU_THIS_PTR address_xlation.paddress2, + BX_DBG_LIN_MEMORY_ACCESS(BX_CPU_ID, laddr2, BX_CPU_THIS_PTR address_xlation.paddress2, BX_CPU_THIS_PTR address_xlation.len2, curr_pl, BX_WRITE, ((Bit8u*)data) + BX_CPU_THIS_PTR address_xlation.len1); BX_MEM(0)->writePhysicalPage(BX_CPU_THIS, BX_CPU_THIS_PTR address_xlation.paddress2, @@ -1229,11 +1227,9 @@ void BX_CPU_C::access_write_linear(bx_address laddr, unsigned len, unsigned curr BX_MEM(0)->writePhysicalPage(BX_CPU_THIS, BX_CPU_THIS_PTR address_xlation.paddress1, BX_CPU_THIS_PTR address_xlation.len1, ((Bit8u*)data) + (len - BX_CPU_THIS_PTR address_xlation.len1)); - BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1, - BX_CPU_THIS_PTR address_xlation.paddress2, + BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr2, BX_CPU_THIS_PTR address_xlation.paddress2, BX_CPU_THIS_PTR address_xlation.len2, BX_WRITE); - BX_DBG_LIN_MEMORY_ACCESS(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1, - BX_CPU_THIS_PTR address_xlation.paddress2, + BX_DBG_LIN_MEMORY_ACCESS(BX_CPU_ID, laddr2, BX_CPU_THIS_PTR address_xlation.paddress2, BX_CPU_THIS_PTR address_xlation.len2, curr_pl, BX_WRITE, (Bit8u*) data); BX_MEM(0)->writePhysicalPage(BX_CPU_THIS, BX_CPU_THIS_PTR address_xlation.paddress2, @@ -1287,8 +1283,8 @@ void BX_CPU_C::access_write_linear(bx_address laddr, unsigned len, unsigned curr BX_CPU_THIS_PTR address_xlation.len2 = len - BX_CPU_THIS_PTR address_xlation.len1; BX_CPU_THIS_PTR address_xlation.pages = 2; - BX_CPU_THIS_PTR address_xlation.paddress2 = (bx_phy_address) (laddr + - BX_CPU_THIS_PTR address_xlation.len1); + bx_address laddr2 = laddr + BX_CPU_THIS_PTR address_xlation.len1; + BX_CPU_THIS_PTR address_xlation.paddress2 = (bx_phy_address) laddr2; #ifdef BX_LITTLE_ENDIAN BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, @@ -1301,11 +1297,9 @@ void BX_CPU_C::access_write_linear(bx_address laddr, unsigned len, unsigned curr BX_MEM(0)->writePhysicalPage(BX_CPU_THIS, BX_CPU_THIS_PTR address_xlation.paddress1, BX_CPU_THIS_PTR address_xlation.len1, data); - BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1, - BX_CPU_THIS_PTR address_xlation.paddress2, + BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr2, BX_CPU_THIS_PTR address_xlation.paddress2, BX_CPU_THIS_PTR address_xlation.len2, BX_WRITE); - BX_DBG_LIN_MEMORY_ACCESS(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1, - BX_CPU_THIS_PTR address_xlation.paddress2, + BX_DBG_LIN_MEMORY_ACCESS(BX_CPU_ID, laddr2, BX_CPU_THIS_PTR address_xlation.paddress2, BX_CPU_THIS_PTR address_xlation.len2, curr_pl, BX_WRITE, ((Bit8u*)data) + BX_CPU_THIS_PTR address_xlation.len1); BX_MEM(0)->writePhysicalPage(BX_CPU_THIS, @@ -1324,11 +1318,9 @@ void BX_CPU_C::access_write_linear(bx_address laddr, unsigned len, unsigned curr BX_CPU_THIS_PTR address_xlation.paddress1, BX_CPU_THIS_PTR address_xlation.len1, ((Bit8u*)data) + (len - BX_CPU_THIS_PTR address_xlation.len1)); - BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1, - BX_CPU_THIS_PTR address_xlation.paddress2, + BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr2, BX_CPU_THIS_PTR address_xlation.paddress2, BX_CPU_THIS_PTR address_xlation.len2, BX_WRITE); - BX_DBG_LIN_MEMORY_ACCESS(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1, - BX_CPU_THIS_PTR address_xlation.paddress2, + BX_DBG_LIN_MEMORY_ACCESS(BX_CPU_ID, laddr2, BX_CPU_THIS_PTR address_xlation.paddress2, BX_CPU_THIS_PTR address_xlation.len2, curr_pl, BX_WRITE, (Bit8u*) data); BX_MEM(0)->writePhysicalPage(BX_CPU_THIS, @@ -1372,9 +1364,9 @@ void BX_CPU_C::access_read_linear(bx_address laddr, unsigned len, unsigned curr_ BX_CPU_THIS_PTR address_xlation.len2 = len - BX_CPU_THIS_PTR address_xlation.len1; BX_CPU_THIS_PTR address_xlation.pages = 2; + bx_address laddr2 = laddr + BX_CPU_THIS_PTR address_xlation.len1; BX_CPU_THIS_PTR address_xlation.paddress2 = - dtranslate_linear(laddr + BX_CPU_THIS_PTR address_xlation.len1, - curr_pl, xlate_rw); + dtranslate_linear(laddr2, curr_pl, xlate_rw); #ifdef BX_LITTLE_ENDIAN BX_MEM(0)->readPhysicalPage(BX_CPU_THIS, BX_CPU_THIS_PTR address_xlation.paddress1, @@ -1389,11 +1381,9 @@ void BX_CPU_C::access_read_linear(bx_address laddr, unsigned len, unsigned curr_ BX_MEM(0)->readPhysicalPage(BX_CPU_THIS, BX_CPU_THIS_PTR address_xlation.paddress2, BX_CPU_THIS_PTR address_xlation.len2, ((Bit8u*)data) + BX_CPU_THIS_PTR address_xlation.len1); - BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1, - BX_CPU_THIS_PTR address_xlation.paddress2, + BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr2, BX_CPU_THIS_PTR address_xlation.paddress2, BX_CPU_THIS_PTR address_xlation.len2, xlate_rw); - BX_DBG_LIN_MEMORY_ACCESS(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1, - BX_CPU_THIS_PTR address_xlation.paddress2, + BX_DBG_LIN_MEMORY_ACCESS(BX_CPU_ID, laddr2, BX_CPU_THIS_PTR address_xlation.paddress2, BX_CPU_THIS_PTR address_xlation.len2, curr_pl, BX_READ, ((Bit8u*)data) + BX_CPU_THIS_PTR address_xlation.len1); #else // BX_BIG_ENDIAN @@ -1409,11 +1399,9 @@ void BX_CPU_C::access_read_linear(bx_address laddr, unsigned len, unsigned curr_ BX_READ, ((Bit8u*)data) + (len - BX_CPU_THIS_PTR address_xlation.len1)); BX_MEM(0)->readPhysicalPage(BX_CPU_THIS, BX_CPU_THIS_PTR address_xlation.paddress2, BX_CPU_THIS_PTR address_xlation.len2, data); - BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1, - BX_CPU_THIS_PTR address_xlation.paddress2, + BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr2, BX_CPU_THIS_PTR address_xlation.paddress2, BX_CPU_THIS_PTR address_xlation.len2, xlate_rw); - BX_DBG_LIN_MEMORY_ACCESS(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1, - BX_CPU_THIS_PTR address_xlation.paddress2, + BX_DBG_LIN_MEMORY_ACCESS(BX_CPU_ID, laddr2, BX_CPU_THIS_PTR address_xlation.paddress2, BX_CPU_THIS_PTR address_xlation.len2, curr_pl, BX_READ, (Bit8u*) data); #endif @@ -1475,8 +1463,8 @@ void BX_CPU_C::access_read_linear(bx_address laddr, unsigned len, unsigned curr_ BX_CPU_THIS_PTR address_xlation.len2 = len - BX_CPU_THIS_PTR address_xlation.len1; BX_CPU_THIS_PTR address_xlation.pages = 2; - BX_CPU_THIS_PTR address_xlation.paddress2 = (bx_phy_address) (laddr + - BX_CPU_THIS_PTR address_xlation.len1); + bx_address laddr2 = laddr + BX_CPU_THIS_PTR address_xlation.len1; + BX_CPU_THIS_PTR address_xlation.paddress2 = (bx_phy_address) laddr2; #ifdef BX_LITTLE_ENDIAN BX_MEM(0)->readPhysicalPage(BX_CPU_THIS, @@ -1493,11 +1481,9 @@ void BX_CPU_C::access_read_linear(bx_address laddr, unsigned len, unsigned curr_ BX_CPU_THIS_PTR address_xlation.paddress2, BX_CPU_THIS_PTR address_xlation.len2, ((Bit8u*)data) + BX_CPU_THIS_PTR address_xlation.len1); - BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1, - BX_CPU_THIS_PTR address_xlation.paddress2, + BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr2, BX_CPU_THIS_PTR address_xlation.paddress2, BX_CPU_THIS_PTR address_xlation.len2, xlate_rw); - BX_DBG_LIN_MEMORY_ACCESS(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1, - BX_CPU_THIS_PTR address_xlation.paddress2, + BX_DBG_LIN_MEMORY_ACCESS(BX_CPU_ID, laddr2, BX_CPU_THIS_PTR address_xlation.paddress2, BX_CPU_THIS_PTR address_xlation.len2, curr_pl, BX_READ, ((Bit8u*)data) + BX_CPU_THIS_PTR address_xlation.len1); #else // BX_BIG_ENDIAN @@ -1515,11 +1501,9 @@ void BX_CPU_C::access_read_linear(bx_address laddr, unsigned len, unsigned curr_ BX_MEM(0)->readPhysicalPage(BX_CPU_THIS, BX_CPU_THIS_PTR address_xlation.paddress2, BX_CPU_THIS_PTR address_xlation.len2, data); - BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1, - BX_CPU_THIS_PTR address_xlation.paddress2, + BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr2, BX_CPU_THIS_PTR address_xlation.paddress2, BX_CPU_THIS_PTR address_xlation.len2, xlate_rw); - BX_DBG_LIN_MEMORY_ACCESS(BX_CPU_ID, laddr + BX_CPU_THIS_PTR address_xlation.len1, - BX_CPU_THIS_PTR address_xlation.paddress2, + BX_DBG_LIN_MEMORY_ACCESS(BX_CPU_ID, laddr2, BX_CPU_THIS_PTR address_xlation.paddress2, BX_CPU_THIS_PTR address_xlation.len2, curr_pl, BX_READ, (Bit8u*) data); #endif diff --git a/bochs/cpu/segment_ctrl_pro.cc b/bochs/cpu/segment_ctrl_pro.cc index 14626cc21..688f095ec 100644 --- a/bochs/cpu/segment_ctrl_pro.cc +++ b/bochs/cpu/segment_ctrl_pro.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: segment_ctrl_pro.cc,v 1.92 2008-05-06 19:45:17 sshwarts Exp $ +// $Id: segment_ctrl_pro.cc,v 1.93 2008-05-12 19:19:03 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -739,7 +739,7 @@ void BX_CPU_C::fetch_raw_descriptor64(const bx_selector_t *selector, } else { /* LDT */ if (BX_CPU_THIS_PTR ldtr.cache.valid==0) { - BX_ERROR(("fetch_raw_descriptor: LDTR.valid=0")); + BX_ERROR(("fetch_raw_descriptor64: LDTR.valid=0")); exception(exception_no, selector->value & 0xfffc, 0); } if ((index*8 + 15) > BX_CPU_THIS_PTR ldtr.cache.u.system.limit_scaled) { @@ -753,7 +753,7 @@ void BX_CPU_C::fetch_raw_descriptor64(const bx_selector_t *selector, access_read_linear(offset, 8, 0, BX_READ, &raw_descriptor1); access_read_linear(offset + 8, 8, 0, BX_READ, &raw_descriptor2); - if (raw_descriptor2 & BX_CONST64(0x00001F0000000000)) { + if (raw_descriptor2 & BX_CONST64(0x00001f0000000000)) { BX_ERROR(("fetch_raw_descriptor64: extended attributes DWORD4 TYPE != 0")); exception(BX_GP_EXCEPTION, selector->value & 0xfffc, 0); }