- patch updated for current CVS and remarks added

This commit is contained in:
Volker Ruppert 2005-03-12 15:33:20 +00:00
parent 3c475e831f
commit c3d6cc8f4d

View File

@ -10,10 +10,14 @@ end-of-track and data overrun/underrun conditions, as well as non-DMA mode.
The code cleanup is present in CVS now (Volker Ruppert, Dec 1st 2002).
We still have no test case for the non-DMA mode and the overrun/underrun (timeout)
code fails if cpu speedups are enabled. The timeout code expects at least one DMA
cycle within 15 usec (Volker Ruppert, Mar 12th 2005).
Patch was created with:
cvs diff -u
Apply patch to what version:
cvs checked out on 8 Nov 2002
cvs checked out on 11 Mar 2005
Instructions:
To patch, go to main bochs directory.
Type "patch -p0 < THIS_PATCH_FILE".
@ -21,11 +25,11 @@ Instructions:
Index: iodev/floppy.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/iodev/floppy.cc,v
retrieving revision 1.61
diff -u -r1.61 floppy.cc
--- iodev/floppy.cc 2003-02-07 13:47:40 +0100
+++ iodev/floppy.cc 2003-06-16 20:50:39 +0200
@@ -61,6 +61,10 @@
retrieving revision 1.77
diff -u -r1.77 floppy.cc
--- iodev/floppy.cc 2005-03-11 21:12:52 +0100
+++ iodev/floppy.cc 2005-03-12 15:23:40 +0200
@@ -73,11 +73,18 @@
#define FD_MS_ACTB 0x02
#define FD_MS_ACTA 0x01
@ -36,24 +40,22 @@ diff -u -r1.61 floppy.cc
#define FROM_FLOPPY 10
#define TO_FLOPPY 11
@@ -250,7 +254,8 @@
}
}
#define FLOPPY_DMA_CHAN 2
-
+#define FD_TIMEOUT 15 // for FIFO overrun/underrun
+#define FD_IRQ_DELAY 2 // delay so the system can detect a INT change
/* CMOS Equipment Byte register */
if (BX_FD_THIS s.num_supported_floppies > 0) {
@@ -356,6 +361,20 @@
+
typedef struct {
unsigned id;
Bit8u trk;
@@ -391,6 +398,20 @@
break;
case 0x3F5: /* diskette controller data */
+
+ /* data transfer in non-DMA mode */
+ if (BX_FD_THIS s.main_status_reg & FD_MS_NDMA) {
+ BX_FD_THIS dma_write(&value); // write: from controller to memory
+ BX_FD_THIS dma_write(&value); // write: from controller to cpu
+
+ /* This simulates the FIFO latency, see comment in timer() below. */
+ BX_FD_THIS lower_interrupt();
@ -67,14 +69,14 @@ diff -u -r1.61 floppy.cc
if (BX_FD_THIS s.result_size == 0) {
BX_ERROR(("port 0x3f5: no results to read"));
BX_FD_THIS s.main_status_reg = 0;
@@ -487,6 +506,20 @@
@@ -527,6 +548,20 @@
break;
case 0x3F5: /* diskette controller data */
+
+ /* data transfer in non-DMA mode */
+ if (BX_FD_THIS s.main_status_reg & FD_MS_NDMA) {
+ BX_FD_THIS dma_read((Bit8u *) &value); // read: from memory to controller
+ BX_FD_THIS dma_read((Bit8u *) &value); // read: from cpu to controller
+
+ /* This simulates the FIFO latency, see comment in timer() below. */
+ BX_FD_THIS lower_interrupt();
@ -88,31 +90,16 @@ diff -u -r1.61 floppy.cc
BX_DEBUG(("command = %02x", (unsigned) value));
if (BX_FD_THIS s.command_complete) {
if (BX_FD_THIS s.pending_command!=0)
@@ -620,11 +653,6 @@
for (i=0; i<BX_FD_THIS s.command_size; i++)
BX_DEBUG(("[%02x] ", (unsigned) BX_FD_THIS s.command[i]));
-#if 0
- /* execute phase of command is in progress (non DMA mode) */
- BX_FD_THIS s.main_status_reg |= 20;
-#endif
-
BX_FD_THIS s.pending_command = BX_FD_THIS s.command[0];
switch (BX_FD_THIS s.pending_command) {
case 0x03: // specify
@@ -633,8 +661,9 @@
step_rate_time = BX_FD_THIS s.command[1] >> 4;
head_unload_time = BX_FD_THIS s.command[1] & 0x0f;
@@ -670,7 +705,7 @@
head_load_time = BX_FD_THIS s.command[2] >> 1;
- if (BX_FD_THIS s.command[2] & 0x01)
- BX_ERROR(("non DMA mode selected"));
+ BX_FD_THIS s.non_dma = BX_FD_THIS s.command[2] & 0x01;
+ if (BX_FD_THIS s.non_dma)
BX_FD_THIS s.non_dma = BX_FD_THIS s.command[2] & 0x01;
if (BX_FD_THIS s.non_dma)
- BX_ERROR(("non DMA mode not implemented yet"));
+ BX_INFO(("non DMA mode selected"));
enter_idle_phase();
return;
break;
@@ -802,10 +831,15 @@
@@ -839,10 +874,14 @@
/* 4 header bytes per sector are required */
BX_FD_THIS s.format_count <<= 2;
@ -123,8 +110,7 @@ diff -u -r1.61 floppy.cc
+ if (BX_FD_THIS s.non_dma) {
+ BX_FD_THIS s.main_status_reg = FD_MS_MRQ | FD_MS_NDMA | FD_MS_BUSY;
+ BX_FD_THIS raise_interrupt();
+ }
+ else {
+ } else {
+ /* data reg not ready, controller busy */
+ BX_FD_THIS s.main_status_reg = FD_MS_BUSY;
+ DEV_dma_set_drq(FLOPPY_DMA_CHAN, 1);
@ -132,7 +118,7 @@ diff -u -r1.61 floppy.cc
BX_DEBUG(("format track"));
return;
break;
@@ -920,19 +954,27 @@
@@ -957,21 +996,25 @@
floppy_xfer(drive, logical_sector*512, BX_FD_THIS s.floppy_buffer,
512, FROM_FLOPPY);
@ -141,44 +127,38 @@ diff -u -r1.61 floppy.cc
- /* data reg not ready, controller busy */
- BX_FD_THIS s.main_status_reg = FD_MS_BUSY;
- return;
+ if (BX_FD_THIS s.non_dma) {
+ BX_FD_THIS s.main_status_reg = FD_MS_MRQ | FD_MS_NDMA | FD_MS_DIO | FD_MS_BUSY;
+ BX_FD_THIS raise_interrupt();
+ }
+ else {
+ /* data reg not ready, controller busy */
+ BX_FD_THIS s.main_status_reg = FD_MS_BUSY;
+ DEV_dma_set_drq(FLOPPY_DMA_CHAN, 1);
+ }
}
else if ((BX_FD_THIS s.command[0] & 0x7f) == 0x45) { // write
- }
- else if ((BX_FD_THIS s.command[0] & 0x7f) == 0x45) { // write
-
- DEV_dma_set_drq(FLOPPY_DMA_CHAN, 1);
-
- /* data reg not ready, controller busy */
- BX_FD_THIS s.main_status_reg = FD_MS_BUSY;
- return;
+ if (BX_FD_THIS s.non_dma) {
+ BX_FD_THIS s.main_status_reg = FD_MS_MRQ | FD_MS_NDMA | FD_MS_BUSY;
+ BX_FD_THIS s.main_status_reg = FD_MS_MRQ | FD_MS_NDMA | FD_MS_DIO | FD_MS_BUSY;
+ BX_FD_THIS raise_interrupt();
+ }
+ else {
+ } else {
+ /* data reg not ready, controller busy */
+ BX_FD_THIS s.main_status_reg = FD_MS_BUSY;
+ DEV_dma_set_drq(FLOPPY_DMA_CHAN, 1);
+ }
}
else
BX_PANIC(("floppy_command(): unknown read/write command"));
@@ -1044,18 +1086,43 @@
BX_FD_THIS s.DIR[drive] &= ~0x80; // clear disk change line
enter_idle_phase();
- raise_interrupt();
+ } else if ((BX_FD_THIS s.command[0] & 0x7f) == 0x45) { // write
+
+ if (BX_FD_THIS s.non_dma) {
+ BX_FD_THIS s.main_status_reg = FD_MS_MRQ | FD_MS_NDMA | FD_MS_BUSY;
+ BX_FD_THIS raise_interrupt();
break;
+ } else {
+ /* data reg not ready, controller busy */
+ BX_FD_THIS s.main_status_reg = FD_MS_BUSY;
+ DEV_dma_set_drq(FLOPPY_DMA_CHAN, 1);
}
- else
+ } else
BX_PANIC(("floppy_command(): unknown read/write command"));
case 0x4a: /* read ID */
return;
@@ -1138,6 +1181,31 @@
enter_result_phase();
break;
@ -200,23 +180,17 @@ diff -u -r1.61 floppy.cc
+ BX_FD_THIS s.main_status_reg |= FD_MS_MRQ;
+ bx_pc_system.activate_timer(BX_FD_THIS s.floppy_timer_index,
+ FD_TIMEOUT, 0 );
+ }
+ else { // timeout
+ BX_FD_THIS s.status_reg1 |= FD_ST_OVERRUN;
+ enter_result_phase();
+ } else { // timeout
+ // FIXME: this code requires at least one DMA cycle within 15 usec
+ //BX_FD_THIS s.status_reg1 |= FD_ST_OVERRUN;
+ //enter_result_phase();
+ }
+ break;
+
case 0xfe: // (contrived) RESET
theFloppyController->reset(BX_RESET_SOFTWARE);
BX_FD_THIS s.pending_command = 0;
BX_FD_THIS s.status_reg0 = 0xc0;
- raise_interrupt();
+ BX_FD_THIS raise_interrupt();
BX_FD_THIS s.reset_sensei = 4;
break;
@@ -1076,9 +1143,11 @@
@@ -1163,9 +1231,11 @@
// We need to return then next data byte from the floppy buffer
// to be transfered via the DMA to memory. (read block from floppy)
@ -229,7 +203,7 @@ diff -u -r1.61 floppy.cc
if (BX_FD_THIS s.floppy_buffer_index >= 512) {
Bit8u drive;
@@ -1087,7 +1156,6 @@
@@ -1174,7 +1244,6 @@
BX_FD_THIS s.floppy_buffer_index = 0;
if (DEV_dma_get_tc()) { // Terminal Count line, done
BX_FD_THIS s.status_reg0 = (BX_FD_THIS s.head[drive] << 2) | drive;
@ -237,7 +211,7 @@ diff -u -r1.61 floppy.cc
BX_FD_THIS s.status_reg2 = 0;
if (bx_dbg.floppy) {
@@ -1128,6 +1196,9 @@
@@ -1215,6 +1284,9 @@
Bit8u drive;
Bit32u logical_sector;
@ -247,7 +221,7 @@ diff -u -r1.61 floppy.cc
drive = BX_FD_THIS s.DOR & 0x03;
if (BX_FD_THIS s.pending_command == 0x4d) { // format track in progress
--BX_FD_THIS s.format_count;
@@ -1192,7 +1263,6 @@
@@ -1279,7 +1351,6 @@
BX_FD_THIS s.floppy_buffer_index = 0;
if (DEV_dma_get_tc()) { // Terminal Count line, done
BX_FD_THIS s.status_reg0 = (BX_FD_THIS s.head[drive] << 2) | drive;
@ -255,21 +229,7 @@ diff -u -r1.61 floppy.cc
BX_FD_THIS s.status_reg2 = 0;
if (bx_dbg.floppy) {
@@ -1220,6 +1290,13 @@
BX_FD_THIS s.reset_sensei = 0;
}
+ void
+bx_floppy_ctrl_c::lower_interrupt(void)
+{
+ DEV_pic_lower_irq(6);
+ BX_FD_THIS s.pending_irq = 0;
+}
+
void
bx_floppy_ctrl_c::increment_sector(void)
@@ -1228,6 +1305,14 @@
@@ -1322,6 +1393,14 @@
drive = BX_FD_THIS s.DOR & 0x03;
@ -284,19 +244,20 @@ diff -u -r1.61 floppy.cc
// values after completion of data xfer
// ??? calculation depends on base_count being multiple of 512
BX_FD_THIS s.sector[drive] ++;
@@ -1250,6 +1335,11 @@
@@ -1344,6 +1423,12 @@
BX_INFO(("increment_sector: clamping cylinder to max"));
}
}
+
+ /* check end-of-track condition */
+ if ((BX_FD_THIS s.multi_track == BX_FD_THIS s.head[drive]) &&
+ (BX_FD_THIS s.sector[drive] == BX_FD_THIS s.media[drive].sectors_per_track))
+ (BX_FD_THIS s.sector[drive] == BX_FD_THIS s.media[drive].sectors_per_track)) {
+ BX_FD_THIS s.status_reg1 |= FD_ST_EOT;
+ }
}
unsigned
@@ -1591,14 +1681,23 @@
@@ -1702,14 +1787,23 @@
BX_FD_THIS s.result[0] = BX_FD_THIS s.status_reg0;
BX_FD_THIS s.result[1] = BX_FD_THIS s.cylinder[drive];
break;
@ -322,18 +283,16 @@ diff -u -r1.61 floppy.cc
BX_FD_THIS s.result_size = 7;
BX_FD_THIS s.result[0] = BX_FD_THIS s.status_reg0;
BX_FD_THIS s.result[1] = BX_FD_THIS s.status_reg1;
@@ -1607,7 +1706,9 @@
@@ -1718,6 +1812,8 @@
BX_FD_THIS s.result[4] = BX_FD_THIS s.head[drive];
BX_FD_THIS s.result[5] = BX_FD_THIS s.sector[drive];
BX_FD_THIS s.result[6] = 2; /* sector size code */
- raise_interrupt();
+
+ bx_pc_system.deactivate_timer( BX_FD_THIS s.floppy_timer_index ); // clear pending timeout
+ BX_FD_THIS raise_interrupt();
BX_FD_THIS raise_interrupt();
break;
}
}
@@ -1618,6 +1719,11 @@
@@ -1729,6 +1825,11 @@
BX_FD_THIS s.main_status_reg &= 0x0f; // leave drive status untouched
BX_FD_THIS s.main_status_reg |= FD_MS_MRQ; // data register ready
@ -345,30 +304,3 @@ diff -u -r1.61 floppy.cc
BX_FD_THIS s.command_complete = 1; /* waiting for new command */
BX_FD_THIS s.command_index = 0;
BX_FD_THIS s.command_size = 0;
Index: iodev/floppy.h
===================================================================
RCS file: /cvsroot/bochs/bochs/iodev/floppy.h,v
retrieving revision 1.16
diff -u -r1.16 floppy.h
--- iodev/floppy.h 2002-11-30 10:39:29 +0100
+++ iodev/floppy.h 2003-06-16 20:50:39 +0200
@@ -114,6 +114,7 @@
Bit8u DIR[4]; // Digital Input Register:
// b7: 0=diskette is present and has not been changed
// 1=diskette missing or changed
+ Bit8u non_dma;
} s; // state information
static Bit32u read_handler(void *this_ptr, Bit32u address, unsigned io_len);
@@ -127,9 +128,10 @@
BX_FD_SMF void floppy_command(void);
BX_FD_SMF void floppy_xfer(Bit8u drive, Bit32u offset, Bit8u *buffer, Bit32u bytes, Bit8u direction);
BX_FD_SMF void raise_interrupt(void);
+ BX_FD_SMF void lower_interrupt(void);
BX_FD_SMF void enter_idle_phase(void);
BX_FD_SMF void enter_result_phase(void);
- static void timer_handler(void *);
+ static void timer_handler(void *);
public:
BX_FD_SMF void timer(void);