Fixes in disasm
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@ -44,8 +44,7 @@
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#define IA_AES 0x01000000 /* AES instruction */
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#define IA_AES 0x01000000 /* AES instruction */
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#define IA_AVX 0x02000000 /* AVX instruction */
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#define IA_AVX 0x02000000 /* AVX instruction */
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#define IA_MOVBE 0x04000000 /* MOVBE Intel Atom(R) instruction */
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#define IA_MOVBE 0x04000000 /* MOVBE Intel Atom(R) instruction */
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#define IA_LEGACY 0x40000000 /* legacy instruction */
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#define IA_LEGACY 0x80000000 /* legacy instruction */
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#define IA_UNDOCUMENTED 0x80000000 /* instruction undocumented */
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/* general purpose bit register */
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/* general purpose bit register */
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enum {
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enum {
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@ -921,7 +921,7 @@ Ia_popw_SS = { "pop", "popw", SS, XX, XX, XX, 0 },
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Ia_por_Pq_Qq = { "por", "por", Pq, Qq, XX, XX, IA_MMX },
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Ia_por_Pq_Qq = { "por", "por", Pq, Qq, XX, XX, IA_MMX },
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Ia_por_Vdq_Wdq = { "por", "por", Vdq, Wdq, XX, XX, IA_SSE2 },
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Ia_por_Vdq_Wdq = { "por", "por", Vdq, Wdq, XX, XX, IA_SSE2 },
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Ia_prefetch = { "prefetch (3dnow!)", "prefetch (3dnow!)", Mb, XX, XX, XX, IA_3DNOW | IA_X86_64 },
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Ia_prefetch = { "prefetch (3dnow!)", "prefetch (3dnow!)", Mb, XX, XX, XX, IA_3DNOW | IA_X86_64 },
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Ia_prefetch_hint = { "prefetch_hint", "prefetch_hint", Mb, XX, XX, XX, IA_SSE | IA_UNDOCUMENTED },
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Ia_prefetch_hint = { "prefetch_hint", "prefetch_hint", Mb, XX, XX, XX, IA_SSE },
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Ia_prefetchnta = { "prefetchnta", "prefetchnta", Mb, XX, XX, XX, IA_SSE },
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Ia_prefetchnta = { "prefetchnta", "prefetchnta", Mb, XX, XX, XX, IA_SSE },
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Ia_prefetcht0 = { "prefetcht0", "prefetcht0", Mb, XX, XX, XX, IA_SSE },
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Ia_prefetcht0 = { "prefetcht0", "prefetcht0", Mb, XX, XX, XX, IA_SSE },
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Ia_prefetcht1 = { "prefetcht1", "prefetcht1", Mb, XX, XX, XX, IA_SSE },
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Ia_prefetcht1 = { "prefetcht1", "prefetcht1", Mb, XX, XX, XX, IA_SSE },
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