From c04fb9a6ba59bcc11f440f172e4e8a878e6d2a47 Mon Sep 17 00:00:00 2001 From: Shwartsman Date: Tue, 9 Jan 2024 09:14:39 +0200 Subject: [PATCH] Fixed decoding of AVX-VNNI instruction (typo in decoder tables) mention AVX-VNNI in CHANGES --- bochs/CHANGES | 6 +++--- bochs/cpu/decoder/fetchdecode_avx.h | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/bochs/CHANGES b/bochs/CHANGES index eae78103b..08b620320 100644 --- a/bochs/CHANGES +++ b/bochs/CHANGES @@ -11,7 +11,7 @@ Brief summary : ! Implemented 57-bit Linear Address and 5-Level Paging support ! Implemented User-Level Interrupt (UINTR) extension ! Implemented recently published Intel instruction sets: - - MOVDIRI/MOVDIR64B, AVX512 BF16, AVX IFMA52, VNNI-INT8/VNNI-INT16, AVX-NE-CONVERT, CMPCCXADD, SM3/SM4, SHA512, WRMSRNS, MSRLIST, WAITPKG, SERIALIZE + - MOVDIRI/MOVDIR64B, AVX512 BF16, AVX IFMA52, AVX-VNNI/VNNI-INT8/VNNI-INT16, AVX-NE-CONVERT, CMPCCXADD, SM3/SM4, SHA512, WRMSRNS, MSRLIST, WAITPKG, SERIALIZE ! CPUID: Added Xeon Sapphire Rapids CPU definition - Improved 64-bit guest support in Bochs internal debugger, added new internal debugger commands - Bochs debugger enhanced with new commands (setpmem, loadmem, deref, ...) @@ -41,9 +41,9 @@ Detailed change log : - Implemented 57-bit Linear Address and 5-Level Paging support - Implemented User-Level Interrupt (UINTR) extension - Implemented recently published Intel instruction sets: - - MOVDIRI/MOVDIR64B, AVX512 BF16, AVX IFMA52, VNNI-INT8/VNNI-INT16, AVX-NE-CONVERT, CMPCCXADD, SM3/SM4, SHA512, WRMSRNS, MSRLIST, WAITPKG, SERIALIZE + - MOVDIRI/MOVDIR64B, AVX512 BF16, AVX IFMA52, AVX-VNNI/VNNI-INT8/VNNI-INT16, AVX-NE-CONVERT, CMPCCXADD, SM3/SM4, SHA512, WRMSRNS, MSRLIST, WAITPKG, SERIALIZE - CPUID: Added Xeon Sapphire Rapids CPU definition - - Features PKS, WAITPKG, UINTR, AVX512_BF16, MOVDIRI/MOVDIR64, LA57, SERIALIZE and more + - Features PKS, WAITPKG, UINTR, AVX-VNNI, AVX512_BF16, MOVDIRI/MOVDIR64, LA57, SERIALIZE and more Not yet supported but will be added in future: AVX512_FP16, AMX, VMX Extensions (HLAT, IPI Virtualization) - Bochs Debugger and Instrumentation diff --git a/bochs/cpu/decoder/fetchdecode_avx.h b/bochs/cpu/decoder/fetchdecode_avx.h index e030f709c..8e534cc6c 100644 --- a/bochs/cpu/decoder/fetchdecode_avx.h +++ b/bochs/cpu/decoder/fetchdecode_avx.h @@ -1005,7 +1005,7 @@ static const Bit64u BxOpcodeGroup_VEX_0F3851[] = { form_opcode(ATTR_SSE_NO_PREFIX | ATTR_VEX_W0, BX_IA_VPDPBUUDS_VdqHdqWdq), form_opcode(ATTR_SSE_PREFIX_66 | ATTR_VEX_W0, BX_IA_VPDPBUSDS_VdqHdqWdq), form_opcode(ATTR_SSE_PREFIX_F2 | ATTR_VEX_W0, BX_IA_VPDPBSSDS_VdqHdqWdq), - last_opcode(ATTR_SSE_PREFIX_F2 | ATTR_VEX_W0, BX_IA_VPDPBSUDS_VdqHdqWdq) + last_opcode(ATTR_SSE_PREFIX_F3 | ATTR_VEX_W0, BX_IA_VPDPBSUDS_VdqHdqWdq) }; static const Bit64u BxOpcodeGroup_VEX_0F3852[] = { last_opcode(ATTR_SSE_PREFIX_66 | ATTR_VEX_W0, BX_IA_VPDPWSSD_VdqHdqWdq) };