xsave sse state using same interface as all other advanced states
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@ -4914,6 +4914,8 @@ public: // for now...
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BX_SMF void print_state_AVX(void);
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#endif
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#if BX_CPU_LEVEL >= 6
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BX_SMF void xsave_sse_state(bxInstruction_c *i, bx_address offset);
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#if BX_SUPPORT_AVX
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BX_SMF void xsave_ymm_state(bxInstruction_c *i, bx_address offset);
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#if BX_SUPPORT_EVEX
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@ -4923,6 +4925,7 @@ public: // for now...
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#endif
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#endif
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BX_SMF void xrstor_sse_state(bxInstruction_c *i, bx_address offset);
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#if BX_SUPPORT_AVX
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BX_SMF void xrstor_ymm_state(bxInstruction_c *i, bx_address offset);
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#if BX_SUPPORT_EVEX
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@ -4932,6 +4935,7 @@ public: // for now...
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#endif
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#endif
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BX_SMF void xrstor_init_sse_state(void);
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#if BX_SUPPORT_AVX
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BX_SMF void xrstor_init_ymm_state(void);
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#if BX_SUPPORT_EVEX
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@ -4940,6 +4944,7 @@ public: // for now...
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BX_SMF void xrstor_init_hi_zmm_state(void);
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#endif
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#endif
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#endif
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#if BX_SUPPORT_MONITOR_MWAIT
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BX_SMF bx_bool is_monitor(bx_phy_address addr, unsigned len);
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@ -146,16 +146,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XSAVE(bxInstruction_c *i)
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/////////////////////////////////////////////////////////////////////////////
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if ((features_save_enable_mask & BX_XCR0_SSE_MASK) != 0)
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{
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/* store XMM register file */
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for(index=0; index < 16; index++)
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{
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// save XMM8-XMM15 only in 64-bit mode
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if (index < 8 || long64_mode()) {
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write_virtual_xmmword(i->seg(),
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(eaddr+index*16+XSAVE_SSE_STATE_OFFSET) & asize_mask, (Bit8u *)(&BX_READ_XMM_REG(index)));
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}
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}
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xsave_sse_state(i, eaddr+XSAVE_SSE_STATE_OFFSET);
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header1 |= BX_XCR0_SSE_MASK;
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}
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@ -341,25 +332,10 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XRSTOR(bxInstruction_c *i)
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/////////////////////////////////////////////////////////////////////////////
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if ((features_load_enable_mask & BX_XCR0_SSE_MASK) != 0)
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{
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if (header1 & BX_XCR0_SSE_MASK) {
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// load SSE state from XSAVE area
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for(index=0; index < 16; index++)
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{
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// restore XMM8-XMM15 only in 64-bit mode
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if (index < 8 || long64_mode()) {
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read_virtual_xmmword(i->seg(),
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(eaddr+index*16+XSAVE_SSE_STATE_OFFSET) & asize_mask, (Bit8u *)(&BX_READ_XMM_REG(index)));
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}
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}
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}
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else {
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// initialize SSE with reset values
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for(index=0; index < 16; index++) {
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// set XMM8-XMM15 only in 64-bit mode
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if (index < 8 || long64_mode())
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BX_CLEAR_XMM_REG(index);
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}
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}
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if (header1 & BX_XCR0_SSE_MASK)
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xrstor_sse_state(i, eaddr+XSAVE_SSE_STATE_OFFSET);
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else
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xrstor_init_sse_state();
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}
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#if BX_SUPPORT_AVX
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@ -407,6 +383,45 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XRSTOR(bxInstruction_c *i)
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BX_NEXT_INSTR(i);
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}
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// SSE state management //
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#if BX_CPU_LEVEL >= 6
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void BX_CPU_C::xsave_sse_state(bxInstruction_c *i, bx_address offset)
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{
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bx_address asize_mask = i->asize_mask();
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/* store XMM register file */
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for(unsigned index=0; index < 16; index++) {
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// save XMM8-XMM15 only in 64-bit mode
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if (index < 8 || long64_mode()) {
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write_virtual_xmmword(i->seg(), (offset + index*16) & asize_mask, (Bit8u *)(&BX_READ_XMM_REG(index)));
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}
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}
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}
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void BX_CPU_C::xrstor_sse_state(bxInstruction_c *i, bx_address offset)
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{
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bx_address asize_mask = i->asize_mask();
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// load SSE state from XSAVE area
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for(unsigned index=0; index < 16; index++) {
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// restore XMM8-XMM15 only in 64-bit mode
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if (index < 8 || long64_mode()) {
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read_virtual_xmmword(i->seg(), (offset+index*16) & asize_mask, (Bit8u *)(&BX_READ_XMM_REG(index)));
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}
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}
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}
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void BX_CPU_C::xrstor_init_sse_state(void)
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{
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// initialize SSE with reset values
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for(unsigned index=0; index < 16; index++) {
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// set XMM8-XMM15 only in 64-bit mode
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if (index < 8 || long64_mode()) BX_CLEAR_XMM_REG(index);
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}
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}
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#if BX_SUPPORT_AVX
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// YMM state management //
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@ -540,7 +555,9 @@ void BX_CPU_C::xrstor_init_hi_zmm_state(void)
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}
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#endif // BX_SUPPORT_EVEX
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#endif
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#endif // BX_SUPPORT_AVX
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#endif // BX_CPU_LEVEL >= 6
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/* 0F 01 D0 */
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XGETBV(bxInstruction_c *i)
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