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Fixed denirmal arguments for FADD/FSUB instructions

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This commit is contained in:
Stanislav Shwartsman 2004-06-25 20:02:41 +00:00
parent 2a0a361298
commit becac7f01d
1 changed files with 39 additions and 43 deletions
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82
bochs/fpu/softfloat.cc
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@ -2375,56 +2375,52 @@ static floatx80 addFloatx80Sigs(floatx80 a, floatx80 b, int zSign, float_status_
bSig = extractFloatx80Frac(b);
bExp = extractFloatx80Exp(b);
if (aExp == 0x7FFF) {
if ((Bit64u) (aSig<<1)
|| ((bExp == 0x7FFF) && (Bit64u) (bSig<<1)))
{
return propagateFloatx80NaN(a, b, status);
}
if (bSig && (bExp == 0)) float_raise(status, float_flag_denormal);
return a;
}
if (bExp == 0x7FFF) {
if ((Bit64u) (bSig<<1)) return propagateFloatx80NaN(a, b, status);
if (aSig && (aExp == 0)) float_raise(status, float_flag_denormal);
return b;
}
if (aExp == 0) {
if (aSig == 0) {
if ((bExp == 0) && bSig) {
float_raise(status, float_flag_denormal);
normalizeFloatx80Subnormal(bSig, &bExp, &bSig);
}
return roundAndPackFloatx80(get_float_rounding_precision(status),
zSign, bExp, bSig, 0, status);
}
float_raise(status, float_flag_denormal);
normalizeFloatx80Subnormal(aSig, &aExp, &aSig);
}
if (bExp == 0) {
if (bSig == 0)
return roundAndPackFloatx80(get_float_rounding_precision(status),
zSign, aExp, aSig, 0, status);
float_raise(status, float_flag_denormal);
normalizeFloatx80Subnormal(bSig, &bExp, &bSig);
}
expDiff = aExp - bExp;
zExp = aExp;
if (0 < expDiff) {
if (aExp == 0x7FFF) {
if ((Bit64u) (aSig<<1)) return propagateFloatx80NaN(a, b, status);
if (bSig && (bExp == 0)) float_raise(status, float_flag_denormal);
return a;
}
if ((aExp == 0) && aSig)
float_raise(status, float_flag_denormal);
if (bExp == 0) {
if (bSig) float_raise(status, float_flag_denormal);
--expDiff;
}
shift64ExtraRightJamming(bSig, 0, expDiff, &bSig, &zSig1);
zExp = aExp;
shift64ExtraRightJamming(bSig, 0, expDiff, &bSig, &zSig1);
}
else if (expDiff < 0) {
if (bExp == 0x7FFF) {
if ((Bit64u) (bSig<<1)) return propagateFloatx80NaN(a, b, status);
if (aSig && (aExp == 0)) float_raise(status, float_flag_denormal);
return packFloatx80(zSign, 0x7FFF, BX_CONST64(0x8000000000000000));
}
if ((bExp == 0) && bSig)
float_raise(status, float_flag_denormal);
if (aExp == 0) {
if (aSig) float_raise(status, float_flag_denormal);
++expDiff;
}
shift64ExtraRightJamming(aSig, 0, - expDiff, &aSig, &zSig1);
shift64ExtraRightJamming(aSig, 0, -expDiff, &aSig, &zSig1);
zExp = bExp;
}
else {
if (aExp == 0x7FFF) {
if ((Bit64u) ((aSig | bSig)<<1))
return propagateFloatx80NaN(a, b, status);
return a;
}
zSig1 = 0;
zSig0 = aSig + bSig;
if (aExp == 0) {
if (aSig | bSig) float_raise(status, float_flag_denormal);
normalizeFloatx80Subnormal(zSig0, &zExp, &zSig0);
goto roundAndPack;
}
zExp = aExp;
zSig1 = 0;
goto shiftRight1;
}
zSig0 = aSig + bSig;
@ -2432,7 +2428,7 @@ static floatx80 addFloatx80Sigs(floatx80 a, floatx80 b, int zSign, float_status_
shiftRight1:
shift64ExtraRightJamming(zSig0, zSig1, 1, &zSig0, &zSig1);
zSig0 |= BX_CONST64(0x8000000000000000);
++zExp;
zExp++;
roundAndPack:
return
roundAndPackFloatx80(get_float_rounding_precision(status),