Store FIFO presence in variable "enabled" and report the state change of the
currently unimplemented FIFOs.
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2d3d62db5f
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bd40347963
@ -161,8 +161,8 @@ BX_THREAD_FUNC(fifo_thread, indata)
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while (1) {
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if (fifo_wait_for_event(&fifo_wakeup)) {
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// TODO: process PCI FIFO / memory FIFO data here
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if (v->fbi.cmdfifo[0].enable) {
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while (v->fbi.cmdfifo[0].enable && (v->fbi.cmdfifo[0].depth >= v->fbi.cmdfifo[0].depth_needed)) {
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if (v->fbi.cmdfifo[0].enabled) {
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while (v->fbi.cmdfifo[0].enabled && (v->fbi.cmdfifo[0].depth >= v->fbi.cmdfifo[0].depth_needed)) {
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cmdfifo_process();
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}
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BX_LOCK(cmdfifo_mutex);
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@ -393,7 +393,7 @@ void bx_voodoo_c::register_state(void)
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for (i = 0; i < 2; i++) {
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sprintf(name, "%d", i);
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bx_list_c *num = new bx_list_c(cmdfifo, name, "");
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new bx_shadow_bool_c(num, "enable", &v->fbi.cmdfifo[i].enable, BASE_HEX);
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new bx_shadow_bool_c(num, "enabled", &v->fbi.cmdfifo[i].enabled, BASE_HEX);
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new bx_shadow_num_c(num, "base", &v->fbi.cmdfifo[i].base, BASE_HEX);
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new bx_shadow_num_c(num, "end", &v->fbi.cmdfifo[i].end, BASE_HEX);
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new bx_shadow_num_c(num, "rdptr", &v->fbi.cmdfifo[i].rdptr, BASE_HEX);
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@ -768,6 +768,11 @@ void bx_voodoo_c::pci_write_handler(Bit8u address, Bit32u value, unsigned io_len
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case 0x41:
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case 0x42:
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case 0x43:
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if (((address+i) == 0x40) && ((value8 ^ oldval) & 0x02)) {
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v->pci.fifo.enabled = ((value8 & 0x02) > 0);
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BX_INFO(("PCI FIFO now %sabled (not implemented yet)",
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v->pci.fifo.enabled ? "en":"dis"));
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}
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if (((address+i) == 0x41) && (BX_VOODOO_THIS s.model == VOODOO_2)) {
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value8 &= 0x0f;
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value8 |= 0x50;
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@ -1430,6 +1430,7 @@ typedef struct
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typedef struct _fifo_state fifo_state;
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struct _fifo_state
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{
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bx_bool enabled; /* enabled? */
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Bit32u* base; /* base of the FIFO */
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Bit32s size; /* size of the FIFO */
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Bit32s in; /* input pointer */
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@ -1440,7 +1441,7 @@ struct _fifo_state
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typedef struct _cmdfifo_info cmdfifo_info;
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struct _cmdfifo_info
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{
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bx_bool enable; /* enabled? */
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bx_bool enabled; /* enabled? */
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Bit8u count_holes; /* count holes? */
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Bit32u base; /* base address in framebuffer RAM */
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Bit32u end; /* end address in framebuffer RAM */
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@ -1289,7 +1289,7 @@ void recompute_video_memory(voodoo_state *v)
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fifo_last_page = v->fbi.mask / 0x1000;
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/* is it valid and enabled? */
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if (fifo_start_page <= fifo_last_page && FBIINIT0_ENABLE_MEMORY_FIFO(v->reg[fbiInit0].u))
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if ((fifo_start_page <= fifo_last_page) && v->fbi.fifo.enabled)
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{
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v->fbi.fifo.base = (Bit32u *)(v->fbi.ram + fifo_start_page * 0x1000);
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v->fbi.fifo.size = (fifo_last_page + 1 - fifo_start_page) * 0x1000 / 4;
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@ -2787,6 +2787,11 @@ void register_w_common(Bit32u offset, Bit32u data)
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poly_wait(v->poly, v->regnames[regnum]);
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if (v->type <= VOODOO_2 && (chips & 1) && INITEN_ENABLE_HW_INIT(v->pci.init_enable)) {
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Voodoo_Output_Enable(data & 1);
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if (v->fbi.fifo.enabled != FBIINIT0_ENABLE_MEMORY_FIFO(data)) {
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v->fbi.fifo.enabled = FBIINIT0_ENABLE_MEMORY_FIFO(data);
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BX_INFO(("memory FIFO now %sabled (not implemented yet)",
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v->fbi.fifo.enabled ? "en" : "dis"));
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}
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v->reg[fbiInit0].u = data;
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if (FBIINIT0_GRAPHICS_RESET(data))
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soft_reset(v);
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@ -2829,9 +2834,9 @@ void register_w_common(Bit32u offset, Bit32u data)
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if (v->type == VOODOO_2 && (chips & 1) && INITEN_ENABLE_HW_INIT(v->pci.init_enable))
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{
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if (v->fbi.cmdfifo[0].enable != FBIINIT7_CMDFIFO_ENABLE(data)) {
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v->fbi.cmdfifo[0].enable = FBIINIT7_CMDFIFO_ENABLE(data);
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BX_INFO(("CMDFIFO now %sabled", v->fbi.cmdfifo[0].enable ? "en" : "dis"));
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if (v->fbi.cmdfifo[0].enabled != FBIINIT7_CMDFIFO_ENABLE(data)) {
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v->fbi.cmdfifo[0].enabled = FBIINIT7_CMDFIFO_ENABLE(data);
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BX_INFO(("CMDFIFO now %sabled", v->fbi.cmdfifo[0].enabled ? "en" : "dis"));
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}
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v->reg[regnum].u = data;
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}
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@ -2934,7 +2939,7 @@ Bit32u register_r(Bit32u offset)
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result |= 1 << 9;
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if (v->type == VOODOO_2) {
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if (v->fbi.cmdfifo[0].enable && v->fbi.cmdfifo[0].depth > 0)
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if (v->fbi.cmdfifo[0].enabled && v->fbi.cmdfifo[0].depth > 0)
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result |= 7 << 7;
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}
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/* Banshee is different starting here */
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@ -2944,7 +2949,7 @@ Bit32u register_r(Bit32u offset)
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result |= v->fbi.frontbuf << 10;
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/* bits 27:12 indicate memory FIFO freespace */
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if (!FBIINIT0_ENABLE_MEMORY_FIFO(v->reg[fbiInit0].u) || fifo_empty(&v->fbi.fifo))
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if (!v->fbi.fifo.enabled || fifo_empty(&v->fbi.fifo))
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result |= 0xffff << 12;
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else
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{
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@ -2959,11 +2964,11 @@ Bit32u register_r(Bit32u offset)
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/* bit 10 is 2D busy */
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/* bit 11 is cmd FIFO 0 busy */
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if (v->fbi.cmdfifo[0].enable && v->fbi.cmdfifo[0].depth > 0)
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if (v->fbi.cmdfifo[0].enabled && v->fbi.cmdfifo[0].depth > 0)
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result |= 1 << 11;
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/* bit 12 is cmd FIFO 1 busy */
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if (v->fbi.cmdfifo[1].enable && v->fbi.cmdfifo[1].depth > 0)
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if (v->fbi.cmdfifo[1].enabled && v->fbi.cmdfifo[1].depth > 0)
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result |= 1 << 12;
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}
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