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Moved the asm() statements from the arithmetic instruction emulation

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into inline functions with asm() statements in cpu.h.  This cleans
  up the *.cc code (which now doesn't have any asm()s in it), and
  centralizes the asm() code so constraints can be modified in one
  place.  This also makes it easier to cover more instructions
  with asm()s for more efficient eflags handling.
This commit is contained in:
Kevin Lawton 2002-10-07 22:51:58 +00:00
parent 0dd8da13d5
commit b8d7f5c88e
11 changed files with 621 additions and 902 deletions
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281
bochs/cpu/arith16.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: arith16.cc,v 1.23 2002-10-03 18:12:40 kevinlawton Exp $
// $Id: arith16.cc,v 1.24 2002-10-07 22:51:55 kevinlawton Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -38,17 +38,9 @@ BX_CPU_C::INC_RX(bxInstruction_c *i)
{
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"incw %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].word.rx)
: "1" (BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].word.rx)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPMask) | (flags32 & EFlagsOSZAPMask);
BX_CPU_THIS_PTR lf_flags_status &= 0x00000f;
asmInc16(BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].word.rx, flags32);
setEFlagsOSZAP(flags32);
#else
Bit16u rx;
rx = ++ BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].word.rx;
@ -62,17 +54,9 @@ BX_CPU_C::DEC_RX(bxInstruction_c *i)
{
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"decw %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].word.rx)
: "1" (BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].word.rx)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPMask) | (flags32 & EFlagsOSZAPMask);
BX_CPU_THIS_PTR lf_flags_status &= 0x00000f;
asmDec16(BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].word.rx, flags32);
setEFlagsOSZAP(flags32);
#else
Bit16u rx;
@ -109,29 +93,22 @@ BX_CPU_C::ADD_EwGw(bxInstruction_c *i)
BX_CPU_C::ADD_GwEEw(bxInstruction_c *i)
{
Bit16u op1_16, op2_16, sum_16;
unsigned nnn = i->nnn();
op1_16 = BX_READ_16BIT_REG(i->nnn());
op1_16 = BX_READ_16BIT_REG(nnn);
read_virtual_word(i->seg(), RMAddr(i), &op2_16);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"addw %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (sum_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) | (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmAdd16(sum_16, op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
sum_16 = op1_16 + op2_16;
#endif
BX_WRITE_16BIT_REG(i->nnn(), sum_16);
BX_WRITE_16BIT_REG(nnn, sum_16);
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
SET_FLAGS_OSZAPC_16(op1_16, op2_16, sum_16, BX_INSTR_ADD16);
@ -142,28 +119,21 @@ BX_CPU_C::ADD_GwEEw(bxInstruction_c *i)
BX_CPU_C::ADD_GwEGw(bxInstruction_c *i)
{
Bit16u op1_16, op2_16, sum_16;
unsigned nnn = i->nnn();
op1_16 = BX_READ_16BIT_REG(i->nnn());
op1_16 = BX_READ_16BIT_REG(nnn);
op2_16 = BX_READ_16BIT_REG(i->rm());
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"addw %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (sum_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) | (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmAdd16(sum_16, op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
sum_16 = op1_16 + op2_16;
#endif
BX_WRITE_16BIT_REG(i->nnn(), sum_16);
BX_WRITE_16BIT_REG(nnn, sum_16);
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
SET_FLAGS_OSZAPC_16(op1_16, op2_16, sum_16, BX_INSTR_ADD16);
@ -372,18 +342,9 @@ BX_CPU_C::SUB_EwGw(bxInstruction_c *i)
op1_16 = BX_READ_16BIT_REG(i->rm());
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"subw %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (diff_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmSub16(diff_16, op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
diff_16 = op1_16 - op2_16;
#endif
@ -393,18 +354,9 @@ BX_CPU_C::SUB_EwGw(bxInstruction_c *i)
read_RMW_virtual_word(i->seg(), RMAddr(i), &op1_16);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"subw %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (diff_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmSub16(diff_16, op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
diff_16 = op1_16 - op2_16;
#endif
@ -421,8 +373,9 @@ BX_CPU_C::SUB_EwGw(bxInstruction_c *i)
BX_CPU_C::SUB_GwEw(bxInstruction_c *i)
{
Bit16u op1_16, op2_16, diff_16;
unsigned nnn = i->nnn();
op1_16 = BX_READ_16BIT_REG(i->nnn());
op1_16 = BX_READ_16BIT_REG(nnn);
if (i->modC0()) {
op2_16 = BX_READ_16BIT_REG(i->rm());
@ -433,22 +386,14 @@ BX_CPU_C::SUB_GwEw(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"subw %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (diff_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) | (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmSub16(diff_16, op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
diff_16 = op1_16 - op2_16;
#endif
BX_WRITE_16BIT_REG(i->nnn(), diff_16);
BX_WRITE_16BIT_REG(nnn, diff_16);
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
SET_FLAGS_OSZAPC_16(op1_16, op2_16, diff_16, BX_INSTR_SUB16);
@ -465,17 +410,9 @@ BX_CPU_C::SUB_AXIw(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"subw %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (diff_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) | (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmSub16(diff_16, op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
diff_16 = op1_16 - op2_16;
#endif
@ -504,17 +441,9 @@ BX_CPU_C::CMP_EwGw(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"cmpw %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) | (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmCmp16(op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
Bit16u diff_16;
diff_16 = op1_16 - op2_16;
@ -540,17 +469,9 @@ BX_CPU_C::CMP_GwEw(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"cmpw %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) | (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmCmp16(op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
Bit16u diff_16;
diff_16 = op1_16 - op2_16;
@ -570,17 +491,9 @@ BX_CPU_C::CMP_AXIw(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"cmpw %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) | (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmCmp16(op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
Bit16u diff_16;
diff_16 = op1_16 - op2_16;
@ -664,18 +577,9 @@ BX_CPU_C::ADD_EEwIw(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"addw %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (sum_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmAdd16(sum_16, op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
sum_16 = op1_16 + op2_16;
#endif
@ -697,18 +601,9 @@ BX_CPU_C::ADD_EGwIw(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"addw %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (sum_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmAdd16(sum_16, op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
sum_16 = op1_16 + op2_16;
#endif
@ -757,18 +652,9 @@ BX_CPU_C::SUB_EwIw(bxInstruction_c *i)
op1_16 = BX_READ_16BIT_REG(i->rm());
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"subw %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (diff_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmSub16(diff_16, op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
diff_16 = op1_16 - op2_16;
#endif
@ -778,18 +664,9 @@ BX_CPU_C::SUB_EwIw(bxInstruction_c *i)
read_RMW_virtual_word(i->seg(), RMAddr(i), &op1_16);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"subw %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (diff_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmSub16(diff_16, op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
diff_16 = op1_16 - op2_16;
#endif
@ -817,17 +694,9 @@ BX_CPU_C::CMP_EwIw(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"cmpw %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) | (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmCmp16(op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
Bit16u diff_16;
diff_16 = op1_16 - op2_16;
@ -885,42 +754,24 @@ BX_CPU_C::DEC_Ew(bxInstruction_c *i)
Bit16u op1_16;
if (i->modC0()) {
op1_16 = BX_READ_16BIT_REG(i->rm());
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"decw %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (op1_16)
: "1" (op1_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPMask) |
(flags32 & EFlagsOSZAPMask);
BX_CPU_THIS_PTR lf_flags_status &= 0x00000f;
asmDec16(BX_CPU_THIS_PTR gen_reg[i->rm()].word.rx, flags32);
setEFlagsOSZAP(flags32);
#else
op1_16 = BX_READ_16BIT_REG(i->rm());
op1_16--;
#endif
BX_WRITE_16BIT_REG(i->rm(), op1_16);
#endif
}
else {
read_RMW_virtual_word(i->seg(), RMAddr(i), &op1_16);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"decw %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (op1_16)
: "1" (op1_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPMask) |
(flags32 & EFlagsOSZAPMask);
BX_CPU_THIS_PTR lf_flags_status &= 0x00000f;
asmDec16(op1_16, flags32);
setEFlagsOSZAP(flags32);
#else
op1_16--;
#endif

168
bochs/cpu/arith32.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: arith32.cc,v 1.25 2002-10-02 04:01:45 bdenney Exp $
// $Id: arith32.cc,v 1.26 2002-10-07 22:51:56 kevinlawton Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -45,17 +45,9 @@ BX_CPU_C::INC_ERX(bxInstruction_c *i)
{
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"incl %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].dword.erx)
: "1" (BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].dword.erx)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPMask) | (flags32 & EFlagsOSZAPMask);
BX_CPU_THIS_PTR lf_flags_status &= 0x00000f;
asmInc32(BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].dword.erx, flags32);
setEFlagsOSZAP(flags32);
#else
Bit32u erx;
@ -76,17 +68,9 @@ BX_CPU_C::DEC_ERX(bxInstruction_c *i)
{
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"decl %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].dword.erx)
: "1" (BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].dword.erx)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPMask) | (flags32 & EFlagsOSZAPMask);
BX_CPU_THIS_PTR lf_flags_status &= 0x00000f;
asmDec32(BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].dword.erx, flags32);
setEFlagsOSZAP(flags32);
#else
Bit32u erx;
@ -131,29 +115,22 @@ BX_CPU_C::ADD_EdGd(bxInstruction_c *i)
BX_CPU_C::ADD_GdEEd(bxInstruction_c *i)
{
Bit32u op1_32, op2_32, sum_32;
unsigned nnn = i->nnn();
op1_32 = BX_READ_32BIT_REG(i->nnn());
op1_32 = BX_READ_32BIT_REG(nnn);
read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"addl %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (sum_32)
: "1" (op1_32), "g" (op2_32)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) | (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmAdd32(sum_32, op1_32, op2_32, flags32);
setEFlagsOSZAPC(flags32);
#else
sum_32 = op1_32 + op2_32;
#endif
BX_WRITE_32BIT_REGZ(i->nnn(), sum_32);
BX_WRITE_32BIT_REGZ(nnn, sum_32);
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
SET_FLAGS_OSZAPC_32(op1_32, op2_32, sum_32, BX_INSTR_ADD32);
@ -164,28 +141,21 @@ BX_CPU_C::ADD_GdEEd(bxInstruction_c *i)
BX_CPU_C::ADD_GdEGd(bxInstruction_c *i)
{
Bit32u op1_32, op2_32, sum_32;
unsigned nnn = i->nnn();
op1_32 = BX_READ_32BIT_REG(i->nnn());
op1_32 = BX_READ_32BIT_REG(nnn);
op2_32 = BX_READ_32BIT_REG(i->rm());
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"addl %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (sum_32)
: "1" (op1_32), "g" (op2_32)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) | (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmAdd32(sum_32, op1_32, op2_32, flags32);
setEFlagsOSZAPC(flags32);
#else
sum_32 = op1_32 + op2_32;
#endif
BX_WRITE_32BIT_REGZ(i->nnn(), sum_32);
BX_WRITE_32BIT_REGZ(nnn, sum_32);
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
SET_FLAGS_OSZAPC_32(op1_32, op2_32, sum_32, BX_INSTR_ADD32);
@ -414,8 +384,9 @@ BX_CPU_C::SUB_EdGd(bxInstruction_c *i)
BX_CPU_C::SUB_GdEd(bxInstruction_c *i)
{
Bit32u op1_32, op2_32, diff_32;
unsigned nnn = i->nnn();
op1_32 = BX_READ_32BIT_REG(i->nnn());
op1_32 = BX_READ_32BIT_REG(nnn);
if (i->modC0()) {
op2_32 = BX_READ_32BIT_REG(i->rm());
@ -424,11 +395,20 @@ BX_CPU_C::SUB_GdEd(bxInstruction_c *i)
read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
}
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asmSub32(diff_32, op1_32, op2_32, flags32);
setEFlagsOSZAPC(flags32);
#else
diff_32 = op1_32 - op2_32;
#endif
BX_WRITE_32BIT_REGZ(i->nnn(), diff_32);
BX_WRITE_32BIT_REGZ(nnn, diff_32);
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
SET_FLAGS_OSZAPC_32(op1_32, op2_32, diff_32, BX_INSTR_SUB32);
#endif
}
void
@ -463,17 +443,9 @@ BX_CPU_C::CMP_EdGd(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"cmpl %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_32), "g" (op2_32)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) | (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmCmp32(op1_32, op2_32, flags32);
setEFlagsOSZAPC(flags32);
#else
Bit32u diff_32;
diff_32 = op1_32 - op2_32;
@ -499,17 +471,9 @@ BX_CPU_C::CMP_GdEd(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"cmpl %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_32), "g" (op2_32)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) | (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmCmp32(op1_32, op2_32, flags32);
setEFlagsOSZAPC(flags32);
#else
Bit32u diff_32;
diff_32 = op1_32 - op2_32;
@ -529,17 +493,9 @@ BX_CPU_C::CMP_EAXId(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"cmpl %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_32), "g" (op2_32)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) | (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmCmp32(op1_32, op2_32, flags32);
setEFlagsOSZAPC(flags32);
#else
Bit32u diff_32;
diff_32 = op1_32 - op2_32;
@ -653,18 +609,9 @@ BX_CPU_C::ADD_EEdId(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"addl %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (sum_32)
: "1" (op1_32), "g" (op2_32)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmAdd32(sum_32, op1_32, op2_32, flags32);
setEFlagsOSZAPC(flags32);
#else
sum_32 = op1_32 + op2_32;
#endif
@ -686,18 +633,9 @@ BX_CPU_C::ADD_EGdId(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"addl %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (sum_32)
: "1" (op1_32), "g" (op2_32)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmAdd32(sum_32, op1_32, op2_32, flags32);
setEFlagsOSZAPC(flags32);
#else
sum_32 = op1_32 + op2_32;
#endif
@ -773,17 +711,9 @@ BX_CPU_C::CMP_EdId(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"cmpl %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_32), "g" (op2_32)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) | (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmCmp32(op1_32, op2_32, flags32);
setEFlagsOSZAPC(flags32);
#else
Bit32u diff_32;
diff_32 = op1_32 - op2_32;

58
bochs/cpu/arith8.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: arith8.cc,v 1.19 2002-09-30 02:02:06 kevinlawton Exp $
// $Id: arith8.cc,v 1.20 2002-10-07 22:51:56 kevinlawton Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -347,17 +347,9 @@ BX_CPU_C::CMP_EbGb(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"cmpb %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "q" (op1_8), "mq" (op2_8)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) | (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmCmp8(op1_8, op2_8, flags32);
setEFlagsOSZAPC(flags32);
#else
Bit8u diff_8;
diff_8 = op1_8 - op2_8;
@ -383,17 +375,9 @@ BX_CPU_C::CMP_GbEb(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"cmpb %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "q" (op1_8), "mq" (op2_8)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) | (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmCmp8(op1_8, op2_8, flags32);
setEFlagsOSZAPC(flags32);
#else
Bit8u diff_8;
diff_8 = op1_8 - op2_8;
@ -415,17 +399,9 @@ BX_CPU_C::CMP_ALIb(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"cmpb %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "q" (op1_8), "mq" (op2_8)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) | (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmCmp8(op1_8, op2_8, flags32);
setEFlagsOSZAPC(flags32);
#else
Bit8u diff_8;
diff_8 = op1_8 - op2_8;
@ -559,17 +535,9 @@ BX_CPU_C::CMP_EbIb(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"cmpb %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "q" (op1_8), "mq" (op2_8)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) | (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmCmp8(op1_8, op2_8, flags32);
setEFlagsOSZAPC(flags32);
#else
Bit8u diff_8;
diff_8 = op1_8 - op2_8;

4
bochs/cpu/cpu.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: cpu.cc,v 1.64 2002-10-06 22:08:18 kevinlawton Exp $
// $Id: cpu.cc,v 1.65 2002-10-07 22:51:56 kevinlawton Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -255,7 +255,7 @@ BX_CPU_C::cpu_loop(Bit32s max_instr_count)
ret = fetchDecode(fetchPtr, i, maxFetch);
}
BxExecutePtr_t resolveModRM = i->ResolveModrm; // Get function pointers as early
BxExecutePtr_t resolveModRM = i->ResolveModrm; // Get function pointers early.
if (ret==0) {
#if BX_SupportICache
// Invalidate entry, since fetch-decode failed with partial updates

338
bochs/cpu/cpu.h
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: cpu.h,v 1.99 2002-10-06 22:08:18 kevinlawton Exp $
// $Id: cpu.h,v 1.100 2002-10-07 22:51:57 kevinlawton Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -3039,4 +3039,340 @@ typedef enum _show_flags {
#define RMAddr(i) (BX_CPU_THIS_PTR address_xlation.rm_addr)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
#define setEFlagsOSZAPC(flags32) { \
BX_CPU_THIS_PTR eflags.val32 = \
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) | \
(flags32 & EFlagsOSZAPCMask); \
BX_CPU_THIS_PTR lf_flags_status = 0; \
}
#define setEFlagsOSZAP(flags32) { \
BX_CPU_THIS_PTR eflags.val32 = \
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPMask) | \
(flags32 & EFlagsOSZAPMask); \
BX_CPU_THIS_PTR lf_flags_status &= 0x00000f; \
}
// This section defines some convience inline functions which do the
// dirty work of asm() statements for arithmetic instructions on x86 hosts.
// Essentially these speed up eflags processing since the value of the
// eflags register can be read directly on x86 hosts, after the
// arithmetic operations.
static inline void
asmAdd16(Bit16u &sum_16, Bit16u op1_16, Bit16u op2_16, Bit32u &flags32)
{
asm (
"addw %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (sum_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
}
static inline void
asmAdd32(Bit32u &sum_32, Bit32u op1_32, Bit32u op2_32, Bit32u &flags32)
{
asm (
"addl %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (sum_32)
: "1" (op1_32), "g" (op2_32)
: "cc"
);
}
static inline void
asmSub16(Bit16u &diff_16, Bit16u op1_16, Bit16u op2_16, Bit32u &flags32)
{
asm (
"subw %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (diff_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
}
static inline void
asmSub32(Bit32u &diff_32, Bit32u op1_32, Bit32u op2_32, Bit32u &flags32)
{
asm (
"subl %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (diff_32)
: "1" (op1_32), "g" (op2_32)
: "cc"
);
}
static inline void
asmCmp8(Bit8u op1_8, Bit8u op2_8, Bit32u &flags32)
{
asm (
"cmpb %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "q" (op1_8), "mq" (op2_8)
: "cc"
);
}
static inline void
asmCmp16(Bit16u op1_16, Bit16u op2_16, Bit32u &flags32)
{
asm (
"cmpw %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_16), "g" (op2_16)
: "cc"
);
}
static inline void
asmCmp32(Bit32u op1_32, Bit32u op2_32, Bit32u &flags32)
{
asm (
"cmpl %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_32), "g" (op2_32)
: "cc"
);
}
static inline void
asmInc16(Bit16u &op1_16, Bit32u &flags32)
{
asm (
"incw %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=g" (op1_16)
: "1" (op1_16)
: "cc"
);
}
static inline void
asmInc32(Bit32u &op1_32, Bit32u &flags32)
{
asm (
"incl %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=g" (op1_32)
: "1" (op1_32)
: "cc"
);
}
static inline void
asmDec16(Bit16u &op1_16, Bit32u &flags32)
{
asm (
"decw %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=g" (op1_16)
: "1" (op1_16)
: "cc"
);
}
static inline void
asmDec32(Bit32u &op1_32, Bit32u &flags32)
{
asm (
"decl %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=g" (op1_32)
: "1" (op1_32)
: "cc"
);
}
static inline void
asmXor16(Bit16u &result_16, Bit16u op1_16, Bit16u op2_16, Bit32u &flags32)
{
asm (
"xorw %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
}
static inline void
asmXor32(Bit32u &result_32, Bit32u op1_32, Bit32u op2_32, Bit32u &flags32)
{
asm (
"xorl %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_32)
: "1" (op1_32), "g" (op2_32)
: "cc"
);
}
static inline void
asmOr8(Bit8u &result_8, Bit8u op1_8, Bit8u op2_8, Bit32u &flags32)
{
asm (
"orb %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=q" (result_8)
: "1" (op1_8), "mq" (op2_8)
: "cc"
);
}
static inline void
asmOr16(Bit16u &result_16, Bit16u op1_16, Bit16u op2_16, Bit32u &flags32)
{
asm (
"orw %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
}
static inline void
asmOr32(Bit32u &result_32, Bit32u op1_32, Bit32u op2_32, Bit32u &flags32)
{
asm (
"orl %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_32)
: "1" (op1_32), "g" (op2_32)
: "cc"
);
}
static inline void
asmAnd8(Bit8u &result_8, Bit8u op1_8, Bit8u op2_8, Bit32u &flags32)
{
asm (
"andb %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=q" (result_8)
: "1" (op1_8), "mq" (op2_8)
: "cc"
);
}
static inline void
asmAnd16(Bit16u &result_16, Bit16u op1_16, Bit16u op2_16, Bit32u &flags32)
{
asm (
"andw %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
}
static inline void
asmAnd32(Bit32u &result_32, Bit32u op1_32, Bit32u op2_32, Bit32u &flags32)
{
asm (
"andl %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_32)
: "1" (op1_32), "g" (op2_32)
: "cc"
);
}
static inline void
asmTest8(Bit8u op1_8, Bit8u op2_8, Bit32u &flags32)
{
asm (
"testb %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "q" (op1_8), "mq" (op2_8)
: "cc"
);
}
static inline void
asmTest16(Bit16u op1_16, Bit16u op2_16, Bit32u &flags32)
{
asm (
"testw %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_16), "g" (op2_16)
: "cc"
);
}
static inline void
asmTest32(Bit32u op1_32, Bit32u op2_32, Bit32u &flags32)
{
asm (
"testl %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_32), "g" (op2_32)
: "cc"
);
}
static inline void
asmShr16(Bit16u &result_16, Bit16u op1_16, unsigned count, Bit32u &flags32)
{
asm (
"shrw %%cl, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=g" (result_16)
: "1" (op1_16), "c" (count)
: "cc"
);
}
static inline void
asmShr32(Bit32u &result_32, Bit32u op1_32, unsigned count, Bit32u &flags32)
{
asm (
"shrl %%cl, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=g" (result_32)
: "1" (op1_32), "c" (count)
: "cc"
);
}
#endif
#endif // #ifndef BX_CPU_H

188
bochs/cpu/logical16.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: logical16.cc,v 1.14 2002-10-03 18:12:40 kevinlawton Exp $
// $Id: logical16.cc,v 1.15 2002-10-07 22:51:57 kevinlawton Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -45,20 +45,12 @@ BX_CPU_C::XOR_EwGw(bxInstruction_c *i)
if (i->modC0()) {
op1_16 = BX_READ_16BIT_REG(i->rm());
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"xorw %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmXor16(result_16, op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
result_16 = op1_16 ^ op2_16;
#endif
@ -68,18 +60,9 @@ BX_CPU_C::XOR_EwGw(bxInstruction_c *i)
read_RMW_virtual_word(i->seg(), RMAddr(i), &op1_16);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"xorw %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmXor16(result_16, op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
result_16 = op1_16 ^ op2_16;
#endif
@ -96,8 +79,9 @@ BX_CPU_C::XOR_EwGw(bxInstruction_c *i)
BX_CPU_C::XOR_GwEw(bxInstruction_c *i)
{
Bit16u op1_16, op2_16, result_16;
unsigned nnn = i->nnn();
op1_16 = BX_READ_16BIT_REG(i->nnn());
op1_16 = BX_READ_16BIT_REG(nnn);
if (i->modC0()) {
op2_16 = BX_READ_16BIT_REG(i->rm());
@ -108,7 +92,7 @@ BX_CPU_C::XOR_GwEw(bxInstruction_c *i)
result_16 = op1_16 ^ op2_16;
BX_WRITE_16BIT_REG(i->nnn(), result_16);
BX_WRITE_16BIT_REG(nnn, result_16);
SET_FLAGS_OSZAPC_16(op1_16, op2_16, result_16, BX_INSTR_XOR16);
}
@ -231,18 +215,9 @@ BX_CPU_C::OR_GwEw(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"orw %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmOr16(result_16, op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
result_16 = op1_16 | op2_16;
#endif
@ -284,18 +259,9 @@ BX_CPU_C::AND_EwGw(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"andw %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmAnd16(result_16, op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
result_16 = op1_16 & op2_16;
#endif
@ -307,18 +273,9 @@ BX_CPU_C::AND_EwGw(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"andw %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmAnd16(result_16, op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
result_16 = op1_16 & op2_16;
#endif
@ -348,18 +305,9 @@ BX_CPU_C::AND_GwEw(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"andw %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmAnd16(result_16, op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
result_16 = op1_16 & op2_16;
#endif
@ -382,18 +330,9 @@ BX_CPU_C::AND_AXIw(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"andw %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmAnd16(result_16, op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
result_16 = op1_16 & op2_16;
#endif
@ -417,18 +356,9 @@ BX_CPU_C::AND_EwIw(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"andw %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmAnd16(result_16, op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
result_16 = op1_16 & op2_16;
#endif
@ -440,18 +370,9 @@ BX_CPU_C::AND_EwIw(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"andw %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmAnd16(result_16, op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
result_16 = op1_16 & op2_16;
#endif
@ -481,18 +402,9 @@ BX_CPU_C::TEST_EwGw(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"testw %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmTest16(op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
Bit16u result_16;
result_16 = op1_16 & op2_16;
@ -513,18 +425,9 @@ BX_CPU_C::TEST_AXIw(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"testw %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmTest16(op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
Bit16u result_16;
result_16 = op1_16 & op2_16;
@ -550,18 +453,9 @@ BX_CPU_C::TEST_EwIw(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"testw %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmTest16(op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
Bit16u result_16;
result_16 = op1_16 & op2_16;

157
bochs/cpu/logical32.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: logical32.cc,v 1.15 2002-10-03 18:12:40 kevinlawton Exp $
// $Id: logical32.cc,v 1.16 2002-10-07 22:51:57 kevinlawton Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -62,8 +62,9 @@ BX_CPU_C::XOR_EdGd(bxInstruction_c *i)
BX_CPU_C::XOR_GdEd(bxInstruction_c *i)
{
Bit32u op1_32, op2_32, result_32;
unsigned nnn = i->nnn();
op1_32 = BX_READ_32BIT_REG(i->nnn());
op1_32 = BX_READ_32BIT_REG(nnn);
if (i->modC0()) {
op2_32 = BX_READ_32BIT_REG(i->rm());
@ -74,7 +75,7 @@ BX_CPU_C::XOR_GdEd(bxInstruction_c *i)
result_32 = op1_32 ^ op2_32;
BX_WRITE_32BIT_REGZ(i->nnn(), result_32);
BX_WRITE_32BIT_REGZ(nnn, result_32);
SET_FLAGS_OSZAPC_32(op1_32, op2_32, result_32, BX_INSTR_XOR32);
}
@ -198,18 +199,9 @@ BX_CPU_C::OR_GdEd(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"orl %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_32)
: "1" (op1_32), "g" (op2_32)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmOr32(result_32, op1_32, op2_32, flags32);
setEFlagsOSZAPC(flags32);
#else
result_32 = op1_32 | op2_32;
#endif
@ -255,18 +247,9 @@ BX_CPU_C::AND_EdGd(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"andl %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_32)
: "1" (op1_32), "g" (op2_32)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmAnd32(result_32, op1_32, op2_32, flags32);
setEFlagsOSZAPC(flags32);
#else
result_32 = op1_32 & op2_32;
#endif
@ -278,18 +261,9 @@ BX_CPU_C::AND_EdGd(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"andl %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_32)
: "1" (op1_32), "g" (op2_32)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmAnd32(result_32, op1_32, op2_32, flags32);
setEFlagsOSZAPC(flags32);
#else
result_32 = op1_32 & op2_32;
#endif
@ -319,18 +293,9 @@ BX_CPU_C::AND_GdEd(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"andl %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_32)
: "1" (op1_32), "g" (op2_32)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmAnd32(result_32, op1_32, op2_32, flags32);
setEFlagsOSZAPC(flags32);
#else
result_32 = op1_32 & op2_32;
#endif
@ -353,18 +318,9 @@ BX_CPU_C::AND_EAXId(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"andl %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_32)
: "1" (op1_32), "g" (op2_32)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmAnd32(result_32, op1_32, op2_32, flags32);
setEFlagsOSZAPC(flags32);
#else
result_32 = op1_32 & op2_32;
#endif
@ -392,18 +348,9 @@ BX_CPU_C::AND_EdId(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"andl %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_32)
: "1" (op1_32), "g" (op2_32)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmAnd32(result_32, op1_32, op2_32, flags32);
setEFlagsOSZAPC(flags32);
#else
result_32 = op1_32 & op2_32;
#endif
@ -415,18 +362,9 @@ BX_CPU_C::AND_EdId(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"andl %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_32)
: "1" (op1_32), "g" (op2_32)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmAnd32(result_32, op1_32, op2_32, flags32);
setEFlagsOSZAPC(flags32);
#else
result_32 = op1_32 & op2_32;
#endif
@ -456,18 +394,9 @@ BX_CPU_C::TEST_EdGd(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"testl %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_32), "g" (op2_32)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmTest32(op1_32, op2_32, flags32);
setEFlagsOSZAPC(flags32);
#else
Bit32u result_32;
result_32 = op1_32 & op2_32;
@ -488,18 +417,9 @@ BX_CPU_C::TEST_EAXId(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"testl %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_32), "g" (op2_32)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmTest32(op1_32, op2_32, flags32);
setEFlagsOSZAPC(flags32);
#else
Bit32u result_32;
result_32 = op1_32 & op2_32;
@ -525,18 +445,9 @@ BX_CPU_C::TEST_EdId(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"testl %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "r" (op1_32), "g" (op2_32)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmTest32(op1_32, op2_32, flags32);
setEFlagsOSZAPC(flags32);
#else
Bit32u result_32;
result_32 = op1_32 & op2_32;

173
bochs/cpu/logical8.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: logical8.cc,v 1.16 2002-10-03 18:12:40 kevinlawton Exp $
// $Id: logical8.cc,v 1.17 2002-10-07 22:51:57 kevinlawton Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -195,18 +195,9 @@ BX_CPU_C::OR_GbEb(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"orb %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result)
: "1" (op1), "g" (op2)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmOr8(result, op1, op2, flags32);
setEFlagsOSZAPC(flags32);
#else
result = op1 | op2;
#endif
@ -222,30 +213,21 @@ BX_CPU_C::OR_GbEb(bxInstruction_c *i)
void
BX_CPU_C::OR_ALIb(bxInstruction_c *i)
{
Bit8u op1, op2, sum;
Bit8u op1, op2, result;
op1 = AL;
op2 = i->Ib();
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"orb %3, %1 \n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (sum)
: "1" (op1), "g" (op2)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmOr8(result, op1, op2, flags32);
setEFlagsOSZAPC(flags32);
#else
sum = op1 | op2;
result = op1 | op2;
#endif
AL = sum;
AL = result;
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
SET_FLAGS_OSZAPC_8(op1, op2, sum, BX_INSTR_OR8);
@ -266,18 +248,9 @@ BX_CPU_C::AND_EbGb(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"andb %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=q" (result)
: "1" (op1), "mq" (op2)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmAnd8(result, op1, op2, flags32);
setEFlagsOSZAPC(flags32);
#else
result = op1 & op2;
#endif
@ -289,18 +262,9 @@ BX_CPU_C::AND_EbGb(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"andb %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=q" (result)
: "1" (op1), "mq" (op2)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmAnd8(result, op1, op2, flags32);
setEFlagsOSZAPC(flags32);
#else
result = op1 & op2;
#endif
@ -330,18 +294,9 @@ BX_CPU_C::AND_GbEb(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"andb %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=q" (result)
: "1" (op1), "mq" (op2)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmAnd8(result, op1, op2, flags32);
setEFlagsOSZAPC(flags32);
#else
result = op1 & op2;
#endif
@ -365,18 +320,9 @@ BX_CPU_C::AND_ALIb(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"andb %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=q" (result)
: "1" (op1), "mq" (op2)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmAnd8(result, op1, op2, flags32);
setEFlagsOSZAPC(flags32);
#else
result = op1 & op2;
#endif
@ -404,18 +350,9 @@ BX_CPU_C::AND_EbIb(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"andb %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=q" (result)
: "1" (op1), "mq" (op2)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmAnd8(result, op1, op2, flags32);
setEFlagsOSZAPC(flags32);
#else
result = op1 & op2;
#endif
@ -427,18 +364,9 @@ BX_CPU_C::AND_EbIb(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"andb %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=q" (result)
: "1" (op1), "mq" (op2)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmAnd8(result, op1, op2, flags32);
setEFlagsOSZAPC(flags32);
#else
result = op1 & op2;
#endif
@ -468,18 +396,9 @@ BX_CPU_C::TEST_EbGb(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"testb %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "q" (op1), "mq" (op2)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmTest8(op1, op2, flags32);
setEFlagsOSZAPC(flags32);
#else
Bit8u result;
result = op1 & op2;
@ -499,18 +418,9 @@ BX_CPU_C::TEST_ALIb(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"testb %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "q" (op1), "mq" (op2)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmTest8(op1, op2, flags32);
setEFlagsOSZAPC(flags32);
#else
Bit8u result;
result = op1 & op2;
@ -537,18 +447,9 @@ BX_CPU_C::TEST_EbIb(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"testb %2, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32)
: "q" (op1), "mq" (op2)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmTest8(op1, op2, flags32);
setEFlagsOSZAPC(flags32);
#else
Bit8u result;
result = op1 & op2;

16
bochs/cpu/shift16.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: shift16.cc,v 1.13 2002-10-03 18:12:40 kevinlawton Exp $
// $Id: shift16.cc,v 1.14 2002-10-07 22:51:58 kevinlawton Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -434,17 +434,9 @@ BX_CPU_C::SHR_Ew(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"shrw %%cl, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_16)
: "1" (op1_16), "c" (count)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) | (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmShr16(result_16, op1_16, count, flags32);
setEFlagsOSZAPC(flags32);
#else
result_16 = (op1_16 >> count);
#endif

16
bochs/cpu/shift32.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: shift32.cc,v 1.14 2002-10-03 18:12:40 kevinlawton Exp $
// $Id: shift32.cc,v 1.15 2002-10-07 22:51:58 kevinlawton Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -399,17 +399,9 @@ BX_CPU_C::SHR_Ed(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"shrl %%cl, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (result_32)
: "1" (op1_32), "c" (count)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) | (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmShr32(result_32, op1_32, count, flags32);
setEFlagsOSZAPC(flags32);
#else
result_32 = (op1_32 >> count);
#endif

124
bochs/cpu/string.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: string.cc,v 1.18 2002-10-03 18:12:40 kevinlawton Exp $
// $Id: string.cc,v 1.19 2002-10-07 22:51:58 kevinlawton Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -995,18 +995,9 @@ BX_CPU_C::CMPSB_XbYb(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"subb %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (diff_8)
: "1" (op1_8), "g" (op2_8)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmCmp8(op1_8, op2_8, flags32);
setEFlagsOSZAPC(flags32);
#else
diff_8 = op1_8 - op2_8;
@ -1178,7 +1169,7 @@ BX_CPU_C::CMPSW_XvYv(bxInstruction_c *i)
}
}
else { /* 16 bit opsize */
Bit16u op1_16, op2_16, diff_16;
Bit16u op1_16, op2_16;
read_virtual_word(seg, esi, &op1_16);
@ -1186,19 +1177,11 @@ BX_CPU_C::CMPSW_XvYv(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"subw %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (diff_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmCmp16(op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
Bit16u diff_16;
diff_16 = op1_16 - op2_16;
SET_FLAGS_OSZAPC_16(op1_16, op2_16, diff_16, BX_INSTR_CMPS16);
@ -1256,7 +1239,7 @@ BX_CPU_C::CMPSW_XvYv(bxInstruction_c *i)
else
#endif /* BX_CPU_LEVEL >= 3 */
{ /* 16 bit opsize */
Bit16u op1_16, op2_16, diff_16;
Bit16u op1_16, op2_16;
read_virtual_word(seg, si, &op1_16);
@ -1264,19 +1247,11 @@ BX_CPU_C::CMPSW_XvYv(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"subw %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (diff_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmCmp16(op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
Bit16u diff_16;
diff_16 = op1_16 - op2_16;
SET_FLAGS_OSZAPC_16(op1_16, op2_16, diff_16, BX_INSTR_CMPS16);
@ -1303,13 +1278,14 @@ BX_CPU_C::CMPSW_XvYv(bxInstruction_c *i)
void
BX_CPU_C::SCASB_ALXb(bxInstruction_c *i)
{
Bit8u op1_8, op2_8, diff_8;
Bit8u op1_8, op2_8;
#if BX_CPU_LEVEL >= 3
#if BX_SUPPORT_X86_64
if (i->as64L()) {
Bit64u rdi;
Bit8u diff_8;
rdi = RDI;
@ -1346,19 +1322,11 @@ BX_CPU_C::SCASB_ALXb(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"subb %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (diff_8)
: "1" (op1_8), "g" (op2_8)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmCmp8(op1_8, op2_8, flags32);
setEFlagsOSZAPC(flags32);
#else
Bit8u diff_8;
diff_8 = op1_8 - op2_8;
SET_FLAGS_OSZAPC_8(op1_8, op2_8, diff_8, BX_INSTR_SCAS8);
@ -1391,19 +1359,11 @@ BX_CPU_C::SCASB_ALXb(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"subb %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (diff_8)
: "1" (op1_8), "g" (op2_8)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmCmp8(op1_8, op2_8, flags32);
setEFlagsOSZAPC(flags32);
#else
Bit8u diff_8;
diff_8 = op1_8 - op2_8;
SET_FLAGS_OSZAPC_8(op1_8, op2_8, diff_8, BX_INSTR_SCAS8);
@ -1542,26 +1502,18 @@ BX_CPU_C::SCASW_eAXXv(bxInstruction_c *i)
}
}
else { /* 16 bit opsize */
Bit16u op1_16, op2_16, diff_16;
Bit16u op1_16, op2_16;
op1_16 = AX;
read_virtual_word(BX_SEG_REG_ES, edi, &op2_16);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"subw %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (diff_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmCmp16(op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
Bit16u diff_16;
diff_16 = op1_16 - op2_16;
SET_FLAGS_OSZAPC_16(op1_16, op2_16, diff_16, BX_INSTR_SCAS16);
@ -1611,26 +1563,18 @@ BX_CPU_C::SCASW_eAXXv(bxInstruction_c *i)
else
#endif /* BX_CPU_LEVEL >= 3 */
{ /* 16 bit opsize */
Bit16u op1_16, op2_16, diff_16;
Bit16u op1_16, op2_16;
op1_16 = AX;
read_virtual_word(BX_SEG_REG_ES, di, &op2_16);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
asm (
"subw %3, %1\n\t"
"pushfl \n\t"
"popl %0"
: "=g" (flags32), "=r" (diff_16)
: "1" (op1_16), "g" (op2_16)
: "cc"
);
BX_CPU_THIS_PTR eflags.val32 =
(BX_CPU_THIS_PTR eflags.val32 & ~EFlagsOSZAPCMask) |
(flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0;
asmCmp16(op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32);
#else
Bit16u diff_16;
diff_16 = op1_16 - op2_16;
SET_FLAGS_OSZAPC_16(op1_16, op2_16, diff_16, BX_INSTR_SCAS16);