diff --git a/bochs/cpu/decoder/fetchdecode.cc b/bochs/cpu/decoder/fetchdecode.cc
index 44bd38136..d5dfa87fe 100644
--- a/bochs/cpu/decoder/fetchdecode.cc
+++ b/bochs/cpu/decoder/fetchdecode.cc
@@ -170,7 +170,7 @@ bxIAOpcodeTable BxOpcodesTable[] = {
 };
 #undef  bx_define_opcode
 
-extern Bit16u WalkOpcodeTables(const BxOpcodeInfo_t *OpcodeInfoPtr, Bit16u &attr, Bit32u fetchModeMask, unsigned modrm, unsigned sse_prefix, unsigned osize, unsigned vex_vl, bx_bool vex_w);
+extern Bit16u WalkOpcodeTables(const BxOpcodeInfo_t *OpcodeInfoPtr, Bit16u &attr, bx_bool is_64, unsigned modrm, unsigned sse_prefix, unsigned osize, unsigned vex_vl, bx_bool vex_w);
 
 /* ************************** */
 /* 512 entries for 16bit mode */
@@ -1925,7 +1925,7 @@ fetch_b1:
     }
 #endif
 
-    ia_opcode = WalkOpcodeTables(OpcodeInfoPtr, attr, fetchModeMask, b2, sse_prefix, os_32, i->getVL(), vex_w);
+    ia_opcode = WalkOpcodeTables(OpcodeInfoPtr, attr, BX_FALSE, b2, sse_prefix, os_32, i->getVL(), vex_w);
   }
   else {
     // Opcode does not require a MODRM byte.
@@ -2205,7 +2205,7 @@ decode_done:
   return(0);
 }
 
-Bit16u WalkOpcodeTables(const BxOpcodeInfo_t *OpcodeInfoPtr, Bit16u &attr, Bit32u fetchModeMask, unsigned modrm, unsigned sse_prefix, unsigned osize, unsigned vex_vl, bx_bool vex_w)
+Bit16u WalkOpcodeTables(const BxOpcodeInfo_t *OpcodeInfoPtr, Bit16u &attr, bx_bool is_64, unsigned modrm, unsigned sse_prefix, unsigned osize, unsigned vex_vl, bx_bool vex_w)
 {
   // Parse mod-nnn-rm and related bytes
   unsigned mod_mem = (modrm & 0xc0) != 0xc0;
@@ -2306,7 +2306,7 @@ Bit16u WalkOpcodeTables(const BxOpcodeInfo_t *OpcodeInfoPtr, Bit16u &attr, Bit32
 #if BX_SUPPORT_AVX
       else {
         // VexW64 is ignored in 32-bit mode
-        if (has_alias == BxAliasVexW || (fetchModeMask & BX_FETCH_MODE_IS64_MASK) != 0) {
+        if (has_alias == BxAliasVexW || is_64) {
           alias = vex_w;
         }
       }
diff --git a/bochs/cpu/decoder/fetchdecode64.cc b/bochs/cpu/decoder/fetchdecode64.cc
index a3d0bc5ee..b4353310a 100644
--- a/bochs/cpu/decoder/fetchdecode64.cc
+++ b/bochs/cpu/decoder/fetchdecode64.cc
@@ -133,7 +133,7 @@ static unsigned sreg_mod1or2_base32[16] = {
 // table of all Bochs opcodes
 extern struct bxIAOpcodeTable BxOpcodesTable[];
 
-extern Bit16u WalkOpcodeTables(const BxOpcodeInfo_t *OpcodeInfoPtr, Bit16u &attr, Bit32u fetchModeMask, unsigned modrm, unsigned sse_prefix, unsigned osize, unsigned vex_vl, bx_bool vex_w);
+extern Bit16u WalkOpcodeTables(const BxOpcodeInfo_t *OpcodeInfoPtr, Bit16u &attr, bx_bool is_64, unsigned modrm, unsigned sse_prefix, unsigned osize, unsigned vex_vl, bx_bool vex_w);
 
 extern bx_bool assign_srcs(bxInstruction_c *i, unsigned ia_opcode, unsigned nnn, unsigned rm);
 #if BX_SUPPORT_AVX
@@ -2152,7 +2152,7 @@ fetch_b1:
     }
 #endif
 
-    ia_opcode = WalkOpcodeTables(OpcodeInfoPtr, attr, fetchModeMask, b2, sse_prefix, offset >> 9, i->getVL(), vex_w);
+    ia_opcode = WalkOpcodeTables(OpcodeInfoPtr, attr, BX_TRUE, b2, sse_prefix, offset >> 9, i->getVL(), vex_w);
   }
   else {
     // Opcode does not require a MODRM byte.