- add patch for CPUID function 0x80000001 for x86-64 emulation
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bochs/patches/patch.x86-64-cpuid
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239
bochs/patches/patch.x86-64-cpuid
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----------------------------------------------------------------------
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Patch name: patch.x86-64-cpuid
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Author: Paul Brook
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Date: Sun Jan 5 2003
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Detailed description:
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The attached patch fixes CPUID function 0x80000001 for x86-64 emulation
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Without it recent kernels refuse to boot, complaining about missing
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features.
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Patch was created with:
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cvs diff -u
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Apply patch to what version:
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cvs checked out on Sun Jan 5 2003
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Instructions:
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To patch, go to main bochs directory.
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Type "patch -p0 < THIS_PATCH_FILE".
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----------------------------------------------------------------------
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Index: cpu/proc_ctrl.cc
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===================================================================
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RCS file: /cvsroot/bochs/bochs/cpu/proc_ctrl.cc,v
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retrieving revision 1.63
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diff -u -r1.63 proc_ctrl.cc
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--- cpu/proc_ctrl.cc 13 Nov 2002 21:00:04 -0000 1.63
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+++ cpu/proc_ctrl.cc 5 Jan 2003 02:11:11 -0000
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@@ -1334,36 +1334,12 @@
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#endif
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}
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-
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- void
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-BX_CPU_C::CPUID(bxInstruction_c *i)
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+/* Get CPU feature flags. Returned by CPUID functions 1 and 80000001. */
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+ static inline Bit32u
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+get_std_cpuid_features()
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{
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-#if BX_CPU_LEVEL >= 4
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- unsigned type, family, model, stepping, features;
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-#endif
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+ unsigned features;
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- invalidate_prefetch_q();
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-
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-#if BX_CPU_LEVEL >= 4
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- switch (EAX) {
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- case 0:
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- // EAX: highest input value understood by CPUID
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- // EBX: vendor ID string
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- // EDX: vendor ID string
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- // ECX: vendor ID string
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- RAX = 1; // 486 or pentium
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-#if BX_SUPPORT_X86_64
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- RBX = 0x68747541; // "Auth"
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- RDX = 0x69746e65; // "enti"
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- RCX = 0x444d4163; // "cAMD"
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-#else
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- RBX = 0x756e6547; // "Genu"
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- RDX = 0x49656e69; // "ineI"
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- RCX = 0x6c65746e; // "ntel"
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-#endif
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- break;
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-
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- case 1:
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// EAX[3:0] Stepping ID
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// EAX[7:4] Model: starts at 1
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// EAX[11:8] Family: 4=486, 5=Pentium, 6=PPro
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@@ -1397,52 +1373,24 @@
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// [31:30] Reserved
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features = 0; // start with none
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- type = 0; // OEM
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-#if BX_CPU_LEVEL == 4
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- family = 4;
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# if BX_SUPPORT_FPU
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- // 486dx
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- model = 1;
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- stepping = 3;
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features |= 0x01;
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-# else
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- // 486sx
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- model = 2;
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- stepping = 3;
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# endif
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-#elif BX_CPU_LEVEL == 5
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- family = 5;
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- model = 1; // Pentium (60,66)
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- stepping = 3; // ???
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+#if (BX_CPU_LEVEL >= 5)
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+ features |= (1<<8); // Support CMPXCHG8B instruction
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features |= (1<<4); // implement TSC
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-# if BX_SUPPORT_FPU
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- features |= 0x01;
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-# endif
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# if BX_SUPPORT_MMX
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features |= (1<<23); // support MMX
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# endif
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-
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-#elif BX_CPU_LEVEL == 6
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- family = 6;
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-#if BX_SUPPORT_X86_64
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- model = 2; // Hammer returns what?
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-#else
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- model = 1; // Pentium Pro
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#endif
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- stepping = 3; // ???
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- features |= (1<<4); // implement TSC
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+
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+#if BX_CPU_LEVEL == 6
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features |= (1<<15); // Implement CMOV instructions.
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# if BX_SUPPORT_APIC
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features |= (1<<9); // APIC on chip
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# endif
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-# if BX_SUPPORT_FPU
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- features |= 0x01; // support FPU
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-# endif
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-# if BX_SUPPORT_MMX
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- features |= (1<<23); // support MMX
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-# endif
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# if BX_SUPPORT_SSE >= 1
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features |= (1<<24); // support FSAVE/FXRSTOR
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features |= (1<<25); // support SSE
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@@ -1450,9 +1398,6 @@
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# if BX_SUPPORT_SSE >= 2
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features |= (1<<26); // support SSE2
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# endif
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-
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-#else
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- BX_PANIC(("CPUID: not implemented for > 6"));
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#endif
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#if BX_SUPPORT_4MEG_PAGES
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@@ -1467,14 +1412,75 @@
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features |= (1<<6); // Support PAE.
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#endif
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-#if (BX_CPU_LEVEL >= 5)
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- features |= (1<<8); // Support CMPXCHG8B instruction
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+#if BX_SUPPORT_X86_64
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+ features |= (1<<5); //AMD specific MSR's
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+#endif
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+
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+ return features;
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+}
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+
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+ void
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+BX_CPU_C::CPUID(bxInstruction_c *i)
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+{
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+#if BX_CPU_LEVEL >= 4
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+ unsigned type, family, model, stepping, features;
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#endif
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+ invalidate_prefetch_q();
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+
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+#if BX_CPU_LEVEL >= 4
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+ switch (EAX) {
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+ case 0:
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+ // EAX: highest input value understood by CPUID
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+ // EBX: vendor ID string
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+ // EDX: vendor ID string
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+ // ECX: vendor ID string
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+ RAX = 1; // 486 or pentium
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+#if BX_SUPPORT_X86_64
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+ RBX = 0x68747541; // "Auth"
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+ RDX = 0x69746e65; // "enti"
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+ RCX = 0x444d4163; // "cAMD"
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+#else
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+ RBX = 0x756e6547; // "Genu"
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+ RDX = 0x49656e69; // "ineI"
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+ RCX = 0x6c65746e; // "ntel"
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+#endif
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+ break;
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+
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+ case 1:
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+
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+#if BX_CPU_LEVEL == 4
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+ family = 4;
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+# if BX_SUPPORT_FPU
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+ // 486dx
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+ model = 1;
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+ stepping = 3;
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+# else
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+ // 486sx
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+ model = 2;
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+ stepping = 3;
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+# endif
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+
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+#elif BX_CPU_LEVEL == 5
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+ family = 5;
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+ model = 1; // Pentium (60,66)
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+ stepping = 3; // ???
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+
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+#elif BX_CPU_LEVEL == 6
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+ family = 6;
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+#if BX_SUPPORT_X86_64
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+ model = 2; // Hammer returns what?
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+#else
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+ model = 1; // Pentium Pro
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+#endif
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+ stepping = 3; // ???
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+#else
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+ BX_PANIC(("CPUID: not implemented for > 6"));
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+#endif
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RAX = (family <<8) | (model<<4) | stepping;
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RBX = RCX = 0; // reserved
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- RDX = features;
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+ RDX = get_std_cpuid_features ();
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break;
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#if BX_SUPPORT_X86_64
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@@ -1489,9 +1495,23 @@
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case 0x80000001:
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// long mode supported.
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- // bug in manual - should be EDX not EAX
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- RDX = (1 << 29);
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- RAX = RBX = RCX = 0;
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+ features = get_std_cpuid_features ();
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+ RAX = features;
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+ // Many of the bits in EDX are the same as EAX
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+ // [10:10] Reserved
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+ // [11:11] SYSCALL and SYSRET instructions
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+ // [18:19] Reserved
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+ // [20:20] No-Execute page protection
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+ // [21:21] Reserved
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+ // [22:22] AMD MMX Extensions
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+ // [25:28] Reserved
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+ // [29:29] Long Mode
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+ // [30:30] AMD 3DNow Extensions
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+ // [31:31] AMD 3DNow Intructions
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+ features = features & 0x0183F3FF;
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+ RDX = features | (1 << 29) | (1 << 11);
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+ // RAX = RBX = RCX = 0;
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+ RBX = RCX = 0;
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break;
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case 0x80000008:
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