Only indent and style changes
This commit is contained in:
Stanislav Shwartsman
parent
7ed117f0e0
commit
b3420e7e56
@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: pci.cc,v 1.43 2006-02-27 19:04:00 sshwarts Exp $
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// $Id: pci.cc,v 1.44 2006-03-03 20:15:07 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2002 MandrakeSoft S.A.
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@ -40,8 +40,7 @@
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bx_pci_c *thePciBridge = NULL;
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int
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libpci_LTX_plugin_init(plugin_t *plugin, plugintype_t type, int argc, char *argv[])
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int libpci_LTX_plugin_init(plugin_t *plugin, plugintype_t type, int argc, char *argv[])
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{
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thePciBridge = new bx_pci_c ();
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bx_devices.pluginPciBridge = thePciBridge;
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@ -49,26 +48,23 @@ libpci_LTX_plugin_init(plugin_t *plugin, plugintype_t type, int argc, char *argv
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return(0); // Success
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}
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void
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libpci_LTX_plugin_fini(void)
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void libpci_LTX_plugin_fini(void)
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{
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}
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bx_pci_c::bx_pci_c(void)
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bx_pci_c::bx_pci_c()
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{
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put("PCI");
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settype(PCILOG);
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}
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bx_pci_c::~bx_pci_c(void)
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bx_pci_c::~bx_pci_c()
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{
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// nothing for now
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BX_DEBUG(("Exit."));
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}
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void
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bx_pci_c::init(void)
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void bx_pci_c::init(void)
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{
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// called once when bochs initializes
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unsigned i;
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@ -78,7 +74,7 @@ bx_pci_c::init(void)
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for (i=0; i < BX_MAX_PCI_DEVICES; i++) {
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BX_PCI_THIS pci_handler[i].read = NULL;
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BX_PCI_THIS pci_handler[i].write = NULL;
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}
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}
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for (i=0; i < 0x100; i++) {
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BX_PCI_THIS pci_handler_id[i] = BX_MAX_PCI_DEVICES; // not assigned
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@ -154,23 +150,18 @@ bx_pci_c::reset(unsigned type)
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BX_PCI_THIS s.i440fx.pci_conf[i] = 0x00;
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}
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// static IO port read callback handler
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// redirects to non-static class handler to avoid virtual functions
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// static IO port read callback handler
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// redirects to non-static class handler to avoid virtual functions
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Bit32u
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bx_pci_c::read_handler(void *this_ptr, Bit32u address, unsigned io_len)
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Bit32u bx_pci_c::read_handler(void *this_ptr, Bit32u address, unsigned io_len)
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{
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#if !BX_USE_PCI_SMF
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bx_pci_c *class_ptr = (bx_pci_c *) this_ptr;
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return( class_ptr->read(address, io_len) );
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return class_ptr->read(address, io_len);
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}
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Bit32u
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bx_pci_c::read(Bit32u address, unsigned io_len)
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Bit32u bx_pci_c::read(Bit32u address, unsigned io_len)
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{
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#else
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UNUSED(this_ptr);
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@ -186,7 +177,7 @@ bx_pci_c::read(Bit32u address, unsigned io_len)
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case 0x0CFD:
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case 0x0CFE:
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case 0x0CFF:
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{
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{
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Bit32u handle, retval;
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Bit8u devfunc, regnum;
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@ -199,25 +190,22 @@ bx_pci_c::read(Bit32u address, unsigned io_len)
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(BX_PCI_THIS pci_handler[handle].this_ptr, regnum, io_len);
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else
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retval = 0xFFFFFFFF;
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}
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}
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else
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retval = 0xFFFFFFFF;
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BX_PCI_THIS s.i440fx.confData = retval;
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return retval;
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}
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}
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}
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BX_PANIC(("unsupported IO read to port 0x%x",
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(unsigned) address));
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BX_PANIC(("unsupported IO read to port 0x%x", (unsigned) address));
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return(0xffffffff);
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}
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// static IO port write callback handler
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// redirects to non-static class handler to avoid virtual functions
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// static IO port write callback handler
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// redirects to non-static class handler to avoid virtual functions
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void
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bx_pci_c::write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len)
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void bx_pci_c::write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len)
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{
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#if !BX_USE_PCI_SMF
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bx_pci_c *class_ptr = (bx_pci_c *) this_ptr;
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@ -225,8 +213,7 @@ bx_pci_c::write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned i
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class_ptr->write(address, value, io_len);
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}
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void
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bx_pci_c::write(Bit32u address, Bit32u value, unsigned io_len)
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void bx_pci_c::write(Bit32u address, Bit32u value, unsigned io_len)
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{
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#else
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UNUSED(this_ptr);
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@ -262,7 +249,7 @@ bx_pci_c::write(Bit32u address, Bit32u value, unsigned io_len)
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(* BX_PCI_THIS pci_handler[handle].write)
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(BX_PCI_THIS pci_handler[handle].this_ptr, regnum, value, io_len);
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BX_PCI_THIS s.i440fx.confData = value << (8 * (address & 0x03));
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}
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}
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else
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BX_DEBUG(("read only register, write ignored"));
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}
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@ -275,22 +262,17 @@ bx_pci_c::write(Bit32u address, Bit32u value, unsigned io_len)
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}
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}
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// static pci configuration space read callback handler
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// redirects to non-static class handler to avoid virtual functions
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// static pci configuration space read callback handler
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// redirects to non-static class handler to avoid virtual functions
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Bit32u
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bx_pci_c::pci_read_handler(void *this_ptr, Bit8u address, unsigned io_len)
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Bit32u bx_pci_c::pci_read_handler(void *this_ptr, Bit8u address, unsigned io_len)
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{
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#if !BX_USE_PCI_SMF
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bx_pci_c *class_ptr = (bx_pci_c *) this_ptr;
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return( class_ptr->pci_read(address, io_len) );
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return class_ptr->pci_read(address, io_len);
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}
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Bit32u
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bx_pci_c::pci_read(Bit8u address, unsigned io_len)
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Bit32u bx_pci_c::pci_read(Bit8u address, unsigned io_len)
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{
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#else
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UNUSED(this_ptr);
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@ -304,26 +286,22 @@ bx_pci_c::pci_read(Bit8u address, unsigned io_len)
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}
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BX_DEBUG(("440FX PMC read register 0x%02x value 0x%08x", address, val440fx));
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return val440fx;
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}
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}
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else
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return(0xffffffff);
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}
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// static pci configuration space write callback handler
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// redirects to non-static class handler to avoid virtual functions
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// static pci configuration space write callback handler
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// redirects to non-static class handler to avoid virtual functions
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void
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bx_pci_c::pci_write_handler(void *this_ptr, Bit8u address, Bit32u value, unsigned io_len)
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void bx_pci_c::pci_write_handler(void *this_ptr, Bit8u address, Bit32u value, unsigned io_len)
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{
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#if !BX_USE_PCI_SMF
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bx_pci_c *class_ptr = (bx_pci_c *) this_ptr;
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class_ptr->pci_write(address, value, io_len);
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}
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void
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bx_pci_c::pci_write(Bit8u address, Bit32u value, unsigned io_len)
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void bx_pci_c::pci_write(Bit8u address, Bit32u value, unsigned io_len)
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{
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#else
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UNUSED(this_ptr);
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@ -345,121 +323,116 @@ bx_pci_c::pci_write(Bit8u address, Bit32u value, unsigned io_len)
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break;
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default:
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BX_PCI_THIS s.i440fx.pci_conf[address+i] = value8;
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BX_DEBUG(("440FX PMC write register 0x%02x value 0x%02x", address+i,
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value8));
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}
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BX_DEBUG(("440FX PMC write register 0x%02x value 0x%02x", address+i, value8));
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}
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}
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}
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}
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Bit8u
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bx_pci_c::rd_memType (Bit32u addr)
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Bit8u bx_pci_c::rd_memType(Bit32u addr)
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{
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switch ((addr & 0xFC000) >> 12) {
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case 0xC0:
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return (BX_PCI_THIS s.i440fx.pci_conf[0x5A] & 0x1);
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case 0xC4:
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5A] >> 4) & 0x1);
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return ((BX_PCI_THIS s.i440fx.pci_conf[0x5A] >> 4) & 0x1);
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case 0xC8:
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return (BX_PCI_THIS s.i440fx.pci_conf[0x5B] & 0x1);
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case 0xCC:
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5B] >> 4) & 0x1);
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return ((BX_PCI_THIS s.i440fx.pci_conf[0x5B] >> 4) & 0x1);
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case 0xD0:
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return (BX_PCI_THIS s.i440fx.pci_conf[0x5C] & 0x1);
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case 0xD4:
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5C] >> 4) & 0x1);
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return ((BX_PCI_THIS s.i440fx.pci_conf[0x5C] >> 4) & 0x1);
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case 0xD8:
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return (BX_PCI_THIS s.i440fx.pci_conf[0x5D] & 0x1);
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case 0xDC:
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5D] >> 4) & 0x1);
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return ((BX_PCI_THIS s.i440fx.pci_conf[0x5D] >> 4) & 0x1);
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case 0xE0:
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return (BX_PCI_THIS s.i440fx.pci_conf[0x5E] & 0x1);
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case 0xE4:
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5E] >> 4) & 0x1);
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return ((BX_PCI_THIS s.i440fx.pci_conf[0x5E] >> 4) & 0x1);
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case 0xE8:
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return (BX_PCI_THIS s.i440fx.pci_conf[0x5F] & 0x1);
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case 0xEC:
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5F] >> 4) & 0x1);
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return ((BX_PCI_THIS s.i440fx.pci_conf[0x5F] >> 4) & 0x1);
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case 0xF0:
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case 0xF4:
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case 0xF8:
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case 0xFC:
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x59] >> 4) & 0x1);
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return ((BX_PCI_THIS s.i440fx.pci_conf[0x59] >> 4) & 0x1);
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default:
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BX_PANIC(("rd_memType () Error: Memory Type not known !"));
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return(0); // keep compiler happy
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break;
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}
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return(0); // keep compiler happy
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}
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Bit8u
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bx_pci_c::wr_memType (Bit32u addr)
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Bit8u bx_pci_c::wr_memType(Bit32u addr)
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{
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switch ((addr & 0xFC000) >> 12) {
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case 0xC0:
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5A] >> 1) & 0x1);
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return ((BX_PCI_THIS s.i440fx.pci_conf[0x5A] >> 1) & 0x1);
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case 0xC4:
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5A] >> 5) & 0x1);
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return ((BX_PCI_THIS s.i440fx.pci_conf[0x5A] >> 5) & 0x1);
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case 0xC8:
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5B] >> 1) & 0x1);
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return ((BX_PCI_THIS s.i440fx.pci_conf[0x5B] >> 1) & 0x1);
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case 0xCC:
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5B] >> 5) & 0x1);
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return ((BX_PCI_THIS s.i440fx.pci_conf[0x5B] >> 5) & 0x1);
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case 0xD0:
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5C] >> 1) & 0x1);
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return ((BX_PCI_THIS s.i440fx.pci_conf[0x5C] >> 1) & 0x1);
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case 0xD4:
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5C] >> 5) & 0x1);
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return ((BX_PCI_THIS s.i440fx.pci_conf[0x5C] >> 5) & 0x1);
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case 0xD8:
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5D] >> 1) & 0x1);
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return ((BX_PCI_THIS s.i440fx.pci_conf[0x5D] >> 1) & 0x1);
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case 0xDC:
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5D] >> 5) & 0x1);
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return ((BX_PCI_THIS s.i440fx.pci_conf[0x5D] >> 5) & 0x1);
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case 0xE0:
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5E] >> 1) & 0x1);
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return ((BX_PCI_THIS s.i440fx.pci_conf[0x5E] >> 1) & 0x1);
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case 0xE4:
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5E] >> 5) & 0x1);
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return ((BX_PCI_THIS s.i440fx.pci_conf[0x5E] >> 5) & 0x1);
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case 0xE8:
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5F] >> 1) & 0x1);
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return ((BX_PCI_THIS s.i440fx.pci_conf[0x5F] >> 1) & 0x1);
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case 0xEC:
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5F] >> 5) & 0x1);
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return ((BX_PCI_THIS s.i440fx.pci_conf[0x5F] >> 5) & 0x1);
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case 0xF0:
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case 0xF4:
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case 0xF8:
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case 0xFC:
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x59] >> 5) & 0x1);
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return ((BX_PCI_THIS s.i440fx.pci_conf[0x59] >> 5) & 0x1);
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default:
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BX_PANIC(("wr_memType () Error: Memory Type not known !"));
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return(0); // keep compiler happy
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break;
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}
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return(0); // keep compiler happy
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}
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void
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bx_pci_c::print_i440fx_state()
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void bx_pci_c::print_i440fx_state()
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{
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int i;
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int i;
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BX_DEBUG(( "i440fxConfAddr:0x%08x", BX_PCI_THIS s.i440fx.confAddr ));
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BX_DEBUG(( "i440fxConfData:0x%08x", BX_PCI_THIS s.i440fx.confData ));
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BX_DEBUG(("i440fxConfAddr:0x%08x", BX_PCI_THIS s.i440fx.confAddr));
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BX_DEBUG(("i440fxConfData:0x%08x", BX_PCI_THIS s.i440fx.confData));
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#ifdef DUMP_FULL_I440FX
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for (i=0; i<256; i++) {
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BX_DEBUG(( "i440fxArray%02x:0x%02x", i, BX_PCI_THIS s.i440fx.pci_conf[i] ));
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}
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BX_DEBUG(("i440fxArray%02x:0x%02x", i, BX_PCI_THIS s.i440fx.pci_conf[i]));
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}
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#else /* DUMP_FULL_I440FX */
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for (i=0x59; i<0x60; i++) {
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BX_DEBUG(( "i440fxArray%02x:0x%02x", i, BX_PCI_THIS s.i440fx.pci_conf[i] ));
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}
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BX_DEBUG(("i440fxArray%02x:0x%02x", i, BX_PCI_THIS s.i440fx.pci_conf[i]));
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}
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#endif /* DUMP_FULL_I440FX */
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}
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@ -494,7 +467,7 @@ bx_pci_c::register_pci_handlers( void *this_ptr, bx_pci_read_handler_t f1,
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BX_INFO(("too many PCI devices installed."));
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BX_PANIC((" try increasing BX_MAX_PCI_DEVICES"));
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return false;
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}
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}
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handle = BX_PCI_THIS num_pci_handles++;
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BX_PCI_THIS pci_handler[handle].read = f1;
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BX_PCI_THIS pci_handler[handle].write = f2;
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@ -503,15 +476,13 @@ bx_pci_c::register_pci_handlers( void *this_ptr, bx_pci_read_handler_t f1,
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BX_INFO(("%s present at device %d, function %d", descr, *devfunc >> 3,
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*devfunc & 0x07));
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return true; // device/function mapped successfully
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}
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}
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else {
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return false; // device/function not available, return false.
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}
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}
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}
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bx_bool
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bx_pci_c::is_pci_device(const char *name)
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bx_bool bx_pci_c::is_pci_device(const char *name)
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{
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unsigned i;
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char devname[80];
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@ -527,8 +498,7 @@ bx_pci_c::is_pci_device(const char *name)
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return 0;
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}
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bx_bool
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bx_pci_c::pci_set_base_mem(void *this_ptr, memory_handler_t f1, memory_handler_t f2,
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bx_bool bx_pci_c::pci_set_base_mem(void *this_ptr, memory_handler_t f1, memory_handler_t f2,
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Bit32u *addr, Bit8u *pci_conf, unsigned size)
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{
|
||||
Bit32u newbase;
|
||||
@ -555,8 +525,7 @@ bx_pci_c::pci_set_base_mem(void *this_ptr, memory_handler_t f1, memory_handler_t
|
||||
return 0;
|
||||
}
|
||||
|
||||
bx_bool
|
||||
bx_pci_c::pci_set_base_io(void *this_ptr, bx_read_handler_t f1, bx_write_handler_t f2,
|
||||
bx_bool bx_pci_c::pci_set_base_io(void *this_ptr, bx_read_handler_t f1, bx_write_handler_t f2,
|
||||
Bit32u *addr, Bit8u *pci_conf, unsigned size,
|
||||
const Bit8u *iomask, const char *name)
|
||||
{
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: pci.h,v 1.21 2005-11-15 17:19:28 vruppert Exp $
|
||||
// $Id: pci.h,v 1.22 2006-03-03 20:15:07 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2002 MandrakeSoft S.A.
|
||||
@ -50,17 +50,15 @@ typedef struct {
|
||||
Bit32u confAddr;
|
||||
Bit32u confData;
|
||||
Bit8u pci_conf[256];
|
||||
} bx_def440fx_t;
|
||||
|
||||
} bx_def440fx_t;
|
||||
|
||||
|
||||
class bx_pci_c : public bx_pci_stub_c {
|
||||
|
||||
public:
|
||||
bx_pci_c(void);
|
||||
~bx_pci_c(void);
|
||||
virtual void init(void);
|
||||
virtual void reset(unsigned type);
|
||||
bx_pci_c();
|
||||
~bx_pci_c();
|
||||
virtual void init(void);
|
||||
virtual void reset(unsigned type);
|
||||
virtual bx_bool register_pci_handlers(void *this_ptr,
|
||||
bx_pci_read_handler_t f1,
|
||||
bx_pci_write_handler_t f2,
|
||||
@ -74,7 +72,7 @@ public:
|
||||
bx_write_handler_t f2, Bit32u *addr,
|
||||
Bit8u *pci_conf, unsigned size,
|
||||
const Bit8u *iomask, const char *name);
|
||||
virtual void print_i440fx_state(void);
|
||||
virtual void print_i440fx_state(void);
|
||||
virtual Bit8u rd_memType (Bit32u addr);
|
||||
virtual Bit8u wr_memType (Bit32u addr);
|
||||
|
||||
@ -83,7 +81,7 @@ private:
|
||||
struct {
|
||||
bx_pci_read_handler_t read;
|
||||
bx_pci_write_handler_t write;
|
||||
void *this_ptr;
|
||||
void *this_ptr;
|
||||
} pci_handler[BX_MAX_PCI_DEVICES];
|
||||
unsigned num_pci_handles;
|
||||
|
||||
@ -92,7 +90,7 @@ private:
|
||||
|
||||
struct {
|
||||
bx_def440fx_t i440fx;
|
||||
} s;
|
||||
} s;
|
||||
|
||||
static Bit32u read_handler(void *this_ptr, Bit32u address, unsigned io_len);
|
||||
static void write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len);
|
||||
@ -104,4 +102,4 @@ private:
|
||||
Bit32u pci_read(Bit8u address, unsigned io_len);
|
||||
void pci_write(Bit8u address, Bit32u value, unsigned io_len);
|
||||
#endif
|
||||
};
|
||||
};
|
||||
|
||||
Loading…
Reference in New Issue
Block a user