From afdccad36cb0500e7bc451e4666364cba6ad2d25 Mon Sep 17 00:00:00 2001 From: Gregory Alexander Date: Fri, 6 Sep 2002 16:29:49 +0000 Subject: [PATCH] Oops, had to fix a bunch of parentheses. Why | has precedence under == (or is it =) I still don't understand. --- bochs/cpu/access.cc | 24 ++++++++++++------------ bochs/cpu/paging.cc | 20 ++++++++++---------- bochs/debug/dbg_main.cc | 4 ++-- 3 files changed, 24 insertions(+), 24 deletions(-) diff --git a/bochs/cpu/access.cc b/bochs/cpu/access.cc index 3f6fbc014..6c4ac6992 100644 --- a/bochs/cpu/access.cc +++ b/bochs/cpu/access.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: access.cc,v 1.19 2002-09-06 14:58:55 yakovlev Exp $ +// $Id: access.cc,v 1.20 2002-09-06 16:29:49 yakovlev Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -280,7 +280,7 @@ accessOK: pageOffset = laddr & 0xfff; tlbIndex = BX_TLB_INDEX_OF(laddr); lpf = laddr & 0xfffff000; - if (BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf == lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate) { + if (BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf == (lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate)) { Bit32u accessBits; // See if the TLB entry privilege level allows us write access @@ -333,7 +333,7 @@ accessOK: if (pageOffset <= 0xffe) { // Make sure access does not span 2 pages. tlbIndex = BX_TLB_INDEX_OF(laddr); lpf = laddr & 0xfffff000; - if (BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf == lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate) { + if (BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf == (lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate)) { Bit32u accessBits; // See if the TLB entry privilege level allows us write access @@ -387,7 +387,7 @@ accessOK: if (pageOffset <= 0xffc) { // Make sure access does not span 2 pages. tlbIndex = BX_TLB_INDEX_OF(laddr); lpf = laddr & 0xfffff000; - if (BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf == lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate) { + if (BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf == (lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate)) { Bit32u accessBits; // See if the TLB entry privilege level allows us write access @@ -440,7 +440,7 @@ accessOK: pageOffset = laddr & 0xfff; tlbIndex = BX_TLB_INDEX_OF(laddr); lpf = laddr & 0xfffff000; - if (BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf == lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate) { + if (BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf == (lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate)) { // See if the TLB entry privilege level allows us read access // from this CPL. Bit32u accessBits; @@ -494,7 +494,7 @@ accessOK: Bit32u lpf, tlbIndex; tlbIndex = BX_TLB_INDEX_OF(laddr); lpf = laddr & 0xfffff000; - if (BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf == lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate) { + if (BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf == (lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate)) { // See if the TLB entry privilege level allows us read access // from this CPL. Bit32u accessBits; @@ -549,7 +549,7 @@ accessOK: Bit32u lpf, tlbIndex; tlbIndex = BX_TLB_INDEX_OF(laddr); lpf = laddr & 0xfffff000; - if (BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf == lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate) { + if (BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf == (lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate)) { // See if the TLB entry privilege level allows us read access // from this CPL. Bit32u accessBits; @@ -606,7 +606,7 @@ accessOK: pageOffset = laddr & 0xfff; tlbIndex = BX_TLB_INDEX_OF(laddr); lpf = laddr & 0xfffff000; - if (BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf == lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate) { + if (BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf == (lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate)) { Bit32u accessBits; // See if the TLB entry privilege level allows us write access @@ -664,7 +664,7 @@ accessOK: if (pageOffset <= 0xffe) { // Make sure access does not span 2 pages. tlbIndex = BX_TLB_INDEX_OF(laddr); lpf = laddr & 0xfffff000; - if (BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf == lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate) { + if (BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf == (lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate)) { Bit32u accessBits; // See if the TLB entry privilege level allows us write access @@ -720,7 +720,7 @@ accessOK: if (pageOffset <= 0xffc) { // Make sure access does not span 2 pages. tlbIndex = BX_TLB_INDEX_OF(laddr); lpf = laddr & 0xfffff000; - if (BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf == lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate) { + if (BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf == (lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate)) { Bit32u accessBits; // See if the TLB entry privilege level allows us write access @@ -843,7 +843,7 @@ accessOK: if (pageOffset <= 0xff8) { // Make sure access does not span 2 pages. tlbIndex = BX_TLB_INDEX_OF(laddr); lpf = laddr & 0xfffff000; - if (BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf == lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate) { + if (BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf == (lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate)) { Bit32u accessBits; // See if the TLB entry privilege level allows us write access @@ -898,7 +898,7 @@ accessOK: Bit32u lpf, tlbIndex; tlbIndex = BX_TLB_INDEX_OF(laddr); lpf = laddr & 0xfffff000; - if (BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf == lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate) { + if (BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf == (lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate)) { // See if the TLB entry privilege level allows us read access // from this CPL. Bit32u accessBits; diff --git a/bochs/cpu/paging.cc b/bochs/cpu/paging.cc index ab795b2d9..9dd2e2fa6 100644 --- a/bochs/cpu/paging.cc +++ b/bochs/cpu/paging.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: paging.cc,v 1.16 2002-09-06 14:58:56 yakovlev Exp $ +// $Id: paging.cc,v 1.17 2002-09-06 16:29:49 yakovlev Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -533,7 +533,7 @@ BX_CPU_C::dtranslate_linear(Bit32u laddr, unsigned pl, unsigned rw) isWrite = (rw>=BX_WRITE); // write or r-m-w - if (BX_CPU_THIS_PTR TLB.entry[TLB_index].lpf == lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate) { + if (BX_CPU_THIS_PTR TLB.entry[TLB_index].lpf == (lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate)) { paddress = BX_CPU_THIS_PTR TLB.entry[TLB_index].ppf | poffset; accessBits = BX_CPU_THIS_PTR TLB.entry[TLB_index].accessBits; if (accessBits & (1 << ((isWrite<<1) | pl)) ) { @@ -663,7 +663,7 @@ pageTableWalk: // Calculate physical memory address and fill in TLB cache entry paddress = ppf | poffset; - BX_CPU_THIS_PTR TLB.entry[TLB_index].lpf = lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate; + BX_CPU_THIS_PTR TLB.entry[TLB_index].lpf = (lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate); BX_CPU_THIS_PTR TLB.entry[TLB_index].ppf = ppf; // 1 << ((W<<1) | U) @@ -724,7 +724,7 @@ BX_CPU_C::itranslate_linear(Bit32u laddr, unsigned pl) TLB_index = BX_TLB_INDEX_OF(lpf); - if (BX_CPU_THIS_PTR TLB.entry[TLB_index].lpf == lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate) { + if (BX_CPU_THIS_PTR TLB.entry[TLB_index].lpf == (lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate)) { paddress = BX_CPU_THIS_PTR TLB.entry[TLB_index].ppf | poffset; accessBits = BX_CPU_THIS_PTR TLB.entry[TLB_index].accessBits; if (accessBits & (1 << pl) ) { @@ -846,7 +846,7 @@ pageTableWalk: // Calculate physical memory address and fill in TLB cache entry paddress = ppf | poffset; - BX_CPU_THIS_PTR TLB.entry[TLB_index].lpf = lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate; + BX_CPU_THIS_PTR TLB.entry[TLB_index].lpf = (lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate); BX_CPU_THIS_PTR TLB.entry[TLB_index].ppf = ppf; // 1 << ((W<<1) | U) @@ -902,7 +902,7 @@ BX_CPU_C::dbg_xlate_linear2phy(Bit32u laddr, Bit32u *phy, Boolean *valid) TLB_index = BX_TLB_INDEX_OF(lpf); // see if page is in the TLB first - if (BX_CPU_THIS_PTR TLB.entry[TLB_index].lpf == lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate) { + if (BX_CPU_THIS_PTR TLB.entry[TLB_index].lpf == (lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate)) { paddress = BX_CPU_THIS_PTR TLB.entry[TLB_index].ppf | poffset; *phy = paddress; *valid = 1; @@ -1085,13 +1085,13 @@ BX_CPU_C::access_linear(Bit32u laddr, unsigned length, unsigned pl, #if BX_SupportGuest2HostTLB tlbIndex = BX_TLB_INDEX_OF(laddr); lpf = laddr & 0xfffff000; - if (BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf == lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate) { + if (BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf == (lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate)) { BX_CPU_THIS_PTR mem->readPhysicalPage(this, laddr, length, data); return; } // We haven't seen this page, or it's been bumped before. - BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf = lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate; + BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf = (lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate); BX_CPU_THIS_PTR TLB.entry[tlbIndex].ppf = lpf; // Request a direct write pointer so we can do either R or W. BX_CPU_THIS_PTR TLB.entry[tlbIndex].accessBits = (Bit32u) @@ -1123,13 +1123,13 @@ BX_CPU_C::access_linear(Bit32u laddr, unsigned length, unsigned pl, #if BX_SupportGuest2HostTLB tlbIndex = BX_TLB_INDEX_OF(laddr); lpf = laddr & 0xfffff000; - if (BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf == lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate) { + if (BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf == (lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate)) { BX_CPU_THIS_PTR mem->writePhysicalPage(this, laddr, length, data); return; } // We haven't seen this page, or it's been bumped before. - BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf = lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate; + BX_CPU_THIS_PTR TLB.entry[tlbIndex].lpf = (lpf | BX_CPU_THIS_PTR TLB.tlb_invalidate); BX_CPU_THIS_PTR TLB.entry[tlbIndex].ppf = lpf; // TLB.entry[tlbIndex].ppf field not used for PG==0. // Request a direct write pointer so we can do either R or W. diff --git a/bochs/debug/dbg_main.cc b/bochs/debug/dbg_main.cc index aed4da524..95aadee0c 100644 --- a/bochs/debug/dbg_main.cc +++ b/bochs/debug/dbg_main.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: dbg_main.cc,v 1.52 2002-09-06 14:58:56 yakovlev Exp $ +// $Id: dbg_main.cc,v 1.53 2002-09-06 16:29:49 yakovlev Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -4527,7 +4527,7 @@ dbg_lin2phys(BX_CPU_C *cpu, Bit32u laddress, Bit32u *phy, Boolean *valid, Bit32u TLB_index = BX_TLB_INDEX_OF(lpf); // see if page is in the TLB first - if (cpu->TLB.entry[TLB_index].lpf == lpf | cpu->TLB.tlb_invalidate) { + if (cpu->TLB.entry[TLB_index].lpf == (lpf | cpu->TLB.tlb_invalidate)) { *tlb_phy = cpu->TLB.entry[TLB_index].ppf | poffset; *tlb_valid = 1; }