- add wait states during disks reset, so the BIOS can reliably detect them.
patch from Adam Sulmicki.
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: rombios.c,v 1.74 2002-10-27 23:04:59 cbothamy Exp $
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// $Id: rombios.c,v 1.75 2002-10-30 21:47:11 cbothamy Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2002 MandrakeSoft S.A.
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@ -930,10 +930,10 @@ Bit16u cdrom_boot();
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#endif // BX_ELTORITO_BOOT
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static char bios_cvs_version_string[] = "$Revision: 1.74 $";
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static char bios_date_string[] = "$Date: 2002-10-27 23:04:59 $";
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static char bios_cvs_version_string[] = "$Revision: 1.75 $";
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static char bios_date_string[] = "$Date: 2002-10-30 21:47:11 $";
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static char CVSID[] = "$Id: rombios.c,v 1.74 2002-10-27 23:04:59 cbothamy Exp $";
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static char CVSID[] = "$Id: rombios.c,v 1.75 2002-10-30 21:47:11 cbothamy Exp $";
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/* Offset to skip the CVS $Id: prefix */
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#define bios_version_string (CVSID + 4)
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@ -2184,13 +2184,16 @@ void ata_detect( )
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// ---------------------------------------------------------------------------
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// ATA/ATAPI driver : software reset
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// ---------------------------------------------------------------------------
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// ATA-3
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// 8.2.1 Software reset - Device 0
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void ata_reset(device)
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Bit16u device;
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{
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Bit16u ebda_seg=read_word(0x0040,0x000E);
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Bit16u iobase1, iobase2;
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Bit8u channel, slave;
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Bit8u channel, slave, max;
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Bit8u sn, sc;
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channel = device / 2;
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slave = device % 2;
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@ -2199,24 +2202,46 @@ Bit16u device;
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iobase2 = read_word(ebda_seg, &EbdaData->ata.channels[channel].iobase2);
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// Reset
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// 8.2.1 (a) -- set SRST in DC
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outb(iobase2+ATA_CB_DC, ATA_CB_DC_HD15 | ATA_CB_DC_NIEN | ATA_CB_DC_SRST);
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// 8.2.1 (b) -- wait for BSY
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max=0xff;
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while(max--!=0) {
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Bit8u status = inb(iobase1+ATA_CB_STAT);
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if ((status & ATA_CB_STAT_BSY) != 0) break;
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}
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// 8.2.1 (f) -- clear SRST
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outb(iobase2+ATA_CB_DC, ATA_CB_DC_HD15 | ATA_CB_DC_NIEN);
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if (read_byte(ebda_seg,&EbdaData->ata.devices[device].type) != ATA_TYPE_NONE) {
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Bit8u sn, sc, max=0xff;
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// 8.2.1 (g) -- check for sc==sn==0x01
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// select device
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outb(iobase1+ATA_CB_DH, slave?ATA_CB_DH_DEV1:ATA_CB_DH_DEV0);
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sc = inb(iobase1+ATA_CB_SC);
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sn = inb(iobase1+ATA_CB_SN);
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if ( (sc==0x01) && (sn==0x01) ) {
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// 8.2.1 (h) -- wait for not BSY
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max=0xff;
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while(max--!=0) {
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Bit8u status = inb(iobase1+ATA_CB_STAT);
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if ((status & ATA_CB_STAT_BSY) == 0) break;
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}
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}
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}
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// 8.2.1 (i) -- wait for DRDY
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max=0xfff;
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while(max--!=0) {
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Bit8u status = inb(iobase1+ATA_CB_STAT);
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if ((status & ATA_CB_STAT_RDY) != 0) break;
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}
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// Enable interrupts
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outb(iobase2+ATA_CB_DC, ATA_CB_DC_HD15);
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}
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