From acd320699deddfaece28446db6b54e751ad502f8 Mon Sep 17 00:00:00 2001
From: Stanislav Shwartsman <sshwarts@users.sourceforge.net>
Date: Mon, 14 Mar 2011 06:25:54 +0000
Subject: [PATCH] small cleanups

---
 bochs/cpu/cpu.h            |  7 -------
 bochs/cpu/cpuid.cc         | 13 ++++---------
 bochs/cpu/model_specific.h |  7 +++++++
 bochs/cpu/msr.cc           |  4 ++--
 bochs/cpu/vmx.h            |  2 +-
 5 files changed, 14 insertions(+), 19 deletions(-)

diff --git a/bochs/cpu/cpu.h b/bochs/cpu/cpu.h
index 286db2449..af253360a 100644
--- a/bochs/cpu/cpu.h
+++ b/bochs/cpu/cpu.h
@@ -634,13 +634,6 @@ typedef struct
 #define BX_CPU_AVX_FMA          0x04000000        /* AVX FMA instruction */
 #define BX_CPU_X86_64           0x08000000        /* x86-64 instruction */
 
-struct cpuid_function_t {
-  Bit32u eax;
-  Bit32u ebx;
-  Bit32u ecx;
-  Bit32u edx;
-};
-
 #include "model_specific.h"
 #include "crregs.h"
 #include "descriptor.h"
diff --git a/bochs/cpu/cpuid.cc b/bochs/cpu/cpuid.cc
index 530b21aab..9bfe595f3 100755
--- a/bochs/cpu/cpuid.cc
+++ b/bochs/cpu/cpuid.cc
@@ -24,7 +24,6 @@
 #define NEED_CPU_REG_SHORTCUTS 1
 #include "bochs.h"
 #include "cpu.h"
-#include "model_specific.h"
 #define LOG_THIS BX_CPU_THIS_PTR
 
 #include "param_names.h"
@@ -635,7 +634,7 @@ void BX_CPU_C::set_cpuid_defaults(void)
   //     [29:29] Long Mode
   //     [30:30] AMD 3DNow! Extensions
   //     [31:31] AMD 3DNow! Instructions
-  unsigned features  = BX_CPU_VENDOR_INTEL ? 0 : get_std_cpuid_features();
+  unsigned features = BX_CPU_VENDOR_INTEL ? 0 : get_std_cpuid_features();
   features &= 0x0183F3FF;
 #if BX_SUPPORT_3DNOW
   // only AMD is interesting in AMD MMX extensions
@@ -733,7 +732,7 @@ void BX_CPU_C::set_cpuid_defaults(void)
   BX_INFO(("CPUID[0x80000006]: %08x %08x %08x %08x", cpuid->eax, cpuid->ebx, cpuid->ecx, cpuid->edx));
 
   // ------------------------------------------------------
-  // CPUID function 0x00000007
+  // CPUID function 0x80000007
   cpuid = &(BX_CPU_THIS_PTR cpuid_ext_function[7]);
 
   cpuid->eax = 0;
@@ -921,12 +920,6 @@ void BX_CPU_C::init_isa_features_bitmask(void)
   xsave_enabled = SIM->get_param_bool(BXPN_CPUID_XSAVE)->get();
   xapic_enabled = SIM->get_param_bool(BXPN_CPUID_XAPIC)->get();
   sse_enabled = SIM->get_param_enum(BXPN_CPUID_SSE)->get();
-#if BX_SUPPORT_X86_64
-  bx_bool fsgsbase_enabled = SIM->get_param_bool(BXPN_CPUID_FSGSBASE)->get();
-#endif
-#if BX_SUPPORT_MONITOR_MWAIT
-  bx_bool mwait_enabled = SIM->get_param_bool(BXPN_CPUID_MWAIT)->get();
-#endif
 #endif // BX_CPU_LEVEL >= 6
 
   // sanity checks
@@ -1022,6 +1015,7 @@ void BX_CPU_C::init_isa_features_bitmask(void)
   features_bitmask |= BX_CPU_P6;
 
 #if BX_SUPPORT_MONITOR_MWAIT
+  static bx_bool mwait_enabled = SIM->get_param_bool(BXPN_CPUID_MWAIT)->get();
   if (mwait_enabled)
     features_bitmask |= BX_CPU_MONITOR_MWAIT;
 #endif
@@ -1073,6 +1067,7 @@ void BX_CPU_C::init_isa_features_bitmask(void)
 #if BX_SUPPORT_X86_64
   features_bitmask |= BX_CPU_X86_64;
 
+  static bx_bool fsgsbase_enabled = SIM->get_param_bool(BXPN_CPUID_FSGSBASE)->get();
   if (fsgsbase_enabled)
     features_bitmask |= BX_CPU_FSGSBASE;
 #endif
diff --git a/bochs/cpu/model_specific.h b/bochs/cpu/model_specific.h
index 3a6f047e8..a010ed370 100755
--- a/bochs/cpu/model_specific.h
+++ b/bochs/cpu/model_specific.h
@@ -24,6 +24,13 @@
 #ifndef BX_CPU_MODEL_SPECIFIC
 #define BX_CPU_MODEL_SPECIFIC
 
+struct cpuid_function_t {
+  Bit32u eax;
+  Bit32u ebx;
+  Bit32u ecx;
+  Bit32u edx;
+};
+
 // CPUID defines - STD features CPUID[0x00000001].EDX
 // ----------------------------
 
diff --git a/bochs/cpu/msr.cc b/bochs/cpu/msr.cc
index 8c06230c7..29968d820 100755
--- a/bochs/cpu/msr.cc
+++ b/bochs/cpu/msr.cc
@@ -704,8 +704,8 @@ bx_bool BX_CPU_C::relocate_apic(Bit64u val_64)
 
     if ((val32_lo & 0x800) == 0) {
       // APIC global enable bit cleared, clear APIC on chip CPUID feature flag
-      BX_CPU_THIS_PTR cpuid_std_function[0x1].edx &= ~(1<<9);
-      BX_CPU_THIS_PTR cpuid_ext_function[0x1].edx &= ~(1<<9);
+      BX_CPU_THIS_PTR cpuid_std_function[0x1].edx &= ~BX_CPUID_STD_APIC;
+      BX_CPU_THIS_PTR cpuid_ext_function[0x1].edx &= ~BX_CPUID_STD_APIC;
     }
   }
   else {
diff --git a/bochs/cpu/vmx.h b/bochs/cpu/vmx.h
index db09f465a..e046eacc1 100755
--- a/bochs/cpu/vmx.h
+++ b/bochs/cpu/vmx.h
@@ -1020,7 +1020,7 @@ enum VMX_INVEPT_INVVPID_type {
 // [25] - INVEPT single-context invalidation supported
 // [26] - INVEPT all-context invalidation supported
 
-#define VMX_MSR_VMX_EPT_VPID_CAP_LO (0x06114141 | (bx_cpuid_support_1g_paging() << 17))
+#define VMX_MSR_VMX_EPT_VPID_CAP_LO (0x06114141 | (!!(bx_cpuid_support_1g_paging()) << 17))
 
 // [32] - INVVPID instruction supported
 // [40] - individual-address INVVPID is supported