undefined CR fault higher prio than CPL GP
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: crregs.cc,v 1.14 2010-04-29 19:34:32 sshwarts Exp $
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// $Id: crregs.cc,v 1.15 2010-05-02 15:10:27 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2010 Stanislav Shwartsman
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@ -54,12 +54,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_DdRd(bxInstruction_c *i)
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exception(BX_GP_EXCEPTION, 0);
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}
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/* NOTES:
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* 32bit operands always used
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* r/m field specifies general register
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* reg field specifies which special register
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*/
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invalidate_prefetch_q();
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/* This instruction is always treated as a register-to-register,
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@ -214,12 +208,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_DqRq(bxInstruction_c *i)
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VMexit_DR_Access(i, 0 /* write */);
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#endif
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/* NOTES:
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* 64bit operands always used
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* r/m field specifies general register
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* reg field specifies which special register
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*/
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if (BX_CPU_THIS_PTR cr4.get_DE()) {
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if ((i->nnn() & 0xE) == 4) {
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BX_ERROR(("MOV_DqRq: access to DR4/DR5 causes #UD"));
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@ -227,6 +215,11 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_DqRq(bxInstruction_c *i)
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}
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}
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if (i->nnn() >= 8) {
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BX_ERROR(("MOV_DqRq: #UD - register index out of range"));
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exception(BX_UD_EXCEPTION, 0);
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}
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// Note: processor clears GD upon entering debug exception
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// handler, to allow access to the debug registers
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if (BX_CPU_THIS_PTR dr7 & 0x2000) { // GD bit set
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@ -338,6 +331,11 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_RqDq(bxInstruction_c *i)
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}
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}
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if (i->nnn() >= 8) {
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BX_ERROR(("MOV_RqDq: #UD - register index out of range"));
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exception(BX_UD_EXCEPTION, 0);
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}
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// Note: processor clears GD upon entering debug exception
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// handler, to allow access to the debug registers
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if (BX_CPU_THIS_PTR dr7 & 0x2000) { // GD bit set
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@ -391,16 +389,22 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_RqDq(bxInstruction_c *i)
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_CdRd(bxInstruction_c *i)
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{
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unsigned cr_ok = 0x0d;
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#if BX_CPU_LEVEL >= 4
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cr_ok |= 0x10;
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#endif
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if (! (cr_ok & (1 << i->nnn()))) {
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BX_ERROR(("MOV_CdRd: #UD - register index out of range"));
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exception(BX_UD_EXCEPTION, 0);
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}
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if (!real_mode() && CPL!=0) {
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BX_ERROR(("MOV_CdRd: CPL!=0 not in real mode"));
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exception(BX_GP_EXCEPTION, 0);
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}
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/* NOTES:
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* 32bit operands always used
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* r/m field specifies general register
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* reg field specifies which special register
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*/
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invalidate_prefetch_q();
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/* This instruction is always treated as a register-to-register,
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* regardless of the encoding of the MOD field in the MODRM byte.
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@ -461,17 +465,21 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_RdCd(bxInstruction_c *i)
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// mov control register data to register
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Bit32u val_32 = 0;
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unsigned cr_ok = 0x0d;
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#if BX_CPU_LEVEL >= 4
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cr_ok |= 0x10;
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#endif
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if (! (cr_ok & (1 << i->nnn()))) {
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BX_ERROR(("MOV_RdCd: #UD - register index out of range"));
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exception(BX_UD_EXCEPTION, 0);
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}
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if (!real_mode() && CPL!=0) {
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BX_ERROR(("MOV_RdCd: CPL!=0 not in real mode"));
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exception(BX_GP_EXCEPTION, 0);
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}
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/* NOTES:
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* 32bit operands always used
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* r/m field specifies general register
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* reg field specifies which special register
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*/
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/* This instruction is always treated as a register-to-register,
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* regardless of the encoding of the MOD field in the MODRM byte.
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*/
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@ -507,11 +515,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_RdCd(bxInstruction_c *i)
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#if BX_SUPPORT_X86_64
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_CqRq(bxInstruction_c *i)
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{
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/* NOTES:
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* 64bit operands always used
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* r/m field specifies general register
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* reg field specifies which special register
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*/
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unsigned cr_ok = 0x011d;
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if (! (cr_ok & (1 << i->nnn()))) {
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BX_ERROR(("MOV_CqRq: #UD - register index out of range"));
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exception(BX_UD_EXCEPTION, 0);
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}
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/* #GP(0) if CPL is not 0 */
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if (CPL!=0) {
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@ -519,6 +528,8 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_CqRq(bxInstruction_c *i)
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exception(BX_GP_EXCEPTION, 0);
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}
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invalidate_prefetch_q();
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/* This instruction is always treated as a register-to-register,
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* regardless of the encoding of the MOD field in the MODRM byte.
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*/
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@ -591,15 +602,16 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_CqRq(bxInstruction_c *i)
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_RqCq(bxInstruction_c *i)
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{
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unsigned cr_ok = 0x011d;
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if (! (cr_ok & (1 << i->nnn()))) {
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BX_ERROR(("MOV_RqCq: #UD - register index out of range"));
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exception(BX_UD_EXCEPTION, 0);
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}
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// mov control register data to register
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Bit64u val_64 = 0;
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/* NOTES:
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* 64bit operands always used
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* r/m field specifies general register
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* reg field specifies which special register
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*/
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/* #GP(0) if CPL is not 0 */
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if (CPL!=0) {
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BX_ERROR(("MOV_RqCq: #GP(0) if CPL is not 0"));
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