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Changed cpu64 calls to macros:

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BX_READ_8BIT_REG()  --> BX_READ_8BIT_REGx()
  BX_WRITE_8BIT_REG() --> BX_WRITE_8BIT_REGx()
They use an extra parameter "extended".  I coded this
as the macro without the "x" for cpu32 compiles.  This
allows for ease of merging and code sharing.
This commit is contained in:
Kevin Lawton 2002-09-13 17:04:14 +00:00
parent 6f95e40ee5
commit ac7ca2b035
5 changed files with 40 additions and 33 deletions
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4
bochs/cpu/Makefile.in
View File

@ -67,13 +67,11 @@ OBJS32 = \
data_xfer32.o \
logical32.o \
stack32.o \
shift32.o \
arith8.o \
mult8.o \
data_xfer8.o \
logical8.o \
ctrl_xfer8.o \
shift8.o \
arith16.o \
data_xfer16.o \
stack16.o \
@ -103,6 +101,8 @@ OBJSXX = \
bcd.o \
mult16.o \
tasking.o \
shift32.o \
shift8.o \
# Objects which are only used for x86-64 code, but which have been

13
bochs/cpu/cpu.h
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: cpu.h,v 1.48 2002-09-13 05:03:37 kevinlawton Exp $
// $Id: cpu.h,v 1.49 2002-09-13 17:04:11 kevinlawton Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -168,7 +168,7 @@ typedef Bit32u bx_address;
#endif
#if BX_SUPPORT_X86_64
#define BX_READ_8BIT_REG(index,extended) ((((index) < 4) || (extended)) ? \
#define BX_READ_8BIT_REGx(index,extended) ((((index) < 4) || (extended)) ? \
(BX_CPU_THIS_PTR gen_reg[index].word.byte.rl) : \
(BX_CPU_THIS_PTR gen_reg[(index)-4].word.byte.rh))
#define BX_READ_16BIT_REG(index) (BX_CPU_THIS_PTR gen_reg[index].word.rx)
@ -180,6 +180,7 @@ typedef Bit32u bx_address;
#define BX_READ_8BIT_REG(index) (((index) < 4) ? \
(BX_CPU_THIS_PTR gen_reg[index].word.byte.rl) : \
(BX_CPU_THIS_PTR gen_reg[(index)-4].word.byte.rh))
#define BX_READ_8BIT_REGx(index,ext) BX_READ_8BIT_REG(index)
#define BX_READ_16BIT_REG(index) (BX_CPU_THIS_PTR gen_reg[index].word.rx)
#define BX_READ_32BIT_REG(index) (BX_CPU_THIS_PTR gen_reg[index].dword.erx)
#endif
@ -193,7 +194,7 @@ typedef Bit32u bx_address;
}
#if BX_SUPPORT_X86_64
#define BX_WRITE_8BIT_REG(index, extended, val) {\
#define BX_WRITE_8BIT_REGx(index, extended, val) {\
if (((index) < 4) || (extended)) \
BX_CPU_THIS_PTR gen_reg[index].word.byte.rl = val; \
else \
@ -221,12 +222,18 @@ typedef Bit32u bx_address;
else \
BX_CPU_THIS_PTR gen_reg[(index)-4].word.byte.rh = val; \
}
#define BX_WRITE_8BIT_REGx(index, ext, val) BX_WRITE_8BIT_REG(index, val)
#define BX_WRITE_16BIT_REG(index, val) {\
BX_CPU_THIS_PTR gen_reg[index].word.rx = val; \
}
#define BX_WRITE_32BIT_REG(index, val) {\
BX_CPU_THIS_PTR gen_reg[index].dword.erx = val; \
}
// For x86-32, I just pretend this one is like the macro above,
// so common code can be used.
#define BX_WRITE_32BIT_REGZ(index, val) {\
BX_CPU_THIS_PTR gen_reg[index].dword.erx = (Bit32u) val; \
}
#endif

6
bochs/cpu/data_xfer64.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: data_xfer64.cc,v 1.1 2002-09-13 15:53:22 kevinlawton Exp $
// $Id: data_xfer64.cc,v 1.2 2002-09-13 17:04:13 kevinlawton Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -300,7 +300,7 @@ BX_CPU_C::MOVZX_GqEb(BxInstruction_t *i)
Bit8u op2_8;
if (i->mod == 0xc0) {
op2_8 = BX_READ_8BIT_REG(i->rm,i->extend8bit);
op2_8 = BX_READ_8BIT_REGx(i->rm,i->extend8bit);
}
else {
/* pointer, segment address pair */
@ -342,7 +342,7 @@ BX_CPU_C::MOVSX_GqEb(BxInstruction_t *i)
Bit8u op2_8;
if (i->mod == 0xc0) {
op2_8 = BX_READ_8BIT_REG(i->rm,i->extend8bit);
op2_8 = BX_READ_8BIT_REGx(i->rm,i->extend8bit);
}
else {
/* pointer, segment address pair */

20
bochs/cpu/shift32.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: shift32.cc,v 1.7 2002-09-06 21:54:58 kevinlawton Exp $
// $Id: shift32.cc,v 1.8 2002-09-13 17:04:13 kevinlawton Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -63,7 +63,7 @@ BX_CPU_C::SHLD_EdGd(BxInstruction_t *i)
/* now write result back to destination */
if (i->mod == 0xc0) {
BX_WRITE_32BIT_REG(i->rm, result_32);
BX_WRITE_32BIT_REGZ(i->rm, result_32);
}
else {
Write_RMW_virtual_dword(result_32);
@ -112,7 +112,7 @@ BX_CPU_C::SHRD_EdGd(BxInstruction_t *i)
/* now write result back to destination */
if (i->mod == 0xc0) {
BX_WRITE_32BIT_REG(i->rm, result_32);
BX_WRITE_32BIT_REGZ(i->rm, result_32);
}
else {
Write_RMW_virtual_dword(result_32);
@ -162,7 +162,7 @@ BX_CPU_C::ROL_Ed(BxInstruction_t *i)
/* now write result back to destination */
if (i->mod == 0xc0) {
BX_WRITE_32BIT_REG(i->rm, result_32);
BX_WRITE_32BIT_REGZ(i->rm, result_32);
}
else {
Write_RMW_virtual_dword(result_32);
@ -208,7 +208,7 @@ BX_CPU_C::ROR_Ed(BxInstruction_t *i)
/* now write result back to destination */
if (i->mod == 0xc0) {
BX_WRITE_32BIT_REG(i->rm, result_32);
BX_WRITE_32BIT_REGZ(i->rm, result_32);
}
else {
Write_RMW_virtual_dword(result_32);
@ -263,7 +263,7 @@ BX_CPU_C::RCL_Ed(BxInstruction_t *i)
/* now write result back to destination */
if (i->mod == 0xc0) {
BX_WRITE_32BIT_REG(i->rm, result_32);
BX_WRITE_32BIT_REGZ(i->rm, result_32);
}
else {
Write_RMW_virtual_dword(result_32);
@ -315,7 +315,7 @@ BX_CPU_C::RCR_Ed(BxInstruction_t *i)
/* now write result back to destination */
if (i->mod == 0xc0) {
BX_WRITE_32BIT_REG(i->rm, result_32);
BX_WRITE_32BIT_REGZ(i->rm, result_32);
}
else {
Write_RMW_virtual_dword(result_32);
@ -361,7 +361,7 @@ BX_CPU_C::SHL_Ed(BxInstruction_t *i)
/* now write result back to destination */
if (i->mod == 0xc0) {
BX_WRITE_32BIT_REG(i->rm, result_32);
BX_WRITE_32BIT_REGZ(i->rm, result_32);
}
else {
Write_RMW_virtual_dword(result_32);
@ -401,7 +401,7 @@ BX_CPU_C::SHR_Ed(BxInstruction_t *i)
/* now write result back to destination */
if (i->mod == 0xc0) {
BX_WRITE_32BIT_REG(i->rm, result_32);
BX_WRITE_32BIT_REGZ(i->rm, result_32);
}
else {
Write_RMW_virtual_dword(result_32);
@ -446,7 +446,7 @@ BX_CPU_C::SAR_Ed(BxInstruction_t *i)
/* now write result back to destination */
if (i->mod == 0xc0) {
BX_WRITE_32BIT_REG(i->rm, result_32);
BX_WRITE_32BIT_REGZ(i->rm, result_32);
}
else {
Write_RMW_virtual_dword(result_32);

30
bochs/cpu/shift8.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: shift8.cc,v 1.6 2002-09-06 21:54:58 kevinlawton Exp $
// $Id: shift8.cc,v 1.7 2002-09-13 17:04:14 kevinlawton Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -54,7 +54,7 @@ BX_CPU_C::ROL_Eb(BxInstruction_t *i)
/* op1 is a register or memory reference */
if (i->mod == 0xc0) {
op1_8 = BX_READ_8BIT_REG(i->rm);
op1_8 = BX_READ_8BIT_REGx(i->rm,i->extend8bit);
}
else {
/* pointer, segment address pair */
@ -66,7 +66,7 @@ BX_CPU_C::ROL_Eb(BxInstruction_t *i)
/* now write result back to destination */
if (i->mod == 0xc0) {
BX_WRITE_8BIT_REG(i->rm, result_8);
BX_WRITE_8BIT_REGx(i->rm, i->extend8bit, result_8);
}
else {
Write_RMW_virtual_byte(result_8);
@ -104,7 +104,7 @@ BX_CPU_C::ROR_Eb(BxInstruction_t *i)
/* op1 is a register or memory reference */
if (i->mod == 0xc0) {
op1_8 = BX_READ_8BIT_REG(i->rm);
op1_8 = BX_READ_8BIT_REGx(i->rm,i->extend8bit);
}
else {
/* pointer, segment address pair */
@ -116,7 +116,7 @@ BX_CPU_C::ROR_Eb(BxInstruction_t *i)
/* now write result back to destination */
if (i->mod == 0xc0) {
BX_WRITE_8BIT_REG(i->rm, result_8);
BX_WRITE_8BIT_REGx(i->rm, i->extend8bit, result_8);
}
else {
Write_RMW_virtual_byte(result_8);
@ -153,7 +153,7 @@ BX_CPU_C::RCL_Eb(BxInstruction_t *i)
/* op1 is a register or memory reference */
if (i->mod == 0xc0) {
op1_8 = BX_READ_8BIT_REG(i->rm);
op1_8 = BX_READ_8BIT_REGx(i->rm,i->extend8bit);
}
else {
/* pointer, segment address pair */
@ -167,7 +167,7 @@ BX_CPU_C::RCL_Eb(BxInstruction_t *i)
/* now write result back to destination */
if (i->mod == 0xc0) {
BX_WRITE_8BIT_REG(i->rm, result_8);
BX_WRITE_8BIT_REGx(i->rm, i->extend8bit, result_8);
}
else {
Write_RMW_virtual_byte(result_8);
@ -201,7 +201,7 @@ BX_CPU_C::RCR_Eb(BxInstruction_t *i)
/* op1 is a register or memory reference */
if (i->mod == 0xc0) {
op1_8 = BX_READ_8BIT_REG(i->rm);
op1_8 = BX_READ_8BIT_REGx(i->rm,i->extend8bit);
}
else {
/* pointer, segment address pair */
@ -215,7 +215,7 @@ BX_CPU_C::RCR_Eb(BxInstruction_t *i)
/* now write result back to destination */
if (i->mod == 0xc0) {
BX_WRITE_8BIT_REG(i->rm, result_8);
BX_WRITE_8BIT_REGx(i->rm, i->extend8bit, result_8);
}
else {
Write_RMW_virtual_byte(result_8);
@ -251,7 +251,7 @@ BX_CPU_C::SHL_Eb(BxInstruction_t *i)
/* op1 is a register or memory reference */
if (i->mod == 0xc0) {
op1_8 = BX_READ_8BIT_REG(i->rm);
op1_8 = BX_READ_8BIT_REGx(i->rm,i->extend8bit);
}
else {
/* pointer, segment address pair */
@ -264,7 +264,7 @@ BX_CPU_C::SHL_Eb(BxInstruction_t *i)
/* now write result back to destination */
if (i->mod == 0xc0) {
BX_WRITE_8BIT_REG(i->rm, result_8);
BX_WRITE_8BIT_REGx(i->rm, i->extend8bit, result_8);
}
else {
Write_RMW_virtual_byte(result_8);
@ -292,7 +292,7 @@ BX_CPU_C::SHR_Eb(BxInstruction_t *i)
/* op1 is a register or memory reference */
if (i->mod == 0xc0) {
op1_8 = BX_READ_8BIT_REG(i->rm);
op1_8 = BX_READ_8BIT_REGx(i->rm,i->extend8bit);
}
else {
/* pointer, segment address pair */
@ -305,7 +305,7 @@ BX_CPU_C::SHR_Eb(BxInstruction_t *i)
/* now write result back to destination */
if (i->mod == 0xc0) {
BX_WRITE_8BIT_REG(i->rm, result_8);
BX_WRITE_8BIT_REGx(i->rm, i->extend8bit, result_8);
}
else {
Write_RMW_virtual_byte(result_8);
@ -334,7 +334,7 @@ BX_CPU_C::SAR_Eb(BxInstruction_t *i)
/* op1 is a register or memory reference */
if (i->mod == 0xc0) {
op1_8 = BX_READ_8BIT_REG(i->rm);
op1_8 = BX_READ_8BIT_REGx(i->rm,i->extend8bit);
}
else {
/* pointer, segment address pair */
@ -362,7 +362,7 @@ BX_CPU_C::SAR_Eb(BxInstruction_t *i)
/* now write result back to destination */
if (i->mod == 0xc0) {
BX_WRITE_8BIT_REG(i->rm, result_8);
BX_WRITE_8BIT_REGx(i->rm, i->extend8bit, result_8);
}
else {
Write_RMW_virtual_byte(result_8);