diff --git a/bochs/bochs.h b/bochs/bochs.h
index a5293586b..25936dc6b 100644
--- a/bochs/bochs.h
+++ b/bochs/bochs.h
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: bochs.h,v 1.143 2004-10-16 15:44:00 vruppert Exp $
+// $Id: bochs.h,v 1.144 2004-10-29 21:15:39 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2002  MandrakeSoft S.A.
@@ -107,11 +107,6 @@ int bx_begin_simulation (int argc, char *argv[]);
 #define DEV_vga_mem_read(addr)       bx_dbg_ucmem_read(addr)
 #define DEV_vga_mem_write(addr, val) bx_dbg_ucmem_write(addr, val)
 
-#if BX_SUPPORT_A20
-#  define A20ADDR(x)               ( (x) & bx_pc_system.a20_mask )
-#else
-#  define A20ADDR(x)                (x)
-#endif
 #define BX_INP(addr, len)           bx_dbg_inp(addr, len)
 #define BX_OUTP(addr, val, len)     bx_dbg_outp(addr, val, len)
 #define BX_HRQ                      (bx_pc_system.HRQ)
@@ -138,12 +133,6 @@ int bx_begin_simulation (int argc, char *argv[]);
 #else
 
 // =-=-=-=-=-=-=- Normal optimized use -=-=-=-=-=-=-=-=-=-=-=-=-=-=
-#if BX_SUPPORT_A20
-#  define A20ADDR(x)               ( (x) & bx_pc_system.a20_mask )
-#else
-#  define A20ADDR(x)               (x)
-#endif
-//
 // some pc_systems functions just redirect to the IO devices so optimize
 // by eliminating call here
 //
@@ -176,6 +165,12 @@ int bx_begin_simulation (int argc, char *argv[]);
 
 #endif
 
+#if BX_SUPPORT_A20
+#  define A20ADDR(x)               ( (x) & bx_pc_system.a20_mask )
+#else
+#  define A20ADDR(x)                (x)
+#endif
+
 
 // you can't use static member functions on the CPU, if there are going
 // to be 2 cpus.  Check this early on.
@@ -186,9 +181,6 @@ int bx_begin_simulation (int argc, char *argv[]);
 #endif
 
 
-// #define BX_IAC()                 bx_pc_system.IAC()
-//#define BX_IAC()                    bx_dbg_IAC()
-
 //
 // Ways for the the external environment to report back information
 // to the debugger.
@@ -472,13 +464,10 @@ int bx_atexit(void);
 BOCHSAPI extern bx_debug_t bx_dbg;
 
 
-
-#define BX_READ    0
-#define BX_WRITE   1
-#define BX_RW      2
-
-
-
+// memory access type (read/write/rw)
+#define BX_READ         0
+#define BX_WRITE        1
+#define BX_RW           2
 
 
 #include "memory/memory.h"
@@ -494,10 +483,6 @@ enum PCS_OP { PCS_CLEAR, PCS_SET, PCS_TOGGLE };
 
 
 
-
-
-
-
 /* --- EXTERNS --- */
 
 #if BX_GUI_SIGHANDLER
diff --git a/bochs/cpu/cpu.cc b/bochs/cpu/cpu.cc
index 32a56e6be..2ff9afdbb 100644
--- a/bochs/cpu/cpu.cc
+++ b/bochs/cpu/cpu.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: cpu.cc,v 1.89 2004-10-16 19:34:17 sshwarts Exp $
+// $Id: cpu.cc,v 1.90 2004-10-29 21:15:47 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -750,8 +750,7 @@ BX_CPU_C::prefetch(void)
       BX_PANIC(("prefetch: running in bogus memory"));
       }
     else {
-      BX_PANIC(("prefetch: getHostMemAddr vetoed direct read, pAddr=0x%x.",
-                pAddr));
+      BX_PANIC(("prefetch: getHostMemAddr vetoed direct read, pAddr=0x%x.", pAddr));
       }
     }
 
diff --git a/bochs/cpu/cpu.h b/bochs/cpu/cpu.h
index a57102e1f..85fb42896 100644
--- a/bochs/cpu/cpu.h
+++ b/bochs/cpu/cpu.h
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: cpu.h,v 1.181 2004-10-21 18:20:32 sshwarts Exp $
+// $Id: cpu.h,v 1.182 2004-10-29 21:15:47 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -738,8 +738,6 @@ typedef struct {
   } bx_segment_reg_t;
 
 typedef void * (*BxVoidFPtr_t)(void);
-class BX_CPU_C;
-
 
 class bxInstruction_c {
 public:
@@ -1475,7 +1473,11 @@ public: // for now...
 
   // constructors & destructors...
   BX_CPU_C();
-  ~BX_CPU_C(void);
+#if BX_EXTERNAL_DEBUGGER
+  virtual ~BX_CPU_C();
+#else
+  ~BX_CPU_C();
+#endif
   void init (BX_MEM_C *addrspace);
 
   // prototypes for CPU instructions...
diff --git a/bochs/cpu/ctrl_xfer32.cc b/bochs/cpu/ctrl_xfer32.cc
index 556786c6d..30035ccf2 100644
--- a/bochs/cpu/ctrl_xfer32.cc
+++ b/bochs/cpu/ctrl_xfer32.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: ctrl_xfer32.cc,v 1.30 2004-10-19 20:05:07 sshwarts Exp $
+// $Id: ctrl_xfer32.cc,v 1.31 2004-10-29 21:15:48 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -62,7 +62,7 @@ BailBigRSP("RETnear32_Iw");
         /* ??? #SS(0) -or #GP(0) */
         }
 
-      access_linear(BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.base + temp_ESP + 0,
+      access_linear(BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.base + temp_ESP,
         4, CPL==3, BX_READ, &return_EIP);
 
       if (protected_mode() &&
@@ -120,7 +120,7 @@ BailBigRSP("RETnear32");
         /* ??? #SS(0) -or #GP(0) */
         }
 
-      access_linear(BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.base + temp_ESP + 0,
+      access_linear(BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.base + temp_ESP,
         4, CPL==3, BX_READ, &return_EIP);
 
       if ( return_EIP > BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.limit_scaled ) {
diff --git a/bochs/cpu/ctrl_xfer64.cc b/bochs/cpu/ctrl_xfer64.cc
index c8a374012..6e25fa966 100644
--- a/bochs/cpu/ctrl_xfer64.cc
+++ b/bochs/cpu/ctrl_xfer64.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: ctrl_xfer64.cc,v 1.25 2004-10-19 20:05:07 sshwarts Exp $
+// $Id: ctrl_xfer64.cc,v 1.26 2004-10-29 21:15:48 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -56,7 +56,7 @@ BX_CPU_C::RETnear64_Iw(bxInstruction_c *i)
   //  /* ??? #SS(0) -or #GP(0) */
   //  }
 
-  access_linear(BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.base + temp_RSP + 0,
+  access_linear(BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.base + temp_RSP,
     8, CPL==3, BX_READ, &return_RIP);
 
   /* Pentium book says imm16 is number of words ??? */
@@ -90,7 +90,7 @@ BX_CPU_C::RETnear64(bxInstruction_c *i)
   //  /* ??? #SS(0) -or #GP(0) */
   //  }
 
-  access_linear(BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.base + temp_RSP + 0,
+  access_linear(BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.base + temp_RSP,
       8, CPL==3, BX_READ, &return_RIP);
 
   RIP = return_RIP;
diff --git a/bochs/cpu/extdb.cc b/bochs/cpu/extdb.cc
index b7a59239d..0a19e47a3 100644
--- a/bochs/cpu/extdb.cc
+++ b/bochs/cpu/extdb.cc
@@ -2,7 +2,7 @@
 #ifdef WIN32
 // windows.h included in bochs.h
 #else
-//#  error "extdb.cc only supported in win32 environment"
+#  error "extdb.cc only supported in win32 environment"
 #endif
 
 TRegs regs;
diff --git a/bochs/cpu/paging.cc b/bochs/cpu/paging.cc
index de5398871..5693ddc02 100644
--- a/bochs/cpu/paging.cc
+++ b/bochs/cpu/paging.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: paging.cc,v 1.48 2004-10-21 18:20:34 sshwarts Exp $
+// $Id: paging.cc,v 1.49 2004-10-29 21:15:48 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -604,7 +604,6 @@ BX_CPU_C::dtranslate_linear(bx_address laddr, unsigned pl, unsigned rw)
   bx_address lpf;
   Bit32u   ppf, poffset, error_code, paddress;
   Bit32u   pde, pde_addr;
-  bx_bool  isWrite;
   Bit32u   accessBits, combined_access;
   unsigned priv_index;
 #if BX_USE_TLB
@@ -614,15 +613,14 @@ BX_CPU_C::dtranslate_linear(bx_address laddr, unsigned pl, unsigned rw)
   InstrTLB_Increment(tlbLookups);
   InstrTLB_Stats();
 
+  bx_bool isWrite = (rw>=BX_WRITE); // write or r-m-w
+
 #if BX_SupportPAE
   if (BX_CPU_THIS_PTR cr4.get_PAE()) {
     Bit32u   pdp, pdp_addr;
 
     lpf       = laddr & BX_CONST64(0xfffffffffffff000); // linear page frame
     poffset   = laddr & 0x00000fff; // physical offset
-    isWrite   = (rw>=BX_WRITE); // write or r-m-w
-
-    //BX_DEBUG (("poffset: %-8x laddr: %-8x lpf: %-8x",poffset,laddr,lpf));
 
 #if BX_USE_TLB
     TLB_index = BX_TLB_INDEX_OF(lpf);
@@ -658,33 +656,33 @@ BX_CPU_C::dtranslate_linear(bx_address laddr, unsigned pl, unsigned rw)
         // PML4 Entry NOT present
         error_code = 0x00000000; // RSVD=0, P=0
         goto page_fault_not_present;
-        }
+      }
       if ( !(pml4 & 0x20) ) {
         pml4 |= 0x20;
         BX_CPU_THIS_PTR mem->writePhysicalPage(this, pml4_addr, 4, &pml4);
-        }
+      }
 
       // Get PDP entry
       pdp_addr =  (pml4 & 0xfffff000) |
                   ((laddr & BX_CONST64(0x0000007fc0000000)) >> 27);
-      }
+    }
     else
 #endif
-      {
+    {
       pdp_addr = BX_CPU_THIS_PTR cr3_masked |
                ((laddr & 0xc0000000) >> 27);
-      }
+    }
 
     BX_CPU_THIS_PTR mem->readPhysicalPage(this, pdp_addr, 4, &pdp);
     if ( !(pdp & 0x01) ) {
       // PDP Entry NOT present
       error_code = 0x00000000; // RSVD=0, P=0
       goto page_fault_not_present;
-      }
+    }
     if ( !(pdp & 0x20) ) {
       pdp |= 0x20;
       BX_CPU_THIS_PTR mem->writePhysicalPage(this, pdp_addr, 4, &pdp);
-      }
+    }
 
     // Get page dir entry
     pde_addr = (pdp & 0xfffff000) |
@@ -695,7 +693,7 @@ BX_CPU_C::dtranslate_linear(bx_address laddr, unsigned pl, unsigned rw)
       // Page Directory Entry NOT present
       error_code = 0x00000000; // RSVD=0, P=0
       goto page_fault_not_present;
-      }
+    }
 
 #if BX_SUPPORT_4MEG_PAGES
     // (KPL) Weird.  I would think the processor would consult CR.PSE?
@@ -724,18 +722,18 @@ BX_CPU_C::dtranslate_linear(bx_address laddr, unsigned pl, unsigned rw)
       if (!priv_check[priv_index]) {
         error_code = 0x00000001; // RSVD=0, P=1
         goto page_fault_access;
-        }
+      }
 
       // Update PDE if A/D bits if needed.
       if ( ((pde & 0x20)==0) ||
            (isWrite && ((pde&0x40)==0)) ) {
         pde |= (0x20 | (isWrite<<6)); // Update A and possibly D bits
         BX_CPU_THIS_PTR mem->writePhysicalPage(this, pde_addr, 4, &pde);
-        }
       }
+    }
     else
 #endif
-      { // 4k pages.
+    { // 4k pages.
       Bit32u   pte, pte_addr;
 
       // Get page table entry
@@ -756,7 +754,7 @@ BX_CPU_C::dtranslate_linear(bx_address laddr, unsigned pl, unsigned rw)
         // Page Table Entry NOT present
         error_code = 0x00000000; // RSVD=0, P=0
         goto page_fault_not_present;
-        }
+      }
 
       priv_index =
 #if BX_CPU_LEVEL >= 4
@@ -769,21 +767,21 @@ BX_CPU_C::dtranslate_linear(bx_address laddr, unsigned pl, unsigned rw)
       if (!priv_check[priv_index]) {
         error_code = 0x00000001; // RSVD=0, P=1
         goto page_fault_access;
-        }
+      }
 
       // Update PDE A bit if needed.
       if ( (pde & 0x20)==0 ) {
         pde |= 0x20; // Update A bit.
         BX_CPU_THIS_PTR mem->writePhysicalPage(this, pde_addr, 4, &pde);
-        }
+      }
 
       // Update PTE A/D bits if needed.
-      if ( ((pte & 0x20)==0) ||
-           (isWrite && ((pte&0x40)==0)) ) {
+      if (((pte & 0x20)==0) || (isWrite && ((pte&0x40)==0))) 
+      {
         pte |= (0x20 | (isWrite<<6)); // Update A and possibly D bits
         BX_CPU_THIS_PTR mem->writePhysicalPage(this, pte_addr, 4, &pte);
-        }
       }
+    }
 
     // Calculate physical memory address and fill in TLB cache entry
     paddress = ppf | poffset;
@@ -825,7 +823,6 @@ BX_CPU_C::dtranslate_linear(bx_address laddr, unsigned pl, unsigned rw)
 
   lpf       = laddr & 0xfffff000; // linear page frame
   poffset   = laddr & 0x00000fff; // physical offset
-  isWrite   = (rw>=BX_WRITE); // write or r-m-w
 
 #if BX_USE_TLB
   TLB_index = BX_TLB_INDEX_OF(lpf);
@@ -854,7 +851,7 @@ BX_CPU_C::dtranslate_linear(bx_address laddr, unsigned pl, unsigned rw)
     // Page Directory Entry NOT present
     error_code = 0x00000000; // RSVD=0, P=0
     goto page_fault_not_present;
-    }
+  }
 
 #if BX_SUPPORT_4MEG_PAGES
   if ((pde & 0x80) && (BX_CPU_THIS_PTR cr4.get_PSE())) {
@@ -885,20 +882,18 @@ BX_CPU_C::dtranslate_linear(bx_address laddr, unsigned pl, unsigned rw)
     if (!priv_check[priv_index]) {
       error_code = 0x00000001; // RSVD=0, P=1
       goto page_fault_access;
-      }
-
-    // Update PDE if A/D bits if needed.
-    if ( ((pde & 0x20)==0) ||
-         (isWrite && ((pde&0x40)==0)) ) {
-      pde |= (0x20 | (isWrite<<6)); // Update A and possibly D bits
-      BX_CPU_THIS_PTR mem->writePhysicalPage(this, pde_addr, 4, &pde);
-      }
     }
 
+    // Update PDE if A/D bits if needed.
+    if (((pde & 0x20)==0) || (isWrite && ((pde&0x40)==0))) {
+      pde |= (0x20 | (isWrite<<6)); // Update A and possibly D bits
+      BX_CPU_THIS_PTR mem->writePhysicalPage(this, pde_addr, 4, &pde);
+    }
+  }
   // Else normal 4Kbyte page...
   else
 #endif
-    {
+  {
     Bit32u   pte, pte_addr;
 
 #if (BX_CPU_LEVEL < 6)
@@ -906,7 +901,7 @@ BX_CPU_C::dtranslate_linear(bx_address laddr, unsigned pl, unsigned rw)
     if ( !(pde & 0x20) ) {
       pde |= 0x20;
       BX_CPU_THIS_PTR mem->writePhysicalPage(this, pde_addr, 4, &pde);
-      }
+    }
 #endif
 
     // Get page table entry
@@ -934,7 +929,7 @@ BX_CPU_C::dtranslate_linear(bx_address laddr, unsigned pl, unsigned rw)
       // Page Table Entry NOT present
       error_code = 0x00000000; // RSVD=0, P=0
       goto page_fault_not_present;
-      }
+    }
 
     priv_index =
 #if BX_CPU_LEVEL >= 4
@@ -947,24 +942,23 @@ BX_CPU_C::dtranslate_linear(bx_address laddr, unsigned pl, unsigned rw)
     if (!priv_check[priv_index]) {
       error_code = 0x00000001; // RSVD=0, P=1
       goto page_fault_access;
-      }
+    }
 
 #if (BX_CPU_LEVEL >= 6)
     // update PDE if A bit was not set before
     if ( !(pde & 0x20) ) {
       pde |= 0x20;
       BX_CPU_THIS_PTR mem->writePhysicalPage(this, pde_addr, 4, &pde);
-      }
+    }
 #endif
 
     // Update PTE if A/D bits if needed.
-    if ( ((pte & 0x20)==0) ||
-         (isWrite && ((pte&0x40)==0)) ) {
+    if (((pte & 0x20)==0) || (isWrite && ((pte&0x40)==0))) 
+    {
       pte |= (0x20 | (isWrite<<6)); // Update A and possibly D bits
       BX_CPU_THIS_PTR mem->writePhysicalPage(this, pte_addr, 4, &pte);
-      }
     }
-
+  }
 
   // Calculate physical memory address and fill in TLB cache entry
   paddress = ppf | poffset;
@@ -1115,9 +1109,6 @@ page_fault:
 BX_CPU_C::access_linear(bx_address laddr, unsigned length, unsigned pl,
     unsigned rw, void *data)
 {
-  Bit32u pageOffset;
-  unsigned xlate_rw;
-
 
 #if BX_X86_DEBUGGER
   if ( BX_CPU_THIS_PTR dr7 & 0x000000ff ) {
@@ -1137,15 +1128,9 @@ BX_CPU_C::access_linear(bx_address laddr, unsigned length, unsigned pl,
     }
 #endif
 
-  if (rw==BX_RW) {
-    xlate_rw = BX_RW;
-    rw = BX_READ;
-    }
-  else {
-    xlate_rw = rw;
-    }
-
-  pageOffset = laddr & 0x00000fff;
+  Bit32u pageOffset = laddr & 0x00000fff;
+  unsigned xlate_rw = rw;
+  if (rw==BX_RW) rw = BX_READ;
 
   if (BX_CPU_THIS_PTR cr0.pg) {
     /* check for reference across multiple pages */
@@ -1239,7 +1224,6 @@ BX_CPU_C::access_linear(bx_address laddr, unsigned length, unsigned pl,
       return;
       }
     }
-
   else {
     // Paging off.
     if ( (pageOffset + length) <= 4096 ) {
@@ -1388,7 +1372,6 @@ BX_CPU_C::access_linear(bx_address laddr, unsigned length, unsigned pl,
         }
 #endif
       }
-    return;
     }
 }
 
diff --git a/bochs/memory/memory.h b/bochs/memory/memory.h
index 3fba5a68e..968ed22bc 100644
--- a/bochs/memory/memory.h
+++ b/bochs/memory/memory.h
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: memory.h,v 1.21 2004-09-01 18:12:23 vruppert Exp $
+// $Id: memory.h,v 1.22 2004-10-29 21:15:48 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -26,7 +26,8 @@
 //  License along with this library; if not, write to the Free Software
 //  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 
-
+#ifndef BX_MEM_H
+#  define BX_MEM_H 1
 
 #define BX_USE_MEM_SMF 0
 
@@ -55,7 +56,6 @@ struct memory_handler_struct {
 };
 
 class BOCHSAPI BX_MEM_C : public logfunctions {
-
 private:
   struct memory_handler_struct **memory_handlers;
   bx_bool rom_present[65];
@@ -90,7 +90,7 @@ public:
   BX_MEM_SMF bx_bool dbg_crc32(
     unsigned long (*f)(unsigned char *buf, int len),
     Bit32u addr1, Bit32u addr2, Bit32u *crc);
-  BX_MEM_SMF Bit8u * getHostMemAddr(BX_CPU_C *cpu, Bit32u a20Addr, unsigned op) BX_CPP_AttrRegparmN(3);
+  BX_MEM_SMF Bit8u* getHostMemAddr(BX_CPU_C *cpu, Bit32u a20Addr, unsigned op) BX_CPP_AttrRegparmN(3);
   BX_MEM_SMF bx_bool registerMemoryHandlers(memory_handler_t read_handler, void *read_param, 
 		  memory_handler_t write_handler, void *write_param, 
 		  unsigned long begin_addr, unsigned long end_addr);
@@ -113,3 +113,5 @@ BOCHSAPI extern BX_MEM_C    *bx_mem_array[BX_ADDRESS_SPACES];
 #else
 #  define BX_DBG_DIRTY_PAGE(page)
 #endif
+
+#endif
diff --git a/bochs/memory/misc_mem.cc b/bochs/memory/misc_mem.cc
index 25b09f54f..962581ca9 100644
--- a/bochs/memory/misc_mem.cc
+++ b/bochs/memory/misc_mem.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: misc_mem.cc,v 1.51 2004-10-21 18:20:40 sshwarts Exp $
+// $Id: misc_mem.cc,v 1.52 2004-10-29 21:15:48 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2002  MandrakeSoft S.A.
@@ -95,7 +95,7 @@ void BX_MEM_C::init_memory(int memsize)
 {
   int idx;
 
-  BX_DEBUG(("Init $Id: misc_mem.cc,v 1.51 2004-10-21 18:20:40 sshwarts Exp $"));
+  BX_DEBUG(("Init $Id: misc_mem.cc,v 1.52 2004-10-29 21:15:48 sshwarts Exp $"));
   // you can pass 0 if memory has been allocated already through
   // the constructor, or the desired size of memory if it hasn't
   // BX_INFO(("%.2fMB", (float)(BX_MEM_THIS megabytes) ));
@@ -336,23 +336,24 @@ BX_MEM_C::dbg_crc32(unsigned long (*f)(unsigned char *buf, int len),
   return(1);
 }
 
+//
+// Return a host address corresponding to the guest physical memory
+// address (with A20 already applied), given that the calling
+// code will perform an 'op' operation.  This address will be
+// used for direct access to guest memory as an acceleration by
+// a few instructions, like REP {MOV, INS, OUTS, etc}.
+// Values of 'op' are { BX_READ, BX_WRITE, BX_RW }.
+//
+// The other assumption is that the calling code _only_ accesses memory
+// directly within the page that encompasses the address requested.
+//
+
   Bit8u * BX_CPP_AttrRegparmN(3)
 BX_MEM_C::getHostMemAddr(BX_CPU_C *cpu, Bit32u a20Addr, unsigned op)
-  // Return a host address corresponding to the guest physical memory
-  // address (with A20 already applied), given that the calling
-  // code will perform an 'op' operation.  This address will be
-  // used for direct access to guest memory as an acceleration by
-  // a few instructions, like REP {MOV, INS, OUTS, etc}.
-  // Values of 'op' are { BX_READ, BX_WRITE, BX_RW }.
-
-  // The other assumption is that the calling code _only_ accesses memory
-  // directly within the page that encompasses the address requested.
 {
   if ( a20Addr >= BX_MEM_THIS len )
     return(NULL); // Error, requested addr is out of bounds.
-  if (op == BX_READ) {
-    if ( (a20Addr > 0x9ffff) && (a20Addr < 0xc0000) )
-      return(NULL); // Vetoed!  Mem mapped IO (VGA)
+
 #if BX_SUPPORT_APIC
     bx_generic_apic_c *local_apic = &cpu->local_apic;
     if (local_apic->get_base () == (a20Addr & ~0xfff))
@@ -361,6 +362,10 @@ BX_MEM_C::getHostMemAddr(BX_CPU_C *cpu, Bit32u a20Addr, unsigned op)
     if (ioapic->get_base () == (a20Addr & ~0xfff))
       return(NULL); // Vetoed!  IOAPIC address space
 #endif
+
+  if (op == BX_READ) {
+    if ( (a20Addr > 0x9ffff) && (a20Addr < 0xc0000) )
+      return(NULL); // Vetoed!  Mem mapped IO (VGA)
 #if !BX_SUPPORT_PCI
     return( (Bit8u *) & vector[a20Addr] );
 #else
@@ -382,14 +387,6 @@ BX_MEM_C::getHostMemAddr(BX_CPU_C *cpu, Bit32u a20Addr, unsigned op)
     }
   else { // op == {BX_WRITE, BX_RW}
     Bit8u *retAddr;
-#if BX_SUPPORT_APIC
-    bx_generic_apic_c *local_apic = &cpu->local_apic;
-    if (local_apic->get_base () == (a20Addr & ~0xfff))
-      return(NULL); // Vetoed!  APIC address space
-    bx_generic_apic_c *ioapic = bx_devices.ioapic;
-    if (ioapic->get_base () == (a20Addr & ~0xfff))
-      return(NULL); // Vetoed!  IOAPIC address space
-#endif
     if ((a20Addr < 0xa0000) || (a20Addr > 0xfffff)) {
       retAddr = (Bit8u *) & vector[a20Addr];
     }