optimization
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29a674e520
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: sse_pfp.cc,v 1.66 2010-04-14 20:20:17 sshwarts Exp $
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// $Id: sse_pfp.cc,v 1.67 2010-12-19 22:50:28 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2003-2009 Stanislav Shwartsman
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@ -300,36 +300,32 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::CVTTPS2PI_PqWps(bxInstruction_c *i)
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/* check floating point status word for a pending FPU exceptions */
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FPU_check_pending_exceptions();
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Bit64u op;
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BxPackedMmxRegister result;
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BxPackedMmxRegister op;
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/* op is a register or memory reference */
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if (i->modC0()) {
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op = BX_READ_XMM_REG_LO_QWORD(i->rm());
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MMXUQ(op) = BX_READ_XMM_REG_LO_QWORD(i->rm());
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}
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else {
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
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op = read_virtual_qword(i->seg(), eaddr);
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MMXUQ(op) = read_virtual_qword(i->seg(), eaddr);
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}
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float_status_t status_word;
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mxcsr_to_softfloat_status_word(status_word, MXCSR);
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float32 r0 = (float32)(op & 0xFFFFFFFF);
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float32 r1 = (float32)(op >> 32);
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if (MXCSR.get_DAZ()) {
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r0 = float32_denormal_to_zero(r0);
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r1 = float32_denormal_to_zero(r1);
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MMXUD0(op) = float32_denormal_to_zero(MMXUD0(op));
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MMXUD1(op) = float32_denormal_to_zero(MMXUD1(op));
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}
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MMXUD0(result) = float32_to_int32_round_to_zero(r0, status_word);
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MMXUD1(result) = float32_to_int32_round_to_zero(r1, status_word);
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MMXUD0(op) = float32_to_int32_round_to_zero(MMXUD0(op), status_word);
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MMXUD1(op) = float32_to_int32_round_to_zero(MMXUD1(op), status_word);
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check_exceptionsSSE(status_word.float_exception_flags);
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prepareFPU2MMX(); /* cause FPU2MMX state transition */
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BX_WRITE_MMX_REG(i->nnn(), result);
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BX_WRITE_MMX_REG(i->nnn(), op);
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#endif
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}
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@ -482,36 +478,32 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::CVTPS2PI_PqWps(bxInstruction_c *i)
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/* check floating point status word for a pending FPU exceptions */
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FPU_check_pending_exceptions();
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Bit64u op;
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BxPackedMmxRegister result;
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BxPackedMmxRegister op;
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/* op is a register or memory reference */
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if (i->modC0()) {
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op = BX_READ_XMM_REG_LO_QWORD(i->rm());
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MMXUQ(op) = BX_READ_XMM_REG_LO_QWORD(i->rm());
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}
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else {
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
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op = read_virtual_qword(i->seg(), eaddr);
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MMXUQ(op) = read_virtual_qword(i->seg(), eaddr);
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}
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float_status_t status_word;
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mxcsr_to_softfloat_status_word(status_word, MXCSR);
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float32 r0 = (float32)(op & 0xFFFFFFFF);
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float32 r1 = (float32)(op >> 32);
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if (MXCSR.get_DAZ()) {
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r0 = float32_denormal_to_zero(r0);
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r1 = float32_denormal_to_zero(r1);
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MMXUD0(op) = float32_denormal_to_zero(MMXUD0(op));
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MMXUD1(op) = float32_denormal_to_zero(MMXUD1(op));
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}
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MMXUD0(result) = float32_to_int32(r0, status_word);
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MMXUD1(result) = float32_to_int32(r1, status_word);
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MMXUD0(op) = float32_to_int32(MMXUD0(op), status_word);
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MMXUD1(op) = float32_to_int32(MMXUD1(op), status_word);
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check_exceptionsSSE(status_word.float_exception_flags);
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prepareFPU2MMX(); /* cause FPU2MMX state transition */
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BX_WRITE_MMX_REG(i->nnn(), result);
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BX_WRITE_MMX_REG(i->nnn(), op);
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#endif
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}
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@ -660,32 +652,29 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::CVTPS2PD_VpsWps(bxInstruction_c *i)
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#if BX_CPU_LEVEL >= 6
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BX_CPU_THIS_PTR prepareSSE();
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Bit64u op;
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BxPackedMmxRegister op;
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BxPackedXmmRegister result;
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/* op is a register or memory reference */
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if (i->modC0()) {
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op = BX_READ_XMM_REG_LO_QWORD(i->rm());
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MMXUQ(op) = BX_READ_XMM_REG_LO_QWORD(i->rm());
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}
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else {
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
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op = read_virtual_qword(i->seg(), eaddr);
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MMXUQ(op) = read_virtual_qword(i->seg(), eaddr);
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}
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float_status_t status_word;
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mxcsr_to_softfloat_status_word(status_word, MXCSR);
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float32 r0 = (float32)(op & 0xFFFFFFFF);
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float32 r1 = (float32)(op >> 32);
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if (MXCSR.get_DAZ()) {
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r0 = float32_denormal_to_zero(r0);
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r1 = float32_denormal_to_zero(r1);
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MMXUD0(op) = float32_denormal_to_zero(MMXUD0(op));
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MMXUD1(op) = float32_denormal_to_zero(MMXUD1(op));
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}
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result.xmm64u(0) = float32_to_float64(r0, status_word);
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result.xmm64u(1) = float32_to_float64(r1, status_word);
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result.xmm64u(0) = float32_to_float64(MMXUD0(op), status_word);
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result.xmm64u(1) = float32_to_float64(MMXUD1(op), status_word);
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check_exceptionsSSE(status_word.float_exception_flags);
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BX_WRITE_XMM_REG(i->nnn(), result);
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@ -1015,24 +1004,21 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::CVTDQ2PD_VpdWq(bxInstruction_c *i)
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#if BX_CPU_LEVEL >= 6
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BX_CPU_THIS_PTR prepareSSE();
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Bit64u op;
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BxPackedMmxRegister op;
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BxPackedXmmRegister result;
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/* op is a register or memory reference */
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if (i->modC0()) {
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op = BX_READ_XMM_REG_LO_QWORD(i->rm());
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MMXUQ(op) = BX_READ_XMM_REG_LO_QWORD(i->rm());
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}
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else {
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
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op = read_virtual_qword(i->seg(), eaddr);
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MMXUQ(op) = read_virtual_qword(i->seg(), eaddr);
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}
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Bit32u r0 = (Bit32u)(op & 0xFFFFFFFF);
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Bit32u r1 = (Bit32u)(op >> 32);
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result.xmm64u(0) = int32_to_float64(r0);
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result.xmm64u(1) = int32_to_float64(r1);
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result.xmm64u(0) = int32_to_float64(MMXUD0(op));
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result.xmm64u(1) = int32_to_float64(MMXUD1(op));
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BX_WRITE_XMM_REG(i->nnn(), result);
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#endif
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