small fixes
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: paging.cc,v 1.203 2010-04-01 20:06:09 sshwarts Exp $
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// $Id: paging.cc,v 1.204 2010-04-01 20:08:57 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001-2010 The Bochs Project
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@ -1101,9 +1101,6 @@ bx_phy_address BX_CPU_C::translate_linear(bx_address laddr, unsigned curr_pl, un
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}
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}
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// Calculate physical memory address and fill in TLB cache entry
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paddress = ppf | poffset;
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#if BX_CPU_LEVEL >= 5
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if (lpf_mask > 0xfff)
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BX_CPU_THIS_PTR TLB.split_large = 1;
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@ -1111,10 +1108,12 @@ bx_phy_address BX_CPU_C::translate_linear(bx_address laddr, unsigned curr_pl, un
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}
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else {
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// no paging
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ppf = lpf;
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paddress = lpf | poffset;
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ppf = (bx_phy_address) lpf;
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}
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// Calculate physical memory address and fill in TLB cache entry
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paddress = ppf | poffset;
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// direct memory access is NOT allowed by default
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tlbEntry->lpf = lpf | TLB_HostPtr;
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tlbEntry->lpf_mask = ~((bx_address) lpf_mask);
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@ -1188,11 +1187,7 @@ bx_bool BX_CPU_C::dbg_xlate_linear2phy(bx_address laddr, bx_phy_address *phy)
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#if BX_CPU_LEVEL >= 6
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if (BX_CPU_THIS_PTR cr4.get_PAE()) {
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int levels = 3;
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#if BX_SUPPORT_X86_64
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if (long_mode())
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levels = 4;
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#endif
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int levels = 3 + long_mode();
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for (int level = levels - 1; level >= 0; --level) {
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Bit64u pte;
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pt_address += 8 * ((laddr >> (12 + 9*level)) & 511);
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: vmx.h,v 1.20 2010-04-01 11:43:45 sshwarts Exp $
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// $Id: vmx.h,v 1.21 2010-04-01 20:08:57 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2009 Stanislav Shwartsman
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@ -575,7 +575,7 @@ typedef struct bx_VMCS
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#ifdef BX_VMX_ENABLE_ALL
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#define VMX_VM_EXEC_CTRL3_SUPPORTED_BITS (0x0000004f)
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#define VMX_VM_EXEC_CTRL3_SUPPORTED_BITS (0x000004ff)
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#else // only really supported features
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