From a1c11c788b9e358a54de39b855807bf34ecdb1c0 Mon Sep 17 00:00:00 2001 From: Stanislav Shwartsman Date: Thu, 29 Jan 2009 20:27:57 +0000 Subject: [PATCH] sepatate activity state from debug trap --- bochs/cpu/cpu.cc | 20 ++++++++++---------- bochs/cpu/cpu.h | 17 ++++++++--------- bochs/cpu/debugstuff.cc | 24 +++++++++--------------- bochs/cpu/init.cc | 6 ++++-- bochs/cpu/proc_ctrl.cc | 17 +++++++++-------- 5 files changed, 40 insertions(+), 44 deletions(-) diff --git a/bochs/cpu/cpu.cc b/bochs/cpu/cpu.cc index b03509434..b8ed0d042 100644 --- a/bochs/cpu/cpu.cc +++ b/bochs/cpu/cpu.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: cpu.cc,v 1.261 2009-01-27 21:13:38 sshwarts Exp $ +// $Id: cpu.cc,v 1.262 2009-01-29 20:27:57 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -429,25 +429,25 @@ unsigned BX_CPU_C::handleAsyncEvent(void) // // This area is where we process special conditions and events. // - if (BX_CPU_THIS_PTR debug_trap & BX_DEBUG_TRAP_SPECIAL) { - // I made up the bitmask above to mean HALT state. - // for one processor, pass the time as quickly as possible until + if (BX_CPU_THIS_PTR activity_state) { + // For one processor, pass the time as quickly as possible until // an interrupt wakes up the CPU. while (1) { - if ((BX_CPU_INTR && (BX_CPU_THIS_PTR get_IF() || (BX_CPU_THIS_PTR debug_trap & BX_DEBUG_TRAP_MWAIT_IF))) || + if ((BX_CPU_INTR && (BX_CPU_THIS_PTR get_IF() || + (BX_CPU_THIS_PTR activity_state == BX_ACTIVITY_STATE_MWAIT_IF))) || BX_CPU_THIS_PTR pending_NMI || BX_CPU_THIS_PTR pending_SMI) { // interrupt ends the HALT condition #if BX_SUPPORT_MONITOR_MWAIT - if (BX_CPU_THIS_PTR debug_trap & BX_DEBUG_TRAP_MWAIT) + if (BX_CPU_THIS_PTR activity_state >= BX_ACTIVITY_STATE_MWAIT) BX_MEM(0)->clear_monitor(BX_CPU_THIS_PTR bx_cpuid); #endif - BX_CPU_THIS_PTR debug_trap = 0; // clear traps for after resume + BX_CPU_THIS_PTR activity_state = 0; BX_CPU_THIS_PTR inhibit_mask = 0; // clear inhibits for after resume break; } - if ((BX_CPU_THIS_PTR debug_trap & BX_DEBUG_TRAP_SPECIAL) == 0) { + if (BX_CPU_THIS_PTR activity_state == BX_ACTIVITY_STATE_ACTIVE) { BX_INFO(("handleAsyncEvent: reset detected in HLT state")); break; } @@ -821,8 +821,8 @@ void BX_CPU_C::boundaryFetch(const Bit8u *fetchPtr, unsigned remainingInPage, bx void BX_CPU_C::deliver_SIPI(unsigned vector) { - if (BX_CPU_THIS_PTR debug_trap & BX_DEBUG_TRAP_SPECIAL) { - BX_CPU_THIS_PTR debug_trap &= ~BX_DEBUG_TRAP_SPECIAL; + if (BX_CPU_THIS_PTR activity_state == BX_ACTIVITY_STATE_WAIT_FOR_SIPI) { + BX_CPU_THIS_PTR activity_state = BX_ACTIVITY_STATE_ACTIVE; RIP = 0; load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], vector*0x100); BX_INFO(("%s started up at %04X:%08X by APIC", diff --git a/bochs/cpu/cpu.h b/bochs/cpu/cpu.h index be79d7ede..a59aa3704 100644 --- a/bochs/cpu/cpu.h +++ b/bochs/cpu/cpu.h @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: cpu.h,v 1.563 2009-01-27 21:13:38 sshwarts Exp $ +// $Id: cpu.h,v 1.564 2009-01-29 20:27:57 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -366,7 +366,6 @@ enum { #define BX_MODE_LONG_64 0x4 // EFER.LMA = 1, CR0.PE=1, CS.L=1 extern const char* cpu_mode_string(unsigned cpu_mode); -extern const char* cpu_state_string(Bit32u debug_trap); #if BX_SUPPORT_X86_64 #define IsCanonical(offset) ((Bit64u)((((Bit64s)(offset)) >> (BX_LIN_ADDRESS_WIDTH-1)) + 1) < 2) @@ -904,13 +903,13 @@ public: // for now... * 0 if current CS:IP caused exception */ unsigned errorno; /* signal exception during instruction emulation */ -#define BX_DEBUG_TRAP_HALT (0x80000000) -#define BX_DEBUG_TRAP_SHUTDOWN (0x40000000) -#define BX_DEBUG_TRAP_WAIT_FOR_SIPI (0x20000000) -#define BX_DEBUG_TRAP_MWAIT (0x10000000) -#define BX_DEBUG_TRAP_MWAIT_IF (0x18000000) -// combine all possible states -#define BX_DEBUG_TRAP_SPECIAL (0xf8000000) +#define BX_ACTIVITY_STATE_ACTIVE (0) +#define BX_ACTIVITY_STATE_HLT (1) +#define BX_ACTIVITY_STATE_SHUTDOWN (2) +#define BX_ACTIVITY_STATE_WAIT_FOR_SIPI (3) +#define BX_ACTIVITY_STATE_MWAIT (4) +#define BX_ACTIVITY_STATE_MWAIT_IF (5) + unsigned activity_state; Bit32u debug_trap; // holds DR6 value (16bit) to be set as well volatile Bit32u async_event; diff --git a/bochs/cpu/debugstuff.cc b/bochs/cpu/debugstuff.cc index e968c7c8d..f508bcf1f 100644 --- a/bochs/cpu/debugstuff.cc +++ b/bochs/cpu/debugstuff.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: debugstuff.cc,v 1.101 2009-01-19 19:01:03 sshwarts Exp $ +// $Id: debugstuff.cc,v 1.102 2009-01-29 20:27:57 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -96,32 +96,26 @@ const char* cpu_mode_string(unsigned cpu_mode) return cpu_mode_name[cpu_mode]; } -const char* cpu_state_string(Bit32u debug_trap) +const char* cpu_state_string(unsigned state) { - unsigned cpu_state = 5; // unknown state - static const char *cpu_state_name[] = { "active", - "executing mwait", - "waiting for SIPI", - "in shutdown", "halted", + "in shutdown", + "waiting for SIPI", + "executing mwait", + "executing mwait inhibit interrups", "unknown state" }; - if(debug_trap & BX_DEBUG_TRAP_HALT) cpu_state = 4; - else if (debug_trap & BX_DEBUG_TRAP_SHUTDOWN) cpu_state = 3; - else if (debug_trap & BX_DEBUG_TRAP_WAIT_FOR_SIPI) cpu_state = 2; - else if (debug_trap & BX_DEBUG_TRAP_MWAIT) cpu_state = 1; - else if (debug_trap & BX_DEBUG_TRAP_SPECIAL) cpu_state = 5; - else cpu_state = 0; - return cpu_state_name[cpu_state]; + if(state >= 6) state = 6; + return cpu_state_name[state]; } void BX_CPU_C::debug(bx_address offset) { BX_INFO(("CPU is in %s (%s)", cpu_mode_string(BX_CPU_THIS_PTR get_cpu_mode()), - cpu_state_string(BX_CPU_THIS_PTR debug_trap))); + cpu_state_string(BX_CPU_THIS_PTR activity_state))); BX_INFO(("CS.d_b = %u bit", BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.d_b ? 32 : 16)); BX_INFO(("SS.d_b = %u bit", diff --git a/bochs/cpu/init.cc b/bochs/cpu/init.cc index 55fd23d68..1514eb5f4 100644 --- a/bochs/cpu/init.cc +++ b/bochs/cpu/init.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: init.cc,v 1.192 2009-01-23 17:48:38 sshwarts Exp $ +// $Id: init.cc,v 1.193 2009-01-29 20:27:57 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -318,6 +318,7 @@ void BX_CPU_C::register_state(void) BXRS_PARAM_SPECIAL32(cpu, cpuid_std, param_save_handler, param_restore_handler); BXRS_PARAM_SPECIAL32(cpu, cpuid_ext, param_save_handler, param_restore_handler); BXRS_DEC_PARAM_SIMPLE(cpu, cpu_mode); + BXRS_HEX_PARAM_SIMPLE(cpu, activity_state); BXRS_HEX_PARAM_SIMPLE(cpu, inhibit_mask); BXRS_HEX_PARAM_SIMPLE(cpu, debug_trap); #if BX_SUPPORT_X86_64 @@ -733,6 +734,7 @@ void BX_CPU_C::reset(unsigned source) BX_CPU_THIS_PTR setEFlags(0x2); // Bit1 is always set BX_CPU_THIS_PTR inhibit_mask = 0; + BX_CPU_THIS_PTR activity_state = BX_ACTIVITY_STATE_ACTIVE; BX_CPU_THIS_PTR debug_trap = 0; /* instruction pointer */ @@ -1020,7 +1022,7 @@ void BX_CPU_C::reset(unsigned source) // it's an application processor, halt until IPI is heard. BX_CPU_THIS_PTR msr.apicbase &= ~0x0100; /* clear bit 8 BSP */ BX_INFO(("CPU[%d] is an application processor. Halting until IPI.", apic_id)); - debug_trap |= BX_DEBUG_TRAP_WAIT_FOR_SIPI; + activity_state = BX_ACTIVITY_STATE_WAIT_FOR_SIPI; async_event = 1; } #endif diff --git a/bochs/cpu/proc_ctrl.cc b/bochs/cpu/proc_ctrl.cc index 867c153e1..bb89b72fa 100644 --- a/bochs/cpu/proc_ctrl.cc +++ b/bochs/cpu/proc_ctrl.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: proc_ctrl.cc,v 1.277 2009-01-27 20:29:05 sshwarts Exp $ +// $Id: proc_ctrl.cc,v 1.278 2009-01-29 20:27:57 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -77,7 +77,7 @@ void BX_CPU_C::shutdown(void) BX_CPU_THIS_PTR clear_IF(); // artificial trap bit, why use another variable. - BX_CPU_THIS_PTR debug_trap |= BX_DEBUG_TRAP_SHUTDOWN; // artificial trap + BX_CPU_THIS_PTR activity_state = BX_ACTIVITY_STATE_HLT; BX_CPU_THIS_PTR async_event = 1; // so processor knows to check // Execution of this instruction completes. The processor // will remain in a halt state until one of the above conditions @@ -115,7 +115,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::HLT(bxInstruction_c *i) // following HLT. // artificial trap bit, why use another variable. - BX_CPU_THIS_PTR debug_trap |= BX_DEBUG_TRAP_HALT; // artificial trap + BX_CPU_THIS_PTR activity_state = BX_ACTIVITY_STATE_HLT; BX_CPU_THIS_PTR async_event = 1; // so processor knows to check // Execution of this instruction completes. The processor // will remain in a halt state until one of the above conditions @@ -1457,8 +1457,8 @@ void BX_CPU_C::check_monitor(bx_phy_address begin_addr, unsigned len) { if (is_monitor(begin_addr, len)) { // wakeup from MWAIT state - BX_ASSERT(BX_CPU_THIS_PTR debug_trap & BX_DEBUG_TRAP_MWAIT); - BX_CPU_THIS_PTR debug_trap &= ~BX_DEBUG_TRAP_SPECIAL; + BX_ASSERT(BX_CPU_THIS_PTR activity_state >= BX_ACTIVITY_STATE_MWAIT); + BX_CPU_THIS_PTR activity_state = BX_ACTIVITY_STATE_ACTIVE; // clear monitor BX_MEM(0)->clear_monitor(BX_CPU_THIS_PTR bx_cpuid); BX_CPU_THIS_PTR monitor.reset_monitor(); @@ -1581,10 +1581,11 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MWAIT(bxInstruction_c *i) // the execution. Any far control transfer between MONITOR and MWAIT // resets the monitoring logic. - // artificial trap bit, why use another variable. - BX_CPU_THIS_PTR debug_trap |= BX_DEBUG_TRAP_MWAIT; // artificial trap if (ECX & 1) - BX_CPU_THIS_PTR debug_trap |= BX_DEBUG_TRAP_MWAIT_IF; + BX_CPU_THIS_PTR activity_state = BX_ACTIVITY_STATE_MWAIT_IF; + else + BX_CPU_THIS_PTR activity_state = BX_ACTIVITY_STATE_MWAIT; + BX_CPU_THIS_PTR async_event = 1; // so processor knows to check // Execution of this instruction completes. The processor // will remain in a optimized state until one of the above