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more transition to new softfloat code

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This commit is contained in:
Stanislav Shwartsman 2024-04-24 21:35:55 +03:00
parent 744d0b4fc0
commit a1be887ad8
21 changed files with 144 additions and 230 deletions
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8
bochs/cpu/avx/amx.cc
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@ -510,7 +510,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::TDPBF16PS_TnnnTrmTreg(bxInstruction_c *i)
// "round to nearest even" rounding mode is used when doing each accumulation of the FMA.
// output denormals are always flushed to zero and input denormals are always treated as zero.
float_status_t status = prepare_ne_softfloat_status_helper();
status.denormals_are_zeros = true;
status.softfloat_denormals_are_zeros = true;
for (unsigned m=0; m < max_m; m++) {
float32 tmp[32]; // new empty array
@ -565,7 +565,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::TDPFP16PS_TnnnTrmTreg(bxInstruction_c *i)
// "round to nearest even" rounding mode is used when doing each accumulation of the FMA.
// output FP32 denormals are always flushed to zero and input denormals are always treated as zero.
float_status_t status = prepare_ne_softfloat_status_helper();
status.denormals_are_zeros = true;
status.softfloat_denormals_are_zeros = true;
for (unsigned m=0; m < max_m; m++) {
float32 tmp[32]; // new empty array
@ -618,7 +618,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::TCMMRLFP16PS_TnnnTrmTreg(bxInstruction_c *
// "round to nearest even" rounding mode is used when doing each accumulation of the FMA.
// output FP32 denormals are always flushed to zero and input denormals are always treated as zero.
float_status_t status = prepare_ne_softfloat_status_helper();
status.denormals_are_zeros = true;
status.softfloat_denormals_are_zeros = true;
for (unsigned m=0; m < max_m; m++) {
float32 tmp[32]; // new empty array
@ -671,7 +671,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::TCMMIMFP16PS_TnnnTrmTreg(bxInstruction_c *
// "round to nearest even" rounding mode is used when doing each accumulation of the FMA.
// output FP32 denormals are always flushed to zero and input denormals are always treated as zero.
float_status_t status = prepare_ne_softfloat_status_helper();
status.denormals_are_zeros = true;
status.softfloat_denormals_are_zeros = true;
for (unsigned m=0; m < max_m; m++) {
float32 tmp[32]; // new empty array

2
bochs/cpu/avx/avx512_bf16.cc
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@ -89,7 +89,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::VDPBF16PS_MASK_VpsHdqWdqR(bxInstruction_c
// "round to nearest even" rounding mode is used when doing each accumulation of the FMA.
// output denormals are always flushed to zero and input denormals are always treated as zero.
float_status_t status = prepare_ne_softfloat_status_helper();
status.denormals_are_zeros = true;
status.softfloat_denormals_are_zeros = true;
for (unsigned n=0, tmp_mask = mask; n < DWORD_ELEMENTS(len); n++, tmp_mask >>= 1) {
if (tmp_mask & 0x1) {

12
bochs/cpu/avx/avx512_cvt.cc
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@ -560,9 +560,9 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::VCVTPH2PS_MASK_VpsWpsR(bxInstruction_c *i)
result = BX_READ_AVX_REG(i->dst());
float_status_t status = mxcsr_to_softfloat_status_word(MXCSR);
status.denormals_are_zeros = 0; // ignore MXCSR.DAZ
status.softfloat_denormals_are_zeros = 0; // ignore MXCSR.DAZ
// no denormal exception is reported on MXCSR
status.float_suppress_exception = float_flag_denormal;
status.softfloat_suppressException = softfloat_flag_denormal;
Bit32u opmask = BX_READ_16BIT_OPMASK(i->opmask());
@ -586,10 +586,10 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::VCVTPS2PH_MASK_WpsVpsIbR(bxInstruction_c *
Bit8u control = i->Ib();
status.flush_underflow_to_zero = 0; // ignore MXCSR.FUZ
status.softfloat_flush_underflow_to_zero = 0; // ignore MXCSR.FUZ
// override MXCSR rounding mode with control coming from imm8
if ((control & 0x4) == 0)
status.float_rounding_mode = control & 0x3;
status.softfloat_roundingMode = control & 0x3;
Bit32u opmask = BX_READ_16BIT_OPMASK(i->opmask());
@ -621,10 +621,10 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::VCVTPS2PH_MASK_WpsVpsIbM(bxInstruction_c *
Bit8u control = i->Ib();
status.flush_underflow_to_zero = 0; // ignore MXCSR.FUZ
status.softfloat_flush_underflow_to_zero = 0; // ignore MXCSR.FUZ
// override MXCSR rounding mode with control coming from imm8
if ((control & 0x4) == 0)
status.float_rounding_mode = control & 0x3;
status.softfloat_roundingMode = control & 0x3;
Bit32u opmask = BX_READ_16BIT_OPMASK(i->opmask());
opmask &= CUT_OPMASK_TO(DWORD_ELEMENTS(len));

8
bochs/cpu/avx/avx512_pfp.cc
View File

@ -1159,7 +1159,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::VREDUCEPS_MASK_VpsWpsIbR(bxInstruction_c *
float_status_t status = mxcsr_to_softfloat_status_word(MXCSR);
softfloat_status_word_rc_override(status, i);
mxcsr_to_softfloat_status_word_imm_override(status, control);
status.float_suppress_exception |= float_flag_denormal | float_flag_underflow | float_flag_overflow;
status.softfloat_suppressException |= softfloat_flag_denormal | softfloat_flag_underflow | softfloat_flag_overflow;
for (unsigned n=0, mask = 0x1; n < DWORD_ELEMENTS(len); n++, mask <<= 1) {
if (opmask & mask)
@ -1194,7 +1194,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::VREDUCESS_MASK_VssHpsWssIbR(bxInstruction_
float_status_t status = mxcsr_to_softfloat_status_word(MXCSR);
softfloat_status_word_rc_override(status, i);
mxcsr_to_softfloat_status_word_imm_override(status, control);
status.float_suppress_exception |= float_flag_denormal | float_flag_underflow | float_flag_overflow;
status.softfloat_suppressException |= softfloat_flag_denormal | softfloat_flag_underflow | softfloat_flag_overflow;
op1.xmm32u(0) = float32_reduce(op2, scale, status);
@ -1222,7 +1222,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::VREDUCEPD_MASK_VpdWpdIbR(bxInstruction_c *
float_status_t status = mxcsr_to_softfloat_status_word(MXCSR);
softfloat_status_word_rc_override(status, i);
mxcsr_to_softfloat_status_word_imm_override(status, control);
status.float_suppress_exception |= float_flag_denormal | float_flag_underflow | float_flag_overflow;
status.softfloat_suppressException |= softfloat_flag_denormal | softfloat_flag_underflow | softfloat_flag_overflow;
for (unsigned n=0, mask = 0x1; n < QWORD_ELEMENTS(len); n++, mask <<= 1) {
if (opmask & mask)
@ -1257,7 +1257,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::VREDUCESD_MASK_VsdHpdWsdIbR(bxInstruction_
float_status_t status = mxcsr_to_softfloat_status_word(MXCSR);
softfloat_status_word_rc_override(status, i);
mxcsr_to_softfloat_status_word_imm_override(status, control);
status.float_suppress_exception |= float_flag_denormal | float_flag_underflow | float_flag_overflow;
status.softfloat_suppressException |= softfloat_flag_denormal | softfloat_flag_underflow | softfloat_flag_overflow;
op1.xmm64u(0) = float64_reduce(op2, scale, status);

12
bochs/cpu/avx/avx512_pfp16.cc
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@ -355,7 +355,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::VREDUCEPH_MASK_VphWphIbR(bxInstruction_c *
float_status_t status = mxcsr_to_softfloat_status_word(MXCSR);
softfloat_status_word_rc_override(status, i);
mxcsr_to_softfloat_status_word_imm_override(status, control);
status.float_suppress_exception |= float_flag_denormal | float_flag_underflow | float_flag_overflow;
status.softfloat_suppressException |= softfloat_flag_denormal | softfloat_flag_underflow | softfloat_flag_overflow;
for (unsigned n=0, mask = 0x1; n < WORD_ELEMENTS(len); n++, mask <<= 1) {
if (opmask & mask)
@ -390,7 +390,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::VREDUCESH_MASK_VshHphWshIbR(bxInstruction_
float_status_t status = mxcsr_to_softfloat_status_word(MXCSR);
softfloat_status_word_rc_override(status, i);
mxcsr_to_softfloat_status_word_imm_override(status, control);
status.float_suppress_exception |= float_flag_denormal | float_flag_underflow | float_flag_overflow;
status.softfloat_suppressException |= softfloat_flag_denormal | softfloat_flag_underflow | softfloat_flag_overflow;
op1.xmm16u(0) = float16_reduce(op2, scale, status);
@ -483,7 +483,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::VFCMULCSH_MASK_VshHphWshR(bxInstruction_c
float_status_t status = mxcsr_to_softfloat_status_word(MXCSR);
softfloat_status_word_rc_override(status, i);
status.float_exception_masks = float_all_exceptions_mask;
status.softfloat_exceptionMasks = softfloat_all_exceptions_mask;
int fma_control1 = (i->getIaOpcode() == BX_IA_V512_VFMULCSH_VshHphWsh_Kmask) ? softfloat_muladd_negate_product : 0;
int fma_control2 = (i->getIaOpcode() == BX_IA_V512_VFMULCSH_VshHphWsh_Kmask) ? 0 : softfloat_muladd_negate_product;
@ -516,7 +516,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::VFCMULCPH_MASK_VphHphWphR(bxInstruction_c
float_status_t status = mxcsr_to_softfloat_status_word(MXCSR);
softfloat_status_word_rc_override(status, i);
status.float_exception_masks = float_all_exceptions_mask;
status.softfloat_exceptionMasks = softfloat_all_exceptions_mask;
for (n=0, tmp_mask = mask; n < DWORD_ELEMENTS(len); n++, tmp_mask >>= 1) {
if (tmp_mask & 0x1) {
@ -556,7 +556,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::VFCMADDCSH_MASK_VshHphWshR(bxInstruction_c
float_status_t status = mxcsr_to_softfloat_status_word(MXCSR);
softfloat_status_word_rc_override(status, i);
status.float_exception_masks = float_all_exceptions_mask;
status.softfloat_exceptionMasks = softfloat_all_exceptions_mask;
int fma_control1 = (i->getIaOpcode() == BX_IA_V512_VFMADDCSH_VshHphWsh_Kmask) ? softfloat_muladd_negate_product : 0;
int fma_control2 = (i->getIaOpcode() == BX_IA_V512_VFMADDCSH_VshHphWsh_Kmask) ? 0 : softfloat_muladd_negate_product;
@ -589,7 +589,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::VFCMADDCPH_MASK_VphHphWphR(bxInstruction_c
float_status_t status = mxcsr_to_softfloat_status_word(MXCSR);
softfloat_status_word_rc_override(status, i);
status.float_exception_masks = float_all_exceptions_mask;
status.softfloat_exceptionMasks = softfloat_all_exceptions_mask;
for (n=0, tmp_mask = mask; n < DWORD_ELEMENTS(len); n++, tmp_mask >>= 1) {
if (tmp_mask & 0x1) {

8
bochs/cpu/avx/avx_cvt.cc
View File

@ -295,9 +295,9 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::VCVTPH2PS_VpsWpsR(bxInstruction_c *i)
unsigned len = i->getVL();
float_status_t status = mxcsr_to_softfloat_status_word(MXCSR);
status.denormals_are_zeros = 0; // ignore MXCSR.DAZ
status.softfloat_denormals_are_zeros = 0; // ignore MXCSR.DAZ
// no denormal exception is reported on MXCSR
status.float_suppress_exception = float_flag_denormal;
status.softfloat_suppressException = softfloat_flag_denormal;
for (unsigned n=0; n < DWORD_ELEMENTS(len); n++) {
result.vmm32u(n) = f16_to_f32(op.ymm16u(n), &status);
@ -319,10 +319,10 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::VCVTPS2PH_WpsVpsIb(bxInstruction_c *i)
Bit8u control = i->Ib();
status.flush_underflow_to_zero = 0; // ignore MXCSR.FUZ
status.softfloat_flush_underflow_to_zero = 0; // ignore MXCSR.FUZ
// override MXCSR rounding mode with control coming from imm8
if ((control & 0x4) == 0)
status.float_rounding_mode = control & 0x3;
status.softfloat_roundingMode = control & 0x3;
for (unsigned n=0; n < DWORD_ELEMENTS(len); n++) {
result.vmm16u(n) = f32_to_f16(op.vmm32u(n), &status);

12
bochs/cpu/avx/avx_ne_convert.cc
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@ -36,13 +36,13 @@ float_status_t prepare_ne_softfloat_status_helper()
{
float_status_t status;
status.float_rounding_mode = softfloat_round_near_even;
status.float_exception_flags = 0;
status.float_exception_masks = float_all_exceptions_mask;
status.float_suppress_exception = float_all_exceptions_mask;
status.flush_underflow_to_zero = true;
status.softfloat_roundingMode = softfloat_round_near_even;
status.softfloat_exceptionFlags = 0;
status.softfloat_exceptionMasks = softfloat_all_exceptions_mask;
status.softfloat_suppressException = softfloat_all_exceptions_mask;
status.softfloat_flush_underflow_to_zero = true;
// input denormals not converted to zero and handled normally
status.denormals_are_zeros = false;
status.softfloat_denormals_are_zeros = false;
return status;
}

1
bochs/cpu/fpu/f2xm1.cc
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@ -25,6 +25,7 @@ these four paragraphs for those parts of this code that are retained.
#define FLOAT128
#include "softfloat-macros.h"
#include "fpu_trans.h"
#include "softfloat-helpers.h"

3
bochs/cpu/fpu/fpatan.cc
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@ -25,6 +25,7 @@ these four paragraphs for those parts of this code that are retained.
#define FLOAT128
#include "softfloat-macros.h"
#include "fpu_trans.h"
#include "fpu_constant.h"
@ -272,7 +273,7 @@ approximation_completed:
if (swap) x = f128_sub(float128_pi2, x, &status);
floatx80 result = f128_to_extF80(x, &status);
if (zSign) floatx80_chs(result);
int rSign = extractFloatx80Sign(result);
int rSign = extF80_sign(result);
if (!bSign && rSign)
return extF80_add(result, floatx80_pi, &status);
if (bSign && !rSign)

96
bochs/cpu/fpu/fpu_arith.cc
View File

@ -37,27 +37,27 @@ float_status_t i387cw_to_softfloat_status_word(Bit16u control_word)
switch(precision)
{
case FPU_PR_32_BITS:
status.float_rounding_precision = 32;
status.extF80_roundingPrecision = 32;
break;
case FPU_PR_64_BITS:
status.float_rounding_precision = 64;
status.extF80_roundingPrecision = 64;
break;
case FPU_PR_80_BITS:
status.float_rounding_precision = 80;
status.extF80_roundingPrecision = 80;
break;
default:
/* With the precision control bits set to 01 "(reserved)", a
real CPU behaves as if the precision control bits were
set to 11 "80 bits" */
status.float_rounding_precision = 80;
status.extF80_roundingPrecision = 80;
}
status.float_exception_flags = 0; // clear exceptions before execution
status.float_rounding_mode = (control_word & FPU_CW_RC) >> 10;
status.flush_underflow_to_zero = 0;
status.float_suppress_exception = 0;
status.float_exception_masks = control_word & FPU_CW_Exceptions_Mask;
status.denormals_are_zeros = 0;
status.softfloat_exceptionFlags = 0; // clear exceptions before execution
status.softfloat_roundingMode = (control_word & FPU_CW_RC) >> 10;
status.softfloat_flush_underflow_to_zero = 0;
status.softfloat_suppressException = 0;
status.softfloat_exceptionMasks = control_word & FPU_CW_Exceptions_Mask;
status.softfloat_denormals_are_zeros = 0;
return status;
}
@ -183,7 +183,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FADD_ST0_STj(bxInstruction_c *i)
floatx80 result = extF80_add(a, b, &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -212,7 +212,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FADD_STi_ST0(bxInstruction_c *i)
floatx80 result = extF80_add(a, b, &status);
if (! FPU_exception(i, status.float_exception_flags)) {
if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
BX_WRITE_FPU_REG(result, i->dst());
if (pop_stack)
BX_CPU_THIS_PTR the_i387.FPU_pop();
@ -244,7 +244,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FADD_SINGLE_REAL(bxInstruction_c *i)
if (! FPU_handle_NaN(a, load_reg, result, status))
result = extF80_add(a, f32_to_extF80(load_reg, &status), &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -273,7 +273,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FADD_DOUBLE_REAL(bxInstruction_c *i)
if (! FPU_handle_NaN(a, load_reg, result, status))
result = extF80_add(a, f64_to_extF80(load_reg, &status), &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -303,7 +303,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIADD_WORD_INTEGER(bxInstruction_c *i)
floatx80 result = extF80_add(a, b, &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -333,7 +333,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIADD_DWORD_INTEGER(bxInstruction_c *i)
floatx80 result = extF80_add(a, b, &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -360,7 +360,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FMUL_ST0_STj(bxInstruction_c *i)
floatx80 result = extF80_mul(a, b, &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -389,7 +389,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FMUL_STi_ST0(bxInstruction_c *i)
floatx80 result = extF80_mul(a, b, &status);
if (! FPU_exception(i, status.float_exception_flags)) {
if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
BX_WRITE_FPU_REG(result, i->dst());
if (pop_stack)
BX_CPU_THIS_PTR the_i387.FPU_pop();
@ -421,7 +421,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FMUL_SINGLE_REAL(bxInstruction_c *i)
if (! FPU_handle_NaN(a, load_reg, result, status))
result = extF80_mul(a, f32_to_extF80(load_reg, &status), &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -450,7 +450,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FMUL_DOUBLE_REAL(bxInstruction_c *i)
if (! FPU_handle_NaN(a, load_reg, result, status))
result = extF80_mul(a, f64_to_extF80(load_reg, &status), &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -480,7 +480,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIMUL_WORD_INTEGER(bxInstruction_c *i)
floatx80 result = extF80_mul(a, b, &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -510,7 +510,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIMUL_DWORD_INTEGER(bxInstruction_c *i)
floatx80 result = extF80_mul(a, b, &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -537,7 +537,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUB_ST0_STj(bxInstruction_c *i)
floatx80 result = extF80_sub(a, b, &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -564,7 +564,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUBR_ST0_STj(bxInstruction_c *i)
floatx80 result = extF80_sub(a, b, &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -593,7 +593,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUB_STi_ST0(bxInstruction_c *i)
floatx80 result = extF80_sub(a, b, &status);
if (! FPU_exception(i, status.float_exception_flags)) {
if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
BX_WRITE_FPU_REG(result, i->dst());
if (pop_stack)
BX_CPU_THIS_PTR the_i387.FPU_pop();
@ -625,7 +625,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUBR_STi_ST0(bxInstruction_c *i)
floatx80 result = extF80_sub(a, b, &status);
if (! FPU_exception(i, status.float_exception_flags)) {
if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
BX_WRITE_FPU_REG(result, i->dst());
if (pop_stack)
BX_CPU_THIS_PTR the_i387.FPU_pop();
@ -657,7 +657,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUB_SINGLE_REAL(bxInstruction_c *i)
if (! FPU_handle_NaN(a, load_reg, result, status))
result = extF80_sub(a, f32_to_extF80(load_reg, &status), &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -686,7 +686,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUBR_SINGLE_REAL(bxInstruction_c *i)
if (! FPU_handle_NaN(b, load_reg, result, status))
result = extF80_sub(f32_to_extF80(load_reg, &status), b, &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -715,7 +715,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUB_DOUBLE_REAL(bxInstruction_c *i)
if (! FPU_handle_NaN(a, load_reg, result, status))
result = extF80_sub(a, f64_to_extF80(load_reg, &status), &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -745,7 +745,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUBR_DOUBLE_REAL(bxInstruction_c *i)
if (! FPU_handle_NaN(b, load_reg, result, status))
result = extF80_sub(f64_to_extF80(load_reg, &status), b, &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -775,7 +775,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISUB_WORD_INTEGER(bxInstruction_c *i)
floatx80 result = extF80_sub(a, b, &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -805,7 +805,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISUBR_WORD_INTEGER(bxInstruction_c *i)
floatx80 result = extF80_sub(a, b, &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -832,7 +832,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISUB_DWORD_INTEGER(bxInstruction_c *i)
floatx80 result = extF80_sub(BX_READ_FPU_REG(0), i32_to_extF80(load_reg), &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -862,7 +862,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISUBR_DWORD_INTEGER(bxInstruction_c *i)
floatx80 result = extF80_sub(a, b, &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -889,7 +889,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIV_ST0_STj(bxInstruction_c *i)
floatx80 result = extF80_div(a, b, &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -916,7 +916,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIVR_ST0_STj(bxInstruction_c *i)
floatx80 result = extF80_div(a, b, &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -945,7 +945,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIV_STi_ST0(bxInstruction_c *i)
floatx80 result = extF80_div(a, b, &status);
if (! FPU_exception(i, status.float_exception_flags)) {
if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
BX_WRITE_FPU_REG(result, i->dst());
if (pop_stack)
BX_CPU_THIS_PTR the_i387.FPU_pop();
@ -977,7 +977,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIVR_STi_ST0(bxInstruction_c *i)
floatx80 result = extF80_div(a, b, &status);
if (! FPU_exception(i, status.float_exception_flags)) {
if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
BX_WRITE_FPU_REG(result, i->dst());
if (pop_stack)
BX_CPU_THIS_PTR the_i387.FPU_pop();
@ -1009,7 +1009,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIV_SINGLE_REAL(bxInstruction_c *i)
if (! FPU_handle_NaN(a, load_reg, result, status))
result = extF80_div(a, f32_to_extF80(load_reg, &status), &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -1038,7 +1038,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIVR_SINGLE_REAL(bxInstruction_c *i)
if (! FPU_handle_NaN(b, load_reg, result, status))
result = extF80_div(f32_to_extF80(load_reg, &status), b, &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -1067,7 +1067,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIV_DOUBLE_REAL(bxInstruction_c *i)
if (! FPU_handle_NaN(a, load_reg, result, status))
result = extF80_div(a, f64_to_extF80(load_reg, &status), &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -1096,7 +1096,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIVR_DOUBLE_REAL(bxInstruction_c *i)
if (! FPU_handle_NaN(b, load_reg, result, status))
result = extF80_div(f64_to_extF80(load_reg, &status), b, &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -1126,7 +1126,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIDIV_WORD_INTEGER(bxInstruction_c *i)
floatx80 result = extF80_div(a, b, &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -1156,7 +1156,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIDIVR_WORD_INTEGER(bxInstruction_c *i)
floatx80 result = extF80_div(a, b, &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -1186,7 +1186,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIDIV_DWORD_INTEGER(bxInstruction_c *i)
floatx80 result = extF80_div(a, b, &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -1216,7 +1216,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIDIVR_DWORD_INTEGER(bxInstruction_c *i)
floatx80 result = extF80_div(a, b, &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -1239,7 +1239,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSQRT(bxInstruction_c *i)
floatx80 result = extF80_sqrt(BX_READ_FPU_REG(0), &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -1263,7 +1263,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FRNDINT(bxInstruction_c *i)
floatx80 result = extF80_roundToInt(BX_READ_FPU_REG(0), &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);

20
bochs/cpu/fpu/fpu_compare.cc
View File

@ -107,7 +107,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FCOM_STi(bxInstruction_c *i)
int rc = extF80_compare(BX_READ_FPU_REG(0), BX_READ_FPU_REG(i->src()), &status);
setcc(status_word_flags_fpu_compare(rc));
if (! FPU_exception(i, status.float_exception_flags)) {
if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
if (pop_stack)
BX_CPU_THIS_PTR the_i387.FPU_pop();
}
@ -143,7 +143,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FCOMI_ST0_STj(bxInstruction_c *i)
int rc = extF80_compare(BX_READ_FPU_REG(0), BX_READ_FPU_REG(i->src()), &status);
BX_CPU_THIS_PTR write_eflags_fpu_compare(rc);
if (! FPU_exception(i, status.float_exception_flags)) {
if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
if (pop_stack)
BX_CPU_THIS_PTR the_i387.FPU_pop();
}
@ -179,7 +179,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FUCOMI_ST0_STj(bxInstruction_c *i)
int rc = extF80_compare_quiet(BX_READ_FPU_REG(0), BX_READ_FPU_REG(i->src()), &status);
BX_CPU_THIS_PTR write_eflags_fpu_compare(rc);
if (! FPU_exception(i, status.float_exception_flags)) {
if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
if (pop_stack)
BX_CPU_THIS_PTR the_i387.FPU_pop();
}
@ -213,7 +213,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FUCOM_STi(bxInstruction_c *i)
int rc = extF80_compare_quiet(BX_READ_FPU_REG(0), BX_READ_FPU_REG(i->src()), &status);
setcc(status_word_flags_fpu_compare(rc));
if (! FPU_exception(i, status.float_exception_flags)) {
if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
if (pop_stack)
BX_CPU_THIS_PTR the_i387.FPU_pop();
}
@ -261,7 +261,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FCOM_SINGLE_REAL(bxInstruction_c *i)
}
setcc(status_word_flags_fpu_compare(rc));
if (! FPU_exception(i, status.float_exception_flags)) {
if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
if (pop_stack)
BX_CPU_THIS_PTR the_i387.FPU_pop();
}
@ -309,7 +309,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FCOM_DOUBLE_REAL(bxInstruction_c *i)
}
setcc(status_word_flags_fpu_compare(rc));
if (! FPU_exception(i, status.float_exception_flags)) {
if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
if (pop_stack)
BX_CPU_THIS_PTR the_i387.FPU_pop();
}
@ -350,7 +350,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FICOM_WORD_INTEGER(bxInstruction_c *i)
i32_to_extF80((Bit32s)(load_reg)), &status);
setcc(status_word_flags_fpu_compare(rc));
if (! FPU_exception(i, status.float_exception_flags)) {
if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
if (pop_stack)
BX_CPU_THIS_PTR the_i387.FPU_pop();
}
@ -390,7 +390,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FICOM_DWORD_INTEGER(bxInstruction_c *i)
int rc = extF80_compare(BX_READ_FPU_REG(0), i32_to_extF80(load_reg), &status);
setcc(status_word_flags_fpu_compare(rc));
if (! FPU_exception(i, status.float_exception_flags)) {
if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
if (pop_stack)
BX_CPU_THIS_PTR the_i387.FPU_pop();
}
@ -428,7 +428,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FCOMPP(bxInstruction_c *i)
int rc = extF80_compare(BX_READ_FPU_REG(0), BX_READ_FPU_REG(1), quiet, &status);
setcc(status_word_flags_fpu_compare(rc));
if (! FPU_exception(i, status.float_exception_flags)) {
if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
BX_CPU_THIS_PTR the_i387.FPU_pop();
BX_CPU_THIS_PTR the_i387.FPU_pop();
}
@ -456,7 +456,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FTST(bxInstruction_c *i)
int rc = extF80_compare(BX_READ_FPU_REG(0), Const_Z, &status);
setcc(status_word_flags_fpu_compare(rc));
FPU_exception(i, status.float_exception_flags);
FPU_exception(i, status.softfloat_exceptionFlags);
}
BX_NEXT_INSTR(i);

26
bochs/cpu/fpu/fpu_load_store.cc
View File

@ -91,7 +91,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FLD_SINGLE_REAL(bxInstruction_c *i)
// convert to floatx80 format
floatx80 result = f32_to_extF80(load_reg, &status);
unsigned unmasked = FPU_exception(i, status.float_exception_flags);
unsigned unmasked = FPU_exception(i, status.softfloat_exceptionFlags);
if (! (unmasked & FPU_CW_Invalid)) {
BX_CPU_THIS_PTR the_i387.FPU_push();
BX_WRITE_FPU_REG(result, 0);
@ -122,7 +122,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FLD_DOUBLE_REAL(bxInstruction_c *i)
// convert to floatx80 format
floatx80 result = f64_to_extF80(load_reg, &status);
unsigned unmasked = FPU_exception(i, status.float_exception_flags);
unsigned unmasked = FPU_exception(i, status.softfloat_exceptionFlags);
if (! (unmasked & FPU_CW_Invalid)) {
BX_CPU_THIS_PTR the_i387.FPU_push();
BX_WRITE_FPU_REG(result, 0);
@ -329,7 +329,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FST_SINGLE_REAL(bxInstruction_c *i)
save_reg = extF80_to_f32(BX_READ_FPU_REG(0), &status);
if (FPU_exception(i, status.float_exception_flags, 1))
if (FPU_exception(i, status.softfloat_exceptionFlags, 1))
BX_NEXT_INSTR(i);
}
@ -375,7 +375,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FST_DOUBLE_REAL(bxInstruction_c *i)
save_reg = extF80_to_f64(BX_READ_FPU_REG(0), &status);
if (FPU_exception(i, status.float_exception_flags, 1))
if (FPU_exception(i, status.softfloat_exceptionFlags, 1))
BX_NEXT_INSTR(i);
}
@ -454,7 +454,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIST_WORD_INTEGER(bxInstruction_c *i)
save_reg = extF80_to_i16(BX_READ_FPU_REG(0), &status);
if (FPU_exception(i, status.float_exception_flags, 1))
if (FPU_exception(i, status.softfloat_exceptionFlags, 1))
BX_NEXT_INSTR(i);
}
@ -500,7 +500,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIST_DWORD_INTEGER(bxInstruction_c *i)
save_reg = extF80_to_i32(BX_READ_FPU_REG(0), &status);
if (FPU_exception(i, status.float_exception_flags, 1))
if (FPU_exception(i, status.softfloat_exceptionFlags, 1))
BX_NEXT_INSTR(i);
}
@ -544,7 +544,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISTP_QWORD_INTEGER(bxInstruction_c *i)
save_reg = extF80_to_i64(BX_READ_FPU_REG(0), &status);
if (FPU_exception(i, status.float_exception_flags, 1))
if (FPU_exception(i, status.softfloat_exceptionFlags, 1))
BX_NEXT_INSTR(i);
}
@ -600,10 +600,10 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FBSTP_PACKED_BCD(bxInstruction_c *i)
save_val = -save_val;
if (save_val > BX_CONST64(999999999999999999)) {
status.float_exception_flags = float_flag_invalid; // throw away other flags
softfloat_setFlags(&status, softfloat_flag_invalid); // throw away other flags
}
if (! (status.float_exception_flags & float_flag_invalid))
if (! (status.softfloat_exceptionFlags & softfloat_flag_invalid))
{
save_reg_hi = (sign) ? 0x8000 : 0;
save_reg_lo = 0;
@ -619,7 +619,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FBSTP_PACKED_BCD(bxInstruction_c *i)
}
/* check for fpu arithmetic exceptions */
if (FPU_exception(i, status.float_exception_flags, 1))
if (FPU_exception(i, status.softfloat_exceptionFlags, 1))
BX_NEXT_INSTR(i);
}
@ -666,7 +666,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISTTP16(bxInstruction_c *i)
save_reg = extF80_to_i16_round_to_zero(BX_READ_FPU_REG(0), &status);
if (FPU_exception(i, status.float_exception_flags, 1))
if (FPU_exception(i, status.softfloat_exceptionFlags, 1))
BX_NEXT_INSTR(i);
}
@ -711,7 +711,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISTTP32(bxInstruction_c *i)
save_reg = extF80_to_i32_round_to_zero(BX_READ_FPU_REG(0), &status);
if (FPU_exception(i, status.float_exception_flags, 1))
if (FPU_exception(i, status.softfloat_exceptionFlags, 1))
BX_NEXT_INSTR(i);
}
@ -756,7 +756,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISTTP64(bxInstruction_c *i)
save_reg = extF80_to_i64_round_to_zero(BX_READ_FPU_REG(0), &status);
if (FPU_exception(i, status.float_exception_flags, 1))
if (FPU_exception(i, status.softfloat_exceptionFlags, 1))
BX_NEXT_INSTR(i);
}

26
bochs/cpu/fpu/fpu_trans.cc
View File

@ -51,7 +51,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::F2XM1(bxInstruction_c *i)
floatx80 result = f2xm1(BX_READ_FPU_REG(0), status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -76,7 +76,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FYL2X(bxInstruction_c *i)
floatx80 result = fyl2x(BX_READ_FPU_REG(0), BX_READ_FPU_REG(1), status);
if (! FPU_exception(i, status.float_exception_flags)) {
if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
BX_CPU_THIS_PTR the_i387.FPU_pop();
BX_WRITE_FPU_REG(result, 0);
}
@ -125,7 +125,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FPTAN(bxInstruction_c *i)
if (extF80_isNaN(y))
{
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
{
BX_WRITE_FPU_REG(y, 0);
BX_CPU_THIS_PTR the_i387.FPU_push();
@ -135,7 +135,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FPTAN(bxInstruction_c *i)
BX_NEXT_INSTR(i);
}
if (! FPU_exception(i, status.float_exception_flags)) {
if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
BX_WRITE_FPU_REG(y, 0);
BX_CPU_THIS_PTR the_i387.FPU_push();
BX_WRITE_FPU_REG(Const_1, 0);
@ -163,7 +163,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FPATAN(bxInstruction_c *i)
floatx80 result = fpatan(BX_READ_FPU_REG(0), BX_READ_FPU_REG(1), status);
if (! FPU_exception(i, status.float_exception_flags)) {
if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
BX_CPU_THIS_PTR the_i387.FPU_pop();
BX_WRITE_FPU_REG(result, 0);
}
@ -204,7 +204,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FXTRACT(bxInstruction_c *i)
//floatx80 b = floatx80_extract(a, status);
extFloat80_t b = extF80_extract(&a, &status);
if (! FPU_exception(i, status.float_exception_flags)) {
if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
BX_WRITE_FPU_REG(b, 0); // exponent
BX_CPU_THIS_PTR the_i387.FPU_push();
BX_WRITE_FPU_REG(a, 0); // fraction
@ -239,7 +239,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FPREM1(bxInstruction_c *i)
int flags = floatx80_ieee754_remainder(a, b, result, quotient, &status);
if (! FPU_exception(i, status.float_exception_flags)) {
if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
if (flags >= 0) {
int cc = 0;
if (flags) cc = FPU_SW_C2;
@ -282,7 +282,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FPREM(bxInstruction_c *i)
int flags = floatx80_remainder(a, b, result, quotient, &status);
if (! FPU_exception(i, status.float_exception_flags)) {
if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
if (flags >= 0) {
int cc = 0;
if (flags) cc = FPU_SW_C2;
@ -318,7 +318,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FYL2XP1(bxInstruction_c *i)
floatx80 result = fyl2xp1(BX_READ_FPU_REG(0), BX_READ_FPU_REG(1), status);
if (! FPU_exception(i, status.float_exception_flags)) {
if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
BX_CPU_THIS_PTR the_i387.FPU_pop();
BX_WRITE_FPU_REG(result, 0);
}
@ -364,7 +364,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSINCOS(bxInstruction_c *i)
BX_NEXT_INSTR(i);
}
if (! FPU_exception(i, status.float_exception_flags)) {
if (! FPU_exception(i, status.softfloat_exceptionFlags)) {
BX_WRITE_FPU_REG(sin_y, 0);
BX_CPU_THIS_PTR the_i387.FPU_push();
BX_WRITE_FPU_REG(cos_y, 0);
@ -392,7 +392,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSCALE(bxInstruction_c *i)
floatx80 result = extF80_scale(BX_READ_FPU_REG(0), BX_READ_FPU_REG(1), &status);
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(result, 0);
BX_NEXT_INSTR(i);
@ -422,7 +422,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSIN(bxInstruction_c *i)
BX_NEXT_INSTR(i);
}
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(y, 0);
BX_NEXT_INSTR(i);
@ -452,7 +452,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FCOS(bxInstruction_c *i)
BX_NEXT_INSTR(i);
}
if (! FPU_exception(i, status.float_exception_flags))
if (! FPU_exception(i, status.softfloat_exceptionFlags))
BX_WRITE_FPU_REG(y, 0);
BX_NEXT_INSTR(i);

1
bochs/cpu/fpu/fsincos.cc
View File

@ -26,6 +26,7 @@ these four paragraphs for those parts of this code that are retained.
#define FLOAT128
#define USE_estimateDiv128To64
#include "softfloat-macros.h"
#include "fpu_trans.h"
#include "softfloat-helpers.h"
#include "fpu_constant.h"

14
bochs/cpu/fpu/fyl2x.cc
View File

@ -25,6 +25,7 @@ these four paragraphs for those parts of this code that are retained.
#define FLOAT128
#include "softfloat-macros.h"
#include "fpu_trans.h"
#include "softfloat-helpers.h"
#include "fpu_constant.h"
@ -260,12 +261,13 @@ invalid:
return floatx80_default_nan;
}
aSig = extractFloatx80Frac(a);
aExp = extractFloatx80Exp(a);
aSign = extractFloatx80Sign(a);
bSig = extractFloatx80Frac(b);
bExp = extractFloatx80Exp(b);
bSign = extractFloatx80Sign(b);
aSig = extF80_fraction(a);
aExp = extF80_exp(a);
aSign = extF80_sign(a);
bSig = extF80_fraction(b);
bExp = extF80_exp(b);
bSign = extF80_sign(b);
int zSign = aSign ^ bSign;
if (aExp == 0x7FFF) {

2
bochs/cpu/fpu/softfloat-macros.h
View File

@ -27,6 +27,8 @@ the work is derivative, and (2) the source code includes prominent notice with
these four paragraphs for those parts of this code that are retained.
=============================================================================*/
#include <config.h> /* generated by configure script from config.h.in */
/*============================================================================
* Adapted for Bochs (x86 achitecture simulator) by
* Stanislav Shwartsman [sshwarts at sourceforge net]

60
bochs/cpu/fpu/softfloat-specialize.h
View File

@ -165,42 +165,8 @@ BX_CPP_INLINE float64 packFloat64(int zSign, Bit16s zExp, Bit64u zSig)
#define floatx80_default_nan_exp 0xFFFF
#define floatx80_default_nan_fraction BX_CONST64(0xC000000000000000)
#define floatx80_fraction extractFloatx80Frac
#define floatx80_exp extractFloatx80Exp
#define floatx80_sign extractFloatx80Sign
#define FLOATX80_EXP_BIAS 0x3FFF
/*----------------------------------------------------------------------------
| Returns the fraction bits of the extended double-precision floating-point
| value `a'.
*----------------------------------------------------------------------------*/
BX_CPP_INLINE Bit64u extractFloatx80Frac(floatx80 a)
{
return a.fraction;
}
/*----------------------------------------------------------------------------
| Returns the exponent bits of the extended double-precision floating-point
| value `a'.
*----------------------------------------------------------------------------*/
BX_CPP_INLINE Bit32s extractFloatx80Exp(floatx80 a)
{
return a.exp & 0x7FFF;
}
/*----------------------------------------------------------------------------
| Returns the sign bit of the extended double-precision floating-point value
| `a'.
*----------------------------------------------------------------------------*/
BX_CPP_INLINE int extractFloatx80Sign(floatx80 a)
{
return a.exp>>15;
}
/*----------------------------------------------------------------------------
| Packs the sign `zSign', exponent `zExp', and significand `zSig' into an
| extended double-precision floating-point value, returning the result.
@ -214,28 +180,6 @@ BX_CPP_INLINE floatx80 packFloatx80(int zSign, Bit32s zExp, Bit64u zSig)
return z;
}
/*----------------------------------------------------------------------------
| Returns 1 if the extended double-precision floating-point value `a' is a
| NaN; otherwise returns 0.
*----------------------------------------------------------------------------*/
BX_CPP_INLINE int floatx80_is_nan(floatx80 a)
{
return ((a.exp & 0x7FFF) == 0x7FFF) && (Bit64s) (a.fraction<<1);
}
/*----------------------------------------------------------------------------
| Returns 1 if the extended double-precision floating-point value `a' is a
| signaling NaN; otherwise returns 0.
*----------------------------------------------------------------------------*/
BX_CPP_INLINE int floatx80_is_signaling_nan(floatx80 a)
{
Bit64u aLow = a.fraction & ~BX_CONST64(0x4000000000000000);
return ((a.exp & 0x7FFF) == 0x7FFF) &&
((Bit64u) (aLow<<1)) && (a.fraction == aLow);
}
/*----------------------------------------------------------------------------
| The pattern for a default generated extended double-precision NaN.
*----------------------------------------------------------------------------*/
@ -246,10 +190,6 @@ static const floatx80 floatx80_default_nan =
#ifdef FLOAT128
#include "softfloat-macros.h"
#define float128_exp extractFloat128Exp
/*----------------------------------------------------------------------------
| Packs the sign `zSign', the exponent `zExp', and the significand formed
| by the concatenation of `zSig0' and `zSig1' into a quadruple-precision

26
bochs/cpu/fpu/softfloat.h
View File

@ -37,8 +37,6 @@ these four paragraphs for those parts of this code that are retained.
#ifndef _SOFTFLOAT_H_
#define _SOFTFLOAT_H_
#define FLOATX80
/*----------------------------------------------------------------------------
| Software IEC/IEEE floating-point types.
*----------------------------------------------------------------------------*/
@ -46,30 +44,6 @@ typedef Bit16u float16, bfloat16;
typedef Bit32u float32;
typedef Bit64u float64;
/*----------------------------------------------------------------------------
| Software IEC/IEEE floating-point rounding mode.
*----------------------------------------------------------------------------*/
enum float_round_t {
float_round_nearest_even = 0,
float_round_down = 1,
float_round_up = 2,
float_round_to_zero = 3
};
/*----------------------------------------------------------------------------
| Software IEC/IEEE floating-point exception flags.
*----------------------------------------------------------------------------*/
enum float_exception_flag_t {
float_flag_invalid = 0x01,
float_flag_denormal = 0x02,
float_flag_divbyzero = 0x04,
float_flag_overflow = 0x08,
float_flag_underflow = 0x10,
float_flag_inexact = 0x20
};
const unsigned float_all_exceptions_mask = 0x3f;
#include "../softfloat3e/include/softfloat.h"
#endif

15
bochs/cpu/softfloat3e/include/softfloat.h
View File

@ -47,11 +47,8 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#include <stdint.h>
#include "softfloat_types.h"
#include "softfloat-extra.h"
#define FLOATX80
struct softfloat_status_t
{
uint8_t softfloat_roundingMode;
@ -67,14 +64,6 @@ struct softfloat_status_t
| Valid values are 32, 64, and 80.
*----------------------------------------------------------------------------*/
uint8_t extF80_roundingPrecision;
#define float_rounding_mode softfloat_roundingMode
#define float_exception_flags softfloat_exceptionFlags
#define flush_underflow_to_zero softfloat_flush_underflow_to_zero
#define denormals_are_zeros softfloat_denormals_are_zeros
#define float_rounding_precision extF80_roundingPrecision
#define float_exception_masks softfloat_exceptionMasks
#define float_suppress_exception softfloat_suppressException
};
typedef struct softfloat_status_t float_status_t;
@ -106,6 +95,10 @@ enum softfloat_exception_flag_t {
softfloat_flag_inexact = 0x20
};
static const unsigned softfloat_all_exceptions_mask = 0x3f;
#define FLOATX80
#ifdef FLOATX80
#define RAISE_SW_C1 0x0200
#endif

16
bochs/cpu/sse_pfp.cc
View File

@ -54,14 +54,14 @@ float_status_t mxcsr_to_softfloat_status_word(bx_mxcsr_t mxcsr)
{
float_status_t status;
status.float_exception_flags = 0; // clear exceptions before execution
status.float_rounding_mode = mxcsr.get_rounding_mode();
status.softfloat_exceptionFlags = 0; // clear exceptions before execution
status.softfloat_roundingMode = mxcsr.get_rounding_mode();
// if underflow is masked and FUZ is 1, set it to 1, else to 0
status.flush_underflow_to_zero =
status.softfloat_flush_underflow_to_zero =
(mxcsr.get_flush_masked_underflow() && mxcsr.get_UM()) ? 1 : 0;
status.float_exception_masks = mxcsr.get_exceptions_masks();
status.float_suppress_exception = 0;
status.denormals_are_zeros = mxcsr.get_DAZ();
status.softfloat_exceptionMasks = mxcsr.get_exceptions_masks();
status.softfloat_suppressException = 0;
status.softfloat_denormals_are_zeros = mxcsr.get_DAZ();
return status;
}
@ -70,10 +70,10 @@ void mxcsr_to_softfloat_status_word_imm_override(float_status_t &status, Bit8u c
{
// override MXCSR rounding mode with control coming from imm8
if ((control & 0x4) == 0)
status.float_rounding_mode = control & 0x3;
status.softfloat_roundingMode = control & 0x3;
// ignore precision exception result
if (control & 0x8)
status.float_suppress_exception |= float_flag_inexact;
status.softfloat_suppressException |= softfloat_flag_inexact;
}
/* Comparison predicate for CMPSS/CMPPS instructions */

6
bochs/cpu/xmm.h
View File

@ -395,9 +395,9 @@ BX_CPP_INLINE void softfloat_status_word_rc_override(float_status_t &status, bxI
{
/* must be VL512 otherwise EVEX.LL encodes vector length */
if (i->modC0() && i->getEvexb()) {
status.float_rounding_mode = i->getRC();
status.float_suppress_exception = float_all_exceptions_mask;
status.float_exception_masks = float_all_exceptions_mask;
status.softfloat_roundingMode = i->getRC();
status.softfloat_suppressException = softfloat_all_exceptions_mask;
status.softfloat_exceptionMasks = softfloat_all_exceptions_mask;
}
}
#else