From a0b5ff48ec018a136091435551915163d368135c Mon Sep 17 00:00:00 2001 From: Stanislav Shwartsman Date: Sat, 31 Dec 2011 14:22:51 +0000 Subject: [PATCH] more SVM fixes --- bochs/cpu/cpu.h | 44 ++++++++++++++++++++++---------------------- bochs/cpu/svm.cc | 13 +++++++++---- 2 files changed, 31 insertions(+), 26 deletions(-) diff --git a/bochs/cpu/cpu.h b/bochs/cpu/cpu.h index 8346b0145..678a51f3a 100644 --- a/bochs/cpu/cpu.h +++ b/bochs/cpu/cpu.h @@ -4543,33 +4543,33 @@ BX_CPP_INLINE bx_bool BX_CPU_C::alignment_check(void) BX_CPP_INLINE int BX_CPU_C::bx_cpuid_support_svm(void) { - return (BX_CPU_THIS_PTR isa_extensions_bitmask & BX_ISA_SVM); + return (BX_CPU_THIS_PTR isa_extensions_bitmask & BX_ISA_SVM) != 0; } BX_CPP_INLINE int BX_CPU_C::bx_cpuid_support_smx(void) { - return (BX_CPU_THIS_PTR isa_extensions_bitmask & BX_ISA_SMX); + return (BX_CPU_THIS_PTR isa_extensions_bitmask & BX_ISA_SMX) != 0; } BX_CPP_INLINE int BX_CPU_C::bx_cpuid_support_vmx(void) { - return (BX_CPU_THIS_PTR isa_extensions_bitmask & BX_ISA_VMX); + return (BX_CPU_THIS_PTR isa_extensions_bitmask & BX_ISA_VMX) != 0; } BX_CPP_INLINE int BX_CPU_C::bx_cpuid_support_xsave(void) { - return (BX_CPU_THIS_PTR isa_extensions_bitmask & BX_ISA_XSAVE); + return (BX_CPU_THIS_PTR isa_extensions_bitmask & BX_ISA_XSAVE) != 0; } BX_CPP_INLINE int BX_CPU_C::bx_cpuid_support_x2apic(void) { - return (BX_CPU_THIS_PTR cpu_extensions_bitmask & BX_CPU_X2APIC); + return (BX_CPU_THIS_PTR cpu_extensions_bitmask & BX_CPU_X2APIC) != 0; } BX_CPP_INLINE int BX_CPU_C::bx_cpuid_support_pcid(void) { #if BX_SUPPORT_X86_64 - return (BX_CPU_THIS_PTR cpu_extensions_bitmask & BX_CPU_PCID); + return (BX_CPU_THIS_PTR cpu_extensions_bitmask & BX_CPU_PCID) != 0; #else return 0; #endif @@ -4578,7 +4578,7 @@ BX_CPP_INLINE int BX_CPU_C::bx_cpuid_support_pcid(void) BX_CPP_INLINE int BX_CPU_C::bx_cpuid_support_fsgsbase(void) { #if BX_SUPPORT_X86_64 - return (BX_CPU_THIS_PTR isa_extensions_bitmask & BX_ISA_FSGSBASE); + return (BX_CPU_THIS_PTR isa_extensions_bitmask & BX_ISA_FSGSBASE) != 0; #else return 0; #endif @@ -4586,63 +4586,63 @@ BX_CPP_INLINE int BX_CPU_C::bx_cpuid_support_fsgsbase(void) BX_CPP_INLINE int BX_CPU_C::bx_cpuid_support_smep(void) { - return (BX_CPU_THIS_PTR cpu_extensions_bitmask & BX_CPU_SMEP); + return (BX_CPU_THIS_PTR cpu_extensions_bitmask & BX_CPU_SMEP) != 0; } BX_CPP_INLINE int BX_CPU_C::bx_cpuid_support_vme(void) { - return (BX_CPU_THIS_PTR cpu_extensions_bitmask & BX_CPU_VME); + return (BX_CPU_THIS_PTR cpu_extensions_bitmask & BX_CPU_VME) != 0; } BX_CPP_INLINE int BX_CPU_C::bx_cpuid_support_tsc(void) { - return (BX_CPU_THIS_PTR isa_extensions_bitmask & BX_ISA_PENTIUM); + return (BX_CPU_THIS_PTR isa_extensions_bitmask & BX_ISA_PENTIUM) != 0; } BX_CPP_INLINE int BX_CPU_C::bx_cpuid_support_debug_extensions(void) { - return (BX_CPU_THIS_PTR cpu_extensions_bitmask & BX_CPU_DEBUG_EXTENSIONS); + return (BX_CPU_THIS_PTR cpu_extensions_bitmask & BX_CPU_DEBUG_EXTENSIONS) != 0; } BX_CPP_INLINE int BX_CPU_C::bx_cpuid_support_pse(void) { - return (BX_CPU_THIS_PTR cpu_extensions_bitmask & BX_CPU_PSE); + return (BX_CPU_THIS_PTR cpu_extensions_bitmask & BX_CPU_PSE) != 0; } BX_CPP_INLINE int BX_CPU_C::bx_cpuid_support_pae(void) { - return (BX_CPU_THIS_PTR cpu_extensions_bitmask & BX_CPU_PAE); + return (BX_CPU_THIS_PTR cpu_extensions_bitmask & BX_CPU_PAE) != 0; } BX_CPP_INLINE int BX_CPU_C::bx_cpuid_support_pge(void) { - return (BX_CPU_THIS_PTR cpu_extensions_bitmask & BX_CPU_PGE); + return (BX_CPU_THIS_PTR cpu_extensions_bitmask & BX_CPU_PGE) != 0; } BX_CPP_INLINE int BX_CPU_C::bx_cpuid_support_mmx(void) { - return (BX_CPU_THIS_PTR isa_extensions_bitmask & BX_ISA_MMX); + return (BX_CPU_THIS_PTR isa_extensions_bitmask & BX_ISA_MMX) != 0; } BX_CPP_INLINE int BX_CPU_C::bx_cpuid_support_sse(void) { - return (BX_CPU_THIS_PTR isa_extensions_bitmask & BX_ISA_SSE); + return (BX_CPU_THIS_PTR isa_extensions_bitmask & BX_ISA_SSE) != 0; } BX_CPP_INLINE int BX_CPU_C::bx_cpuid_support_sep(void) { - return (BX_CPU_THIS_PTR isa_extensions_bitmask & BX_ISA_SYSENTER_SYSEXIT); + return (BX_CPU_THIS_PTR isa_extensions_bitmask & BX_ISA_SYSENTER_SYSEXIT) != 0; } BX_CPP_INLINE int BX_CPU_C::bx_cpuid_support_fxsave_fxrstor(void) { - return (BX_CPU_THIS_PTR isa_extensions_bitmask & BX_ISA_SSE); + return (BX_CPU_THIS_PTR isa_extensions_bitmask & BX_ISA_SSE) != 0; } BX_CPP_INLINE int BX_CPU_C::bx_cpuid_support_x86_64(void) { #if BX_SUPPORT_X86_64 - return (BX_CPU_THIS_PTR cpu_extensions_bitmask & BX_CPU_LONG_MODE); + return (BX_CPU_THIS_PTR cpu_extensions_bitmask & BX_CPU_LONG_MODE) != 0; #else return 0; #endif @@ -4651,7 +4651,7 @@ BX_CPP_INLINE int BX_CPU_C::bx_cpuid_support_x86_64(void) BX_CPP_INLINE int BX_CPU_C::bx_cpuid_support_1g_paging(void) { #if BX_SUPPORT_X86_64 - return (BX_CPU_THIS_PTR cpu_extensions_bitmask & BX_CPU_1G_PAGES); + return (BX_CPU_THIS_PTR cpu_extensions_bitmask & BX_CPU_1G_PAGES) != 0; #else return 0; #endif @@ -4660,7 +4660,7 @@ BX_CPP_INLINE int BX_CPU_C::bx_cpuid_support_1g_paging(void) BX_CPP_INLINE int BX_CPU_C::bx_cpuid_support_rdtscp(void) { #if BX_SUPPORT_X86_64 - return (BX_CPU_THIS_PTR isa_extensions_bitmask & BX_ISA_RDTSCP); + return (BX_CPU_THIS_PTR isa_extensions_bitmask & BX_ISA_RDTSCP) != 0; #else return 0; #endif @@ -4668,7 +4668,7 @@ BX_CPP_INLINE int BX_CPU_C::bx_cpuid_support_rdtscp(void) BX_CPP_INLINE int BX_CPU_C::bx_cpuid_support_tsc_deadline(void) { - return (BX_CPU_THIS_PTR cpu_extensions_bitmask & BX_CPU_TSC_DEADLINE); + return (BX_CPU_THIS_PTR cpu_extensions_bitmask & BX_CPU_TSC_DEADLINE) != 0; } IMPLEMENT_EFLAG_ACCESSOR (ID, 21) diff --git a/bochs/cpu/svm.cc b/bochs/cpu/svm.cc index 43d00c042..fb6bb445a 100644 --- a/bochs/cpu/svm.cc +++ b/bochs/cpu/svm.cc @@ -28,6 +28,9 @@ #if BX_SUPPORT_SVM +// for debugging and save/restore +static const char *svm_segname[] = { "ES", "CS", "SS", "DS", "FS", "GS", "GDTR", "LDTR", "IDTR", "TR" }; + // When loading segment bases from the VMCB or the host save area // (on VMRUN or #VMEXIT), segment bases are canonicalized (i.e. // sign-extended from the highest implemented address bit to bit 63) @@ -858,8 +861,10 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VMRUN(bxInstruction_c *i) exception(BX_GP_EXCEPTION, 0); } - if (SVM_INTERCEPT(SVM_INTERCEPT1_VMRUN)) - Svm_Vmexit(SVM_VMEXIT_VMRUN); + if (BX_CPU_THIS_PTR in_svm_guest) { + if (SVM_INTERCEPT(SVM_INTERCEPT1_VMRUN)) + Svm_Vmexit(SVM_VMEXIT_VMRUN); + } bx_address pAddr = RAX & i->asize_mask(); if ((pAddr & 0xfff) != 0 || ! IsValidPhyAddr(pAddr)) { @@ -1106,7 +1111,7 @@ void BX_CPU_C::register_svm_state(bx_param_c *parent) // VMCB Control Fields // - bx_list_c *vmcb_ctrls = new bx_list_c(svm, "VMCB_CTRLS", 16); + bx_list_c *vmcb_ctrls = new bx_list_c(svm, "VMCB_CTRLS", 17); BXRS_HEX_PARAM_FIELD(vmcb_ctrls, cr_rd_ctrl, BX_CPU_THIS_PTR vmcb.ctrls.cr_rd_ctrl); BXRS_HEX_PARAM_FIELD(vmcb_ctrls, cr_wr_ctrl, BX_CPU_THIS_PTR vmcb.ctrls.cr_wr_ctrl); @@ -1135,7 +1140,7 @@ void BX_CPU_C::register_svm_state(bx_param_c *parent) for(unsigned n=0; n<4; n++) { bx_segment_reg_t *segment = &BX_CPU_THIS_PTR vmcb.host_state.sregs[n]; - bx_list_c *sreg = new bx_list_c(host, strseg(segment), 12); + bx_list_c *sreg = new bx_list_c(host, svm_segname[n], 12); BXRS_HEX_PARAM_FIELD(sreg, selector, segment->selector.value); BXRS_HEX_PARAM_FIELD(sreg, valid, segment->cache.valid); BXRS_PARAM_BOOL(sreg, p, segment->cache.p);