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In 64-bit mode, the CS, DS, ES, and SS segment overrides are ignored.

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This commit is contained in:
Stanislav Shwartsman 2005-02-12 19:25:33 +00:00
parent 799403620e
commit 9492942ae6
2 changed files with 138 additions and 130 deletions
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2
bochs/cpu/fetchdecode.cc
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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: fetchdecode.cc,v 1.74 2005-01-28 20:50:47 sshwarts Exp $
// $Id: fetchdecode.cc,v 1.75 2005-02-12 19:25:33 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.

22
bochs/cpu/fetchdecode64.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: fetchdecode64.cc,v 1.69 2004-12-12 22:12:41 sshwarts Exp $
// $Id: fetchdecode64.cc,v 1.70 2005-02-12 19:25:33 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -74,6 +74,10 @@
* presence or absence of the LOCK prefix.
*/
// Segment override prefixes
// -------------------------
// In 64-bit mode, the CS, DS, ES, and SS segment overrides are ignored.
void BxResolveError(bxInstruction_c *);
@ -2194,36 +2198,40 @@ another_byte:
case 0x2e: // CS:
BX_INSTR_PREFIX_CS(BX_CPU_ID);
instruction->setSeg(BX_SEG_REG_CS);
/* instruction->setSeg(BX_SEG_REG_CS); */
if (ilen < remain) {
ilen++;
goto fetch_b1;
}
return(0);
case 0x26: // ES:
BX_INSTR_PREFIX_ES(BX_CPU_ID);
instruction->setSeg(BX_SEG_REG_ES);
/* instruction->setSeg(BX_SEG_REG_ES); */
if (ilen < remain) {
ilen++;
goto fetch_b1;
}
return(0);
case 0x36: // SS:
BX_INSTR_PREFIX_SS(BX_CPU_ID);
instruction->setSeg(BX_SEG_REG_SS);
/* instruction->setSeg(BX_SEG_REG_SS); */
if (ilen < remain) {
ilen++;
goto fetch_b1;
}
return(0);
case 0x3e: // DS:
BX_INSTR_PREFIX_DS(BX_CPU_ID);
instruction->setSeg(BX_SEG_REG_DS);
/* instruction->setSeg(BX_SEG_REG_DS); */
if (ilen < remain) {
ilen++;
goto fetch_b1;
}
return(0);
case 0x64: // FS:
BX_INSTR_PREFIX_FS(BX_CPU_ID);
instruction->setSeg(BX_SEG_REG_FS);
@ -2232,6 +2240,7 @@ another_byte:
goto fetch_b1;
}
return(0);
case 0x65: // GS:
BX_INSTR_PREFIX_GS(BX_CPU_ID);
instruction->setSeg(BX_SEG_REG_GS);
@ -2240,6 +2249,7 @@ another_byte:
goto fetch_b1;
}
return(0);
case 0xf0: // LOCK:
BX_INSTR_PREFIX_LOCK(BX_CPU_ID);
lock = 1;
@ -2593,7 +2603,6 @@ modrm_done:
return(0);
}
break;
case BxImmediate_O:
// For instructions which embed the address in the opcode. Note
// there is only 64/32-bit addressing available in long-mode.
@ -2613,7 +2622,6 @@ modrm_done:
else return(0);
}
break;
case BxImmediate_Iw:
case BxImmediate_IwIb:
if ((ilen+1) < remain) {