From 9147ac4b635b0eaf6f11b88518b73ce54e5a0305 Mon Sep 17 00:00:00 2001 From: Stanislav Shwartsman Date: Fri, 19 Mar 2010 14:43:13 +0000 Subject: [PATCH] MOVMSKPD/PS fix --- bochs/cpu/sse_move.cc | 10 +++++----- bochs/disasm/dis_groups.cc | 5 ++++- bochs/disasm/dis_tables.h | 5 ++++- bochs/disasm/dis_tables_sse.inc | 6 +++--- bochs/disasm/disasm.h | 5 ++++- bochs/disasm/opcodes.inc | 6 +++--- 6 files changed, 23 insertions(+), 14 deletions(-) diff --git a/bochs/cpu/sse_move.cc b/bochs/cpu/sse_move.cc index 1c14092ec..b86582148 100644 --- a/bochs/cpu/sse_move.cc +++ b/bochs/cpu/sse_move.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: sse_move.cc,v 1.112 2010-03-19 10:44:02 sshwarts Exp $ +// $Id: sse_move.cc,v 1.113 2010-03-19 14:43:12 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (c) 2003-2009 Stanislav Shwartsman @@ -730,7 +730,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVMSKPS_GdVRps(bxInstruction_c *i) #if BX_CPU_LEVEL >= 6 BX_CPU_THIS_PTR prepareSSE(); - BxPackedXmmRegister op = BX_READ_XMM_REG(i->nnn()); + BxPackedXmmRegister op = BX_READ_XMM_REG(i->rm()); Bit32u val32 = 0; if(op.xmm32u(0) & 0x80000000) val32 |= 0x1; @@ -738,7 +738,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVMSKPS_GdVRps(bxInstruction_c *i) if(op.xmm32u(2) & 0x80000000) val32 |= 0x4; if(op.xmm32u(3) & 0x80000000) val32 |= 0x8; - BX_WRITE_32BIT_REGZ(i->rm(), val32); + BX_WRITE_32BIT_REGZ(i->nnn(), val32); #endif } @@ -748,13 +748,13 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVMSKPD_GdVRpd(bxInstruction_c *i) #if BX_CPU_LEVEL >= 6 BX_CPU_THIS_PTR prepareSSE(); - BxPackedXmmRegister op = BX_READ_XMM_REG(i->nnn()); + BxPackedXmmRegister op = BX_READ_XMM_REG(i->rm()); Bit32u val32 = 0; if(op.xmm32u(1) & 0x80000000) val32 |= 0x1; if(op.xmm32u(3) & 0x80000000) val32 |= 0x2; - BX_WRITE_32BIT_REGZ(i->rm(), val32); + BX_WRITE_32BIT_REGZ(i->nnn(), val32); #endif } diff --git a/bochs/disasm/dis_groups.cc b/bochs/disasm/dis_groups.cc index ab73c2eb2..70d2d9f83 100644 --- a/bochs/disasm/dis_groups.cc +++ b/bochs/disasm/dis_groups.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: dis_groups.cc,v 1.49 2010-03-07 08:08:39 sshwarts Exp $ +// $Id: dis_groups.cc,v 1.50 2010-03-19 14:43:13 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (c) 2005-2009 Stanislav Shwartsman @@ -415,6 +415,9 @@ void disassembler::Udq(const x86_insn *insn) dis_sprintf("%%xmm%d", insn->rm); } +void disassembler::Ups(const x86_insn *insn) { Udq(insn); } +void disassembler::Upd(const x86_insn *insn) { Udq(insn); } + void disassembler::Vq(const x86_insn *insn) { if (intel_mode) diff --git a/bochs/disasm/dis_tables.h b/bochs/disasm/dis_tables.h index cd7bde4c8..5ee8d2e32 100755 --- a/bochs/disasm/dis_tables.h +++ b/bochs/disasm/dis_tables.h @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: dis_tables.h,v 1.42 2010-03-07 08:08:40 sshwarts Exp $ +// $Id: dis_tables.h,v 1.43 2010-03-19 14:43:13 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (c) 2005-2010 Stanislav Shwartsman @@ -133,6 +133,9 @@ #define Vsd &disassembler::Vsd #define Vps &disassembler::Vps #define Vpd &disassembler::Vpd + +#define Ups &disassembler::Ups +#define Upd &disassembler::Upd #define Udq &disassembler::Udq #define Ww &disassembler::Ww diff --git a/bochs/disasm/dis_tables_sse.inc b/bochs/disasm/dis_tables_sse.inc index 06f500b20..63e51d2c6 100755 --- a/bochs/disasm/dis_tables_sse.inc +++ b/bochs/disasm/dis_tables_sse.inc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: dis_tables_sse.inc,v 1.4 2010-03-19 10:43:38 sshwarts Exp $ +// $Id: dis_tables_sse.inc,v 1.5 2010-03-19 14:43:13 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (c) 2005-2010 Stanislav Shwartsman @@ -185,8 +185,8 @@ static BxDisasmOpcodeTable_t BxDisasmGroupSSE_0f2f[4] = { }; static BxDisasmOpcodeTable_t BxDisasmGroupSSE_0f50[4] = { - /* -- */ { 0, &Ia_movmskps_Gd_Vps }, - /* 66 */ { 0, &Ia_movmskpd_Gd_Vpd }, + /* -- */ { 0, &Ia_movmskps_Gd_Ups }, + /* 66 */ { 0, &Ia_movmskpd_Gd_Upd }, /* F2 */ { 0, &Ia_Invalid }, /* F3 */ { 0, &Ia_Invalid } }; diff --git a/bochs/disasm/disasm.h b/bochs/disasm/disasm.h index 469ef043d..3ae4c3efb 100644 --- a/bochs/disasm/disasm.h +++ b/bochs/disasm/disasm.h @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: disasm.h,v 1.57 2010-03-07 08:08:40 sshwarts Exp $ +// $Id: disasm.h,v 1.58 2010-03-19 14:43:13 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (c) 2005-2009 Stanislav Shwartsman @@ -497,7 +497,10 @@ public: void Nq(const x86_insn *insn); // xmm register + void Ups(const x86_insn *insn); + void Upd(const x86_insn *insn); void Udq(const x86_insn *insn); + void Vdq(const x86_insn *insn); void Vss(const x86_insn *insn); void Vsd(const x86_insn *insn); diff --git a/bochs/disasm/opcodes.inc b/bochs/disasm/opcodes.inc index 3c260234d..2195097f1 100755 --- a/bochs/disasm/opcodes.inc +++ b/bochs/disasm/opcodes.inc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: opcodes.inc,v 1.34 2010-03-19 10:43:38 sshwarts Exp $ +// $Id: opcodes.inc,v 1.35 2010-03-19 14:43:13 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (c) 2005-2009 Stanislav Shwartsman @@ -651,8 +651,8 @@ Ia_movlpd_Mq_Vpd = { "movlpd", "movlpd", Mq, Vpd, XX, XX, IA_SSE2 }, Ia_movlpd_Vpd_Mq = { "movlpd", "movlpd", Vpd, Mq, XX, XX, IA_SSE2 }, Ia_movlps_Mq_Vps = { "movlps", "movlps", Mq, Vps, XX, XX, IA_SSE }, Ia_movlps_Vps_Mq = { "movlps", "movlps", Vps, Mq, XX, XX, IA_SSE }, -Ia_movmskpd_Gd_Vpd = { "movmskpd", "movmskpd", Gd, Vpd, XX, XX, IA_SSE2 }, -Ia_movmskps_Gd_Vps = { "movmskps", "movmskps", Gd, Vps, XX, XX, IA_SSE }, +Ia_movmskpd_Gd_Upd = { "movmskpd", "movmskpd", Gd, Upd, XX, XX, IA_SSE2 }, +Ia_movmskps_Gd_Ups = { "movmskps", "movmskps", Gd, Ups, XX, XX, IA_SSE }, Ia_movntdq_Mdq_Vdq = { "movntdq", "movntdq", Mdq, Vdq, XX, XX, IA_SSE2 }, Ia_movntdqa_Vdq_Mdq = { "movntdqa", "movntdqa", Vdq, Mdq, XX, XX, IA_SSE4_1 }, Ia_movnti_Md_Gd = { "movnti", "movnti", Md, Gd, XX, XX, IA_SSE2 },