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implement more avx512bw opcodes

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This commit is contained in:
Stanislav Shwartsman 2014-07-19 19:01:17 +00:00
parent 7083e94077
commit 8ef5dcaca3
4 changed files with 60 additions and 6 deletions
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19
bochs/cpu/avx512.cc
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@ -571,6 +571,25 @@ AVX512_PSHIFT_QWORD_EL(VPSRLQ_MASK_VdqHdqWdqR, xmm_psrlq);
AVX512_PSHIFT_QWORD_EL(VPSRAQ_MASK_VdqHdqWdqR, xmm_psraq);
AVX512_PSHIFT_QWORD_EL(VPSLLQ_MASK_VdqHdqWdqR, xmm_psllq);
#define AVX512_PSHIFT_IMM_WORD_EL(HANDLER, func) \
/* AVX packed shift with imm8 instruction */ \
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C:: HANDLER (bxInstruction_c *i) \
{ \
BxPackedAvxRegister op = BX_READ_AVX_REG(i->src()); \
unsigned len = i->getVL(); \
\
for (unsigned n=0; n < len; n++) \
(func)(&op.vmm128(n), i->Ib()); \
\
avx512_write_regw_masked(i, &op, len, BX_READ_32BIT_OPMASK(i->opmask())); \
\
BX_NEXT_INSTR(i); \
}
AVX512_PSHIFT_IMM_WORD_EL(VPSRLW_MASK_UdqIb, xmm_psrlw);
AVX512_PSHIFT_IMM_WORD_EL(VPSRAW_MASK_UdqIb, xmm_psraw);
AVX512_PSHIFT_IMM_WORD_EL(VPSLLW_MASK_UdqIb, xmm_psllw);
#define AVX512_PSHIFT_IMM_DWORD_EL(HANDLER, func) \
/* AVX packed shift with imm8 instruction */ \
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C:: HANDLER (bxInstruction_c *i) \

3
bochs/cpu/cpu.h
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@ -3472,10 +3472,13 @@ public: // for now...
BX_SMF BX_INSF_TYPE VPROLQ_MASK_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VPRORD_MASK_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VPRORQ_MASK_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VPSRLW_MASK_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VPSRLD_MASK_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VPSRLQ_MASK_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VPSRAW_MASK_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VPSRAD_MASK_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VPSRAQ_MASK_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VPSLLW_MASK_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VPSLLD_MASK_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VPSLLQ_MASK_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);

30
bochs/cpu/fetchdecode_evex.h
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@ -684,6 +684,32 @@ static const BxOpcodeInfo_t BxOpcodeGroupEVEX_0f3835_Mask[3] = {
/* ************************************************************************ */
/* ******** */
/* Group 12 */
/* ******** */
static const BxOpcodeInfo_t BxOpcodeInfoEVEX_G12R[8] = {
/* 0 */ { 0, BX_IA_ERROR },
/* 1 */ { 0, BX_IA_ERROR },
/* 2 */ { BxImmediate_Ib | BxPrefixSSE66, BX_IA_V512_VPSRLW_UdqIb },
/* 3 */ { 0, BX_IA_ERROR },
/* 4 */ { BxImmediate_Ib | BxPrefixSSE66, BX_IA_V512_VPSRAW_UdqIb },
/* 5 */ { 0, BX_IA_ERROR },
/* 6 */ { BxImmediate_Ib | BxPrefixSSE66, BX_IA_V512_VPSLLW_UdqIb },
/* 7 */ { 0, BX_IA_ERROR }
};
static const BxOpcodeInfo_t BxOpcodeInfoEVEX_G12R_Mask[8] = {
/* 0 */ { 0, BX_IA_ERROR },
/* 1 */ { 0, BX_IA_ERROR },
/* 2 */ { BxImmediate_Ib | BxPrefixSSE66, BX_IA_V512_VPSRLW_UdqIb_Kmask },
/* 3 */ { 0, BX_IA_ERROR },
/* 4 */ { BxImmediate_Ib | BxPrefixSSE66, BX_IA_V512_VPSRAW_UdqIb_Kmask },
/* 5 */ { 0, BX_IA_ERROR },
/* 6 */ { BxImmediate_Ib | BxPrefixSSE66, BX_IA_V512_VPSLLW_UdqIb_Kmask },
/* 7 */ { 0, BX_IA_ERROR }
};
/* ******** */
/* Group 13 */
/* ******** */
@ -966,8 +992,8 @@ static const BxOpcodeInfo_t BxOpcodeTableEVEX[256*3*2] = {
/* 6F */ { BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupEVEX_0f6f_Mask },
/* 70 k0 */ { BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupEVEX_0f70 },
/* 70 */ { BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupEVEX_0f70_Mask },
/* 71 k0 */ { 0, BX_IA_ERROR },
/* 71 */ { 0, BX_IA_ERROR },
/* 71 k0 */ { BxGroup12, BX_IA_ERROR, BxOpcodeInfoEVEX_G12R },
/* 71 */ { BxGroup12, BX_IA_ERROR, BxOpcodeInfoEVEX_G12R_Mask },
/* 72 k0 */ { BxGroup13, BX_IA_ERROR, BxOpcodeInfoEVEX_G13R },
/* 72 */ { BxGroup13, BX_IA_ERROR, BxOpcodeInfoEVEX_G13R_Mask },
/* 73 k0 */ { BxGroup14, BX_IA_ERROR, BxOpcodeInfoEVEX_G14R },

14
bochs/cpu/ia_opcodes.h
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@ -2739,6 +2739,13 @@ bx_define_opcode(BX_IA_V512_VPSRAW_VdqHdqWdq_Kmask, &BX_CPU_C::LOADU_Wdq, &BX_CP
bx_define_opcode(BX_IA_V512_VPSLLW_VdqHdqWdq, &BX_CPU_C::LOADU_Wdq, &BX_CPU_C::VPSLLW_VdqHdqWdqR, BX_ISA_AVX512_BW, OP_Vdq, OP_Hdq, OP_mVdq128, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VPSLLW_VdqHdqWdq_Kmask, &BX_CPU_C::LOADU_Wdq, &BX_CPU_C::VPSLLW_MASK_VdqHdqWdqR, BX_ISA_AVX512_BW, OP_Vdq, OP_Hdq, OP_mVdq128, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VPSRLW_UdqIb, &BX_CPU_C::LOAD_Vector, &BX_CPU_C::VPSRLW_UdqIb, BX_ISA_AVX512_BW, OP_Hdq, OP_mVdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VPSRLW_UdqIb_Kmask, &BX_CPU_C::LOAD_Vector, &BX_CPU_C::VPSRLW_MASK_UdqIb, BX_ISA_AVX512_BW, OP_Hdq, OP_mVdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VPSLLW_UdqIb, &BX_CPU_C::LOAD_Vector, &BX_CPU_C::VPSLLW_UdqIb, BX_ISA_AVX512_BW, OP_Hdq, OP_mVdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VPSLLW_UdqIb_Kmask, &BX_CPU_C::LOAD_Vector, &BX_CPU_C::VPSLLW_MASK_UdqIb, BX_ISA_AVX512_BW, OP_Hdq, OP_mVdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VPSRAW_UdqIb, &BX_CPU_C::LOAD_Vector, &BX_CPU_C::VPSRAW_UdqIb, BX_ISA_AVX512_BW, OP_Hdq, OP_mVdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VPSRAW_UdqIb_Kmask, &BX_CPU_C::LOAD_Vector, &BX_CPU_C::VPSRAW_MASK_UdqIb, BX_ISA_AVX512_BW, OP_Hdq, OP_mVdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VPSRLD_VdqHdqWdq, &BX_CPU_C::LOADU_Wdq, &BX_CPU_C::VPSRLD_VdqHdqWdqR, BX_ISA_AVX512, OP_Vdq, OP_Hdq, OP_mVdq128, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VPSRLQ_VdqHdqWdq, &BX_CPU_C::LOADU_Wdq, &BX_CPU_C::VPSRLQ_VdqHdqWdqR, BX_ISA_AVX512, OP_Vdq, OP_Hdq, OP_mVdq128, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VPSRLD_VdqHdqWdq_Kmask, &BX_CPU_C::LOADU_Wdq, &BX_CPU_C::VPSRLD_MASK_VdqHdqWdqR, BX_ISA_AVX512, OP_Vdq, OP_Hdq, OP_mVdq128, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
@ -2750,13 +2757,12 @@ bx_define_opcode(BX_IA_V512_VPSLLD_VdqHdqWdq_Kmask, &BX_CPU_C::LOADU_Wdq, &BX_CP
bx_define_opcode(BX_IA_V512_VPSLLQ_VdqHdqWdq_Kmask, &BX_CPU_C::LOADU_Wdq, &BX_CPU_C::VPSLLQ_MASK_VdqHdqWdqR, BX_ISA_AVX512, OP_Vdq, OP_Hdq, OP_mVdq128, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VPSRLD_UdqIb, &BX_CPU_C::LOAD_BROADCAST_VectorD, &BX_CPU_C::VPSRLD_UdqIb, BX_ISA_AVX512, OP_Hdq, OP_mVdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE)
bx_define_opcode(BX_IA_V512_VPSRLQ_UdqIb, &BX_CPU_C::LOAD_BROADCAST_VectorQ, &BX_CPU_C::VPSRLQ_UdqIb, BX_ISA_AVX512, OP_Hdq, OP_mVdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE)
bx_define_opcode(BX_IA_V512_VPSLLD_UdqIb, &BX_CPU_C::LOAD_BROADCAST_VectorD, &BX_CPU_C::VPSLLD_UdqIb, BX_ISA_AVX512, OP_Hdq, OP_mVdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE)
bx_define_opcode(BX_IA_V512_VPSLLQ_UdqIb, &BX_CPU_C::LOAD_BROADCAST_VectorQ, &BX_CPU_C::VPSLLQ_UdqIb, BX_ISA_AVX512, OP_Hdq, OP_mVdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE)
bx_define_opcode(BX_IA_V512_VPSRLD_UdqIb_Kmask, &BX_CPU_C::LOAD_BROADCAST_MASK_VectorD, &BX_CPU_C::VPSRLD_MASK_UdqIb, BX_ISA_AVX512, OP_Hdq, OP_mVdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE)
bx_define_opcode(BX_IA_V512_VPSRLQ_UdqIb, &BX_CPU_C::LOAD_BROADCAST_VectorQ, &BX_CPU_C::VPSRLQ_UdqIb, BX_ISA_AVX512, OP_Hdq, OP_mVdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE)
bx_define_opcode(BX_IA_V512_VPSRLQ_UdqIb_Kmask, &BX_CPU_C::LOAD_BROADCAST_MASK_VectorQ, &BX_CPU_C::VPSRLQ_MASK_UdqIb, BX_ISA_AVX512, OP_Hdq, OP_mVdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE)
bx_define_opcode(BX_IA_V512_VPSLLD_UdqIb, &BX_CPU_C::LOAD_BROADCAST_VectorD, &BX_CPU_C::VPSLLD_UdqIb, BX_ISA_AVX512, OP_Hdq, OP_mVdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE)
bx_define_opcode(BX_IA_V512_VPSLLD_UdqIb_Kmask, &BX_CPU_C::LOAD_BROADCAST_MASK_VectorD, &BX_CPU_C::VPSLLD_MASK_UdqIb, BX_ISA_AVX512, OP_Hdq, OP_mVdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE)
bx_define_opcode(BX_IA_V512_VPSLLQ_UdqIb, &BX_CPU_C::LOAD_BROADCAST_VectorQ, &BX_CPU_C::VPSLLQ_UdqIb, BX_ISA_AVX512, OP_Hdq, OP_mVdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE)
bx_define_opcode(BX_IA_V512_VPSLLQ_UdqIb_Kmask, &BX_CPU_C::LOAD_BROADCAST_MASK_VectorQ, &BX_CPU_C::VPSLLQ_MASK_UdqIb, BX_ISA_AVX512, OP_Hdq, OP_mVdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE)
bx_define_opcode(BX_IA_V512_VPSHUFB_VdqHdqWdq, &BX_CPU_C::LOAD_Vector, &BX_CPU_C::VPSHUFB_VdqHdqWdqR, BX_ISA_AVX512_BW, OP_Vdq, OP_Hdq, OP_mVdq, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)