- implementation of transfer type 0 (verify) - dma write without writing to memory

This commit is contained in:
Volker Ruppert 2001-12-26 14:56:15 +00:00
parent c7b6a1c58b
commit 87e705a553
3 changed files with 40 additions and 28 deletions

View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: dma.cc,v 1.12 2001-12-18 13:12:45 vruppert Exp $
// $Id: dma.cc,v 1.13 2001-12-26 14:56:15 vruppert Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -59,7 +59,7 @@ bx_dma_c::~bx_dma_c(void)
bx_dma_c::init(bx_devices_c *d)
{
unsigned c;
BX_DEBUG(("Init $Id: dma.cc,v 1.12 2001-12-18 13:12:45 vruppert Exp $"));
BX_DEBUG(("Init $Id: dma.cc,v 1.13 2001-12-26 14:56:15 vruppert Exp $"));
BX_DMA_THIS devices = d;
@ -535,18 +535,18 @@ bx_dma_c::DRQ(unsigned channel, Boolean val)
}
#if 0
BX_INFO(("BX_DMA_THIS s.mask[2]: %02x", (unsigned) BX_DMA_THIS s.mask[2]));
BX_INFO(("BX_DMA_THIS s.flip_flop: %u", (unsigned) BX_DMA_THIS s.flip_flop));
BX_INFO(("BX_DMA_THIS s.status_reg: %02x", (unsigned) BX_DMA_THIS s.status_reg));
BX_INFO(("mode_type: %02x", (unsigned) BX_DMA_THIS s.chan[channel].mode.mode_type));
BX_INFO(("address_decrement: %02x", (unsigned) BX_DMA_THIS s.chan[channel].mode.address_decrement));
BX_INFO(("autoinit_enable: %02x", (unsigned) BX_DMA_THIS s.chan[channel].mode.autoinit_enable));
BX_INFO(("transfer_type: %02x", (unsigned) BX_DMA_THIS s.chan[channel].mode.transfer_type));
BX_INFO((".base_address: %04x", (unsigned) BX_DMA_THIS s.chan[channel].base_address));
BX_INFO((".current_address: %04x", (unsigned) BX_DMA_THIS s.chan[channel].current_address));
BX_INFO((".base_count: %04x", (unsigned) BX_DMA_THIS s.chan[channel].base_count));
BX_INFO((".current_count: %04x", (unsigned) BX_DMA_THIS s.chan[channel].current_count));
BX_INFO((".page_reg: %02x", (unsigned) BX_DMA_THIS s.chan[channel].page_reg));
BX_INFO(("mask[%d]: %02x", channel, (unsigned) BX_DMA_THIS s[0].mask[channel]));
BX_INFO(("flip_flop: %u", (unsigned) BX_DMA_THIS s[0].flip_flop));
BX_INFO(("status_reg: %02x", (unsigned) BX_DMA_THIS s[0].status_reg));
BX_INFO(("mode_type: %02x", (unsigned) BX_DMA_THIS s[0].chan[channel].mode.mode_type));
BX_INFO(("address_decrement: %02x", (unsigned) BX_DMA_THIS s[0].chan[channel].mode.address_decrement));
BX_INFO(("autoinit_enable: %02x", (unsigned) BX_DMA_THIS s[0].chan[channel].mode.autoinit_enable));
BX_INFO(("transfer_type: %02x", (unsigned) BX_DMA_THIS s[0].chan[channel].mode.transfer_type));
BX_INFO(("base_address: %04x", (unsigned) BX_DMA_THIS s[0].chan[channel].base_address));
BX_INFO(("current_address: %04x", (unsigned) BX_DMA_THIS s[0].chan[channel].current_address));
BX_INFO(("base_count: %04x", (unsigned) BX_DMA_THIS s[0].chan[channel].base_count));
BX_INFO(("current_count: %04x", (unsigned) BX_DMA_THIS s[0].chan[channel].current_count));
BX_INFO(("page_reg: %02x", (unsigned) BX_DMA_THIS s[0].chan[channel].page_reg));
#endif
BX_DMA_THIS s[ma_sl].status_reg |= (1 << (channel+4));
@ -646,10 +646,10 @@ bx_dma_c::raise_HLDA(bx_pc_system_c *pc_sys)
if (BX_DMA_THIS s[ma_sl].chan[channel].mode.transfer_type == 1) { // write
// xfer from I/O to Memory
if (!ma_sl) {
pc_sys->dma_write8(phy_addr, channel);
pc_sys->dma_write8(phy_addr, channel, 0);
}
else {
pc_sys->dma_write16(phy_addr, channel+4);
pc_sys->dma_write16(phy_addr, channel+4, 0);
}
}
else if (BX_DMA_THIS s[ma_sl].chan[channel].mode.transfer_type == 2) { // read
@ -661,9 +661,17 @@ bx_dma_c::raise_HLDA(bx_pc_system_c *pc_sys)
pc_sys->dma_read16(phy_addr, channel+4);
}
}
else if (BX_DMA_THIS s[ma_sl].chan[channel].mode.transfer_type == 0) {
// verify
if (!ma_sl) {
pc_sys->dma_write8(phy_addr, channel, 1);
}
else {
pc_sys->dma_write16(phy_addr, channel+4, 1);
}
}
else {
BX_PANIC(("hlda: transfer_type of %u not handled",
(unsigned) BX_DMA_THIS s[ma_sl].chan[channel].mode.transfer_type));
BX_PANIC(("hlda: transfer_type 3 is undefined"));
}
if (count_expired) {

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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: pc_system.cc,v 1.16 2001-12-18 13:14:46 vruppert Exp $
// $Id: pc_system.cc,v 1.17 2001-12-26 14:56:15 vruppert Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -128,16 +128,18 @@ bx_pc_system_c::set_DACK(unsigned channel, Boolean val)
void
bx_pc_system_c::dma_write8(Bit32u phy_addr, unsigned channel)
bx_pc_system_c::dma_write8(Bit32u phy_addr, unsigned channel, Boolean verify)
{
// DMA controlled xfer of byte from I/O to Memory
Bit8u data_byte;
bx_devices.dma_write8(channel, &data_byte);
BX_MEM(0)->write_physical(BX_CPU(0), phy_addr, 1, &data_byte);
if (!verify) {
BX_MEM(0)->write_physical(BX_CPU(0), phy_addr, 1, &data_byte);
BX_DBG_DMA_REPORT(phy_addr, 1, BX_WRITE, data_byte);
BX_DBG_DMA_REPORT(phy_addr, 1, BX_WRITE, data_byte);
}
}
@ -156,16 +158,18 @@ bx_pc_system_c::dma_read8(Bit32u phy_addr, unsigned channel)
void
bx_pc_system_c::dma_write16(Bit32u phy_addr, unsigned channel)
bx_pc_system_c::dma_write16(Bit32u phy_addr, unsigned channel, Boolean verify)
{
// DMA controlled xfer of word from I/O to Memory
Bit16u data_word;
bx_devices.dma_write16(channel, &data_word);
BX_MEM(0)->write_physical(BX_CPU(0), phy_addr, 2, &data_word);
if (!verify) {
BX_MEM(0)->write_physical(BX_CPU(0), phy_addr, 2, &data_word);
BX_DBG_DMA_REPORT(phy_addr, 2, BX_WRITE, data_word);
BX_DBG_DMA_REPORT(phy_addr, 2, BX_WRITE, data_word);
}
}

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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: pc_system.h,v 1.9 2001-12-18 13:14:46 vruppert Exp $
// $Id: pc_system.h,v 1.10 2001-12-26 14:56:15 vruppert Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -160,9 +160,9 @@ public:
Bit64u time_usec();
Bit64u time_ticks();
void dma_write8(Bit32u phy_addr, unsigned channel);
void dma_write8(Bit32u phy_addr, unsigned channel, Boolean verify);
void dma_read8(Bit32u phy_addr, unsigned channel);
void dma_write16(Bit32u phy_addr, unsigned channel);
void dma_write16(Bit32u phy_addr, unsigned channel, Boolean verify);
void dma_read16(Bit32u phy_addr, unsigned channel);
Bit32u inp(Bit16u addr, unsigned io_len);