diff --git a/bochs/cpu/cpu.h b/bochs/cpu/cpu.h
index 972f211bc..4e2269c38 100644
--- a/bochs/cpu/cpu.h
+++ b/bochs/cpu/cpu.h
@@ -2114,7 +2114,6 @@ public: // for now...
   BX_SMF void PAVGB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
   BX_SMF void PAVGW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
   BX_SMF void PMULHUW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
-  BX_SMF void MOVNTQ_MqPq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
   BX_SMF void PMINSW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
   BX_SMF void PMAXSW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
   BX_SMF void PSADBW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
diff --git a/bochs/cpu/ia_opcodes.h b/bochs/cpu/ia_opcodes.h
index 09be00bb6..d0ec69632 100644
--- a/bochs/cpu/ia_opcodes.h
+++ b/bochs/cpu/ia_opcodes.h
@@ -831,7 +831,7 @@ bx_define_opcode(BX_IA_PMAXUB_PqQq, &BX_CPU_C::PMAXUB_PqQq, &BX_CPU_C::PMAXUB_Pq
 bx_define_opcode(BX_IA_PAVGB_PqQq, &BX_CPU_C::PAVGB_PqQq, &BX_CPU_C::PAVGB_PqQq, BX_CPU_SSE, 0)
 bx_define_opcode(BX_IA_PAVGW_PqQq, &BX_CPU_C::PAVGW_PqQq, &BX_CPU_C::PAVGW_PqQq, BX_CPU_SSE, 0)
 bx_define_opcode(BX_IA_PMULHUW_PqQq, &BX_CPU_C::PMULHUW_PqQq, &BX_CPU_C::PMULHUW_PqQq, BX_CPU_SSE | BX_CPU_3DNOW, 0)
-bx_define_opcode(BX_IA_MOVNTQ_MqPq, &BX_CPU_C::MOVNTQ_MqPq, &BX_CPU_C::BxError, BX_CPU_SSE | BX_CPU_3DNOW, 0)
+bx_define_opcode(BX_IA_MOVNTQ_MqPq, &BX_CPU_C::MOVQ_QqPqM, &BX_CPU_C::BxError, BX_CPU_SSE | BX_CPU_3DNOW, 0)
 bx_define_opcode(BX_IA_PMINSW_PqQq, &BX_CPU_C::PMINSW_PqQq, &BX_CPU_C::PMINSW_PqQq, BX_CPU_SSE | BX_CPU_3DNOW, 0)
 bx_define_opcode(BX_IA_PMAXSW_PqQq, &BX_CPU_C::PMAXSW_PqQq, &BX_CPU_C::PMAXSW_PqQq, BX_CPU_SSE, 0)
 bx_define_opcode(BX_IA_PSADBW_PqQq, &BX_CPU_C::PSADBW_PqQq, &BX_CPU_C::PSADBW_PqQq, BX_CPU_SSE | BX_CPU_3DNOW, 0)
diff --git a/bochs/cpu/mmx.cc b/bochs/cpu/mmx.cc
index 44c732303..fdeb5e28d 100644
--- a/bochs/cpu/mmx.cc
+++ b/bochs/cpu/mmx.cc
@@ -1086,8 +1086,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVQ_EqPqR(bxInstruction_c *i)
   BX_CPU_THIS_PTR prepareMMX();
   BX_CPU_THIS_PTR prepareFPU2MMX();
 
-  BxPackedMmxRegister op = BX_READ_MMX_REG(i->nnn());
-  BX_WRITE_64BIT_REG(i->rm(), MMXUQ(op));
+  BX_WRITE_64BIT_REG(i->rm(), BX_MMX_REG(i->nnn()));
 }
 
 #endif
@@ -1103,16 +1102,16 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVQ_QqPqR(bxInstruction_c *i)
 #endif
 }
 
+/* 0F 7F - MOVQ_QqPqM  */
+/* 0F E7 - MOVNTQ_MqPq */
 void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVQ_QqPqM(bxInstruction_c *i)
 {
 #if BX_CPU_LEVEL >= 5
   BX_CPU_THIS_PTR prepareMMX();
 
-  BxPackedMmxRegister op = BX_READ_MMX_REG(i->nnn());
-
   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
   /* pointer, segment address pair */
-  write_virtual_qword(i->seg(), eaddr, MMXUQ(op));
+  write_virtual_qword(i->seg(), eaddr, BX_MMX_REG(i->nnn()));
 
   // do not cause FPU2MMX transition if memory write faults
   BX_CPU_THIS_PTR prepareFPU2MMX();
@@ -1797,21 +1796,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::PMULHW_PqQq(bxInstruction_c *i)
 #endif
 }
 
-/* 0F E7 */
-void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVNTQ_MqPq(bxInstruction_c *i)
-{
-#if BX_CPU_LEVEL >= 5
-  BX_CPU_THIS_PTR prepareMMX();
-
-  BxPackedMmxRegister reg = BX_READ_MMX_REG(i->nnn());
-  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
-  write_virtual_qword(i->seg(), eaddr, MMXUQ(reg));
-
-  // do not cause FPU2MMX transition if memory write faults
-  BX_CPU_THIS_PTR prepareFPU2MMX();
-#endif
-}
-
 /* 0F E8 */
 void BX_CPP_AttrRegparmN(1) BX_CPU_C::PSUBSB_PqQq(bxInstruction_c *i)
 {