Set VMX and LOCK bit in IA32_FEATURE_CONTROL.
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@ -2,7 +2,7 @@
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2006-2018 Volker Ruppert
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// Copyright (C) 2006-2020 The Bochs Project
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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@ -174,6 +174,11 @@
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#define CPUID_APIC (1 << 9)
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#define CPUID_MTRR (1 << 12)
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#define CPUID_EXT_VMX (1 << 5)
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#define MSR_FEATURE_CTRL 0x03a
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#define FEATURE_CTRL_LOCK 0x1
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#define FEATURE_CTRL_VMX 0x4
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#define APIC_BASE ((uint8_t *)0xfee00000)
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#define APIC_ICR_LOW 0x300
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#define APIC_SVR 0x0F0
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@ -4,7 +4,7 @@
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//
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// 32 bit Bochs BIOS init code
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// Copyright (C) 2006 Fabrice Bellard
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// Copyright (C) 2001-2019 The Bochs Project
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// Copyright (C) 2001-2020 The Bochs Project
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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@ -574,6 +574,7 @@ extern uint8_t smp_ap_boot_code_end;
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void smp_probe(void)
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{
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uint32_t val, sipi_vector;
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uint64_t val64;
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writew(&smp_cpus, 1);
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if (cpuid_features & CPUID_APIC) {
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@ -598,6 +599,12 @@ void smp_probe(void)
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while (cmos_readb(0x5f) + 1 != readw(&smp_cpus))
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;
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#endif
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/* enable VMX for CPU #0 in IA32_FEATURE_CONTROL */
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if ((cpuid_ext_features & CPUID_EXT_VMX) > 0) {
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val64 = rdmsr(MSR_FEATURE_CTRL);
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val64 |= (FEATURE_CTRL_LOCK | FEATURE_CTRL_VMX);
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wrmsr(MSR_FEATURE_CTRL, val64);
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}
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}
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BX_INFO("Found %d cpu(s)\n", readw(&smp_cpus));
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}
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@ -4,6 +4,7 @@
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//
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// 32 bit Bochs BIOS init code
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// Copyright (C) 2006 Fabrice Bellard
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// Copyright (C) 2020 The Bochs Project
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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@ -62,6 +63,15 @@ smp_ap_boot_code_start:
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add $12, %ebx
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jmp 11b
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12:
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mov $1, %eax
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cpuid
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and $CPUID_EXT_VMX, %ecx
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jz 13f
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mov $MSR_FEATURE_CTRL, %ecx
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rdmsr
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or $FEATURE_CTRL_LOCK | FEATURE_CTRL_VMX, %eax
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wrmsr
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13:
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lock incw smp_cpus
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1:
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