* Fixed behavior of BX_INSTR_MEM_DATA callback for RMW memory accesses
See instrumentation.txt for details
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: access.cc,v 1.37 2003-02-28 02:37:17 ptrumpet Exp $
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// $Id: access.cc,v 1.38 2003-02-28 20:50:54 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -654,7 +654,7 @@ BX_CPU_C::read_RMW_virtual_byte(unsigned s, bx_address offset, Bit8u *data)
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unsigned pl;
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accessOK:
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laddr = seg->cache.u.segment.base + offset;
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BX_INSTR_MEM_DATA(BX_CPU_ID, laddr, 1, BX_READ);
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BX_INSTR_MEM_DATA(BX_CPU_ID, laddr, 1, BX_RW);
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pl = (CPL==3);
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#if BX_SupportGuest2HostTLB
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@ -723,7 +723,7 @@ BX_CPU_C::read_RMW_virtual_word(unsigned s, bx_address offset, Bit16u *data)
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unsigned pl;
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accessOK:
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laddr = seg->cache.u.segment.base + offset;
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BX_INSTR_MEM_DATA(BX_CPU_ID, laddr, 2, BX_READ);
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BX_INSTR_MEM_DATA(BX_CPU_ID, laddr, 2, BX_RW);
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pl = (CPL==3);
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#if BX_SupportGuest2HostTLB
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@ -791,7 +791,7 @@ BX_CPU_C::read_RMW_virtual_dword(unsigned s, bx_address offset, Bit32u *data)
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unsigned pl;
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accessOK:
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laddr = seg->cache.u.segment.base + offset;
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BX_INSTR_MEM_DATA(BX_CPU_ID, laddr, 4, BX_READ);
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BX_INSTR_MEM_DATA(BX_CPU_ID, laddr, 4, BX_RW);
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pl = (CPL==3);
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#if BX_SupportGuest2HostTLB
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@ -850,8 +850,6 @@ accessOK:
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void
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BX_CPU_C::write_RMW_virtual_byte(Bit8u val8)
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{
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BX_INSTR_MEM_DATA(BX_CPU_ID, BX_CPU_THIS_PTR address_xlation.paddress1, 1, BX_WRITE);
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if (BX_CPU_THIS_PTR address_xlation.pages > 2) {
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// Pages > 2 means it stores a host address for direct access.
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Bit8u * hostAddr = (Bit8u *) BX_CPU_THIS_PTR address_xlation.pages;
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@ -867,8 +865,6 @@ BX_CPU_C::write_RMW_virtual_byte(Bit8u val8)
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void
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BX_CPU_C::write_RMW_virtual_word(Bit16u val16)
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{
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BX_INSTR_MEM_DATA(BX_CPU_ID, BX_CPU_THIS_PTR address_xlation.paddress1, 2, BX_WRITE);
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if (BX_CPU_THIS_PTR address_xlation.pages > 2) {
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// Pages > 2 means it stores a host address for direct access.
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Bit16u *hostAddr = (Bit16u *) BX_CPU_THIS_PTR address_xlation.pages;
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@ -896,8 +892,6 @@ BX_CPU_C::write_RMW_virtual_word(Bit16u val16)
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void
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BX_CPU_C::write_RMW_virtual_dword(Bit32u val32)
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{
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BX_INSTR_MEM_DATA(BX_CPU_ID, BX_CPU_THIS_PTR address_xlation.paddress1, 4, BX_WRITE);
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if (BX_CPU_THIS_PTR address_xlation.pages > 2) {
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// Pages > 2 means it stores a host address for direct access.
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Bit32u *hostAddr = (Bit32u *) BX_CPU_THIS_PTR address_xlation.pages;
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@ -1055,8 +1049,6 @@ accessOK:
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void
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BX_CPU_C::write_RMW_virtual_qword(Bit64u val64)
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{
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BX_INSTR_MEM_DATA(BX_CPU_ID, BX_CPU_THIS_PTR address_xlation.paddress1, 8, BX_WRITE);
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if (BX_CPU_THIS_PTR address_xlation.pages > 2) {
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// Pages > 2 means it stores a host address for direct access.
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Bit64u *hostAddr = (Bit64u *) BX_CPU_THIS_PTR address_xlation.pages;
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@ -1101,7 +1093,7 @@ BX_CPU_C::read_RMW_virtual_qword(unsigned s, bx_address offset, Bit64u *data)
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unsigned pl;
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accessOK:
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laddr = seg->cache.u.segment.base + offset;
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BX_INSTR_MEM_DATA(BX_CPU_ID, laddr, 8, BX_READ);
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BX_INSTR_MEM_DATA(BX_CPU_ID, laddr, 8, BX_RW);
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pl = (CPL==3);
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#if BX_SupportGuest2HostTLB
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: instrument.cc,v 1.9 2003-02-13 15:04:09 sshwarts Exp $
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// $Id: instrument.cc,v 1.10 2003-02-28 20:51:07 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -50,7 +50,7 @@ static struct instruction_t {
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struct {
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bx_address laddr; // linear address
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bx_address paddr; // physical address
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unsigned op; // BX_READ or BX_WRITE
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unsigned op; // BX_READ, BX_WRITE or BX_RW
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unsigned size; // 1 .. 8
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} data_access[MAX_DATA_ACCESSES];
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bx_bool is_branch;
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: instrument.h,v 1.7 2003-02-13 15:04:10 sshwarts Exp $
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// $Id: instrument.h,v 1.8 2003-02-28 20:51:08 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -75,7 +75,7 @@ public:
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struct {
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bx_address laddr; // linear address
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bx_address paddr; // physical address
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unsigned op; // BX_READ or BX_WRITE
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unsigned op; // BX_READ, BX_WRITE or BX_RW
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unsigned size; // 1 .. 8
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} data_access[MAX_DATA_ACCESSES];
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@ -157,6 +157,13 @@ The callback is called each time, when Bochs simulator starts a new repeat
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iteration.
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void bx_instr_mem_code(unsigned cpu, bx_address linear, unsigned len);
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void bx_instr_mem_data(unsigned cpu, bx_address linear, unsigned len, unsigned rw);
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The callback is called each time, when Bochs simulator executes code or data
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memory access. Possible access types are: BX_READ, BX_WRITE and BX_RW.
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void bx_instr_lin_read(unsigned cpu, bx_address lin, bx_address phy, unsigned len);
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void bx_instr_lin_write(unsigned cpu, bx_address lin, bx_address phy, unsigned len);
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@ -185,11 +192,9 @@ These callback functions are a feedback from various system devices.
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-----------------------------------------------------------------------------
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Known problems:
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1. BX_INSTR_MEM_DATA callback doesn't work for RMW requests
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(substitutes physical address instead of linear).
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2. BX_INSTR_MEM_CODE never called from Bochs's code.
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3. BX_INSTR_LIN_READ doesn't work when Guest-To-Host-TLB feature is enabled.
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4. BX_INSTR_LIN_WRITE doesn't work when Guest-To-Host-TLB feature is enabled.
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1. BX_INSTR_MEM_CODE never called from Bochs's code.
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2. BX_INSTR_LIN_READ doesn't work when Guest-To-Host-TLB feature is enabled.
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3. BX_INSTR_LIN_WRITE doesn't work when Guest-To-Host-TLB feature is enabled.
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Feature requests:
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