From 838fb2a04826eb9112584bea63dfcf4959c3f7b7 Mon Sep 17 00:00:00 2001 From: Stanislav Shwartsman Date: Sun, 23 Dec 2007 17:21:28 +0000 Subject: [PATCH] Fixing V2008 warnings - they found a bug in sse_pfp.cc ! --- bochs/config.cc | 4 +-- bochs/cpu/arith16.cc | 6 ++-- bochs/cpu/arith32.cc | 6 ++-- bochs/cpu/arith64.cc | 6 ++-- bochs/cpu/bit16.cc | 5 +-- bochs/cpu/bit32.cc | 5 +-- bochs/cpu/bit64.cc | 4 +-- bochs/cpu/cpu.cc | 6 ++-- bochs/cpu/iret.cc | 9 ++--- bochs/cpu/mmx.cc | 10 +++--- bochs/cpu/mult64.cc | 4 +-- bochs/cpu/paging.cc | 56 ++++++++++++++++--------------- bochs/cpu/proc_ctrl.cc | 34 ++++++------------- bochs/cpu/protect_ctrl.cc | 6 ++-- bochs/cpu/sse_pfp.cc | 6 ++-- bochs/cpu/tasking.cc | 10 +++--- bochs/cpu/vm8086.cc | 5 +-- bochs/fpu/fpu.cc | 6 ++-- bochs/fpu/softfloat-round-pack.cc | 2 +- bochs/fpu/softfloat.cc | 10 +++--- bochs/memory/misc_mem.cc | 6 ++-- 21 files changed, 97 insertions(+), 109 deletions(-) diff --git a/bochs/config.cc b/bochs/config.cc index 5b8515c8b..16eb36341 100755 --- a/bochs/config.cc +++ b/bochs/config.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: config.cc,v 1.125 2007-12-06 22:21:40 sshwarts Exp $ +// $Id: config.cc,v 1.126 2007-12-23 17:21:27 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2002 MandrakeSoft S.A. @@ -1736,7 +1736,7 @@ static int parse_bochsrc(const char *rcfile) do { ret = fgets(line, sizeof(line)-1, fd); line[sizeof(line) - 1] = '\0'; - int len = strlen(line); + size_t len = strlen(line); if ((len>0) && (line[len-1] < ' ')) line[len-1] = '\0'; if ((ret != NULL) && strlen(line)) { diff --git a/bochs/cpu/arith16.cc b/bochs/cpu/arith16.cc index 519a5a6e5..1de908a3b 100644 --- a/bochs/cpu/arith16.cc +++ b/bochs/cpu/arith16.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: arith16.cc,v 1.60 2007-12-20 20:58:37 sshwarts Exp $ +// $Id: arith16.cc,v 1.61 2007-12-23 17:21:27 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -538,7 +538,7 @@ void BX_CPU_C::NEG_EwM(bxInstruction_c *i) Bit16u op1_16; op1_16 = read_RMW_virtual_word(i->seg(), RMAddr(i)); - op1_16 = -op1_16; + op1_16 = (Bit16u) -op1_16; write_RMW_virtual_word(op1_16); SET_FLAGS_OSZAPC_RESULT_16(op1_16, BX_INSTR_NEG16); @@ -547,7 +547,7 @@ void BX_CPU_C::NEG_EwM(bxInstruction_c *i) void BX_CPU_C::NEG_EwR(bxInstruction_c *i) { Bit16u op1_16 = BX_READ_16BIT_REG(i->rm()); - op1_16 = -op1_16; + op1_16 = (Bit16u) -op1_16; BX_WRITE_16BIT_REG(i->rm(), op1_16); SET_FLAGS_OSZAPC_RESULT_16(op1_16, BX_INSTR_NEG16); diff --git a/bochs/cpu/arith32.cc b/bochs/cpu/arith32.cc index 587af11c1..09f14f427 100644 --- a/bochs/cpu/arith32.cc +++ b/bochs/cpu/arith32.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: arith32.cc,v 1.69 2007-12-20 20:58:37 sshwarts Exp $ +// $Id: arith32.cc,v 1.70 2007-12-23 17:21:27 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -592,7 +592,7 @@ void BX_CPU_C::NEG_EdM(bxInstruction_c *i) Bit32u op1_32; op1_32 = read_RMW_virtual_dword(i->seg(), RMAddr(i)); - op1_32 = -op1_32; + op1_32 = (Bit32u) -op1_32; write_RMW_virtual_dword(op1_32); SET_FLAGS_OSZAPC_RESULT_32(op1_32, BX_INSTR_NEG32); @@ -601,7 +601,7 @@ void BX_CPU_C::NEG_EdM(bxInstruction_c *i) void BX_CPU_C::NEG_EdR(bxInstruction_c *i) { Bit32u op1_32 = BX_READ_32BIT_REG(i->rm()); - op1_32 = -op1_32; + op1_32 = (Bit32u) -op1_32; BX_WRITE_32BIT_REGZ(i->rm(), op1_32); SET_FLAGS_OSZAPC_RESULT_32(op1_32, BX_INSTR_NEG32); diff --git a/bochs/cpu/arith64.cc b/bochs/cpu/arith64.cc index 90e2a8685..b16364732 100644 --- a/bochs/cpu/arith64.cc +++ b/bochs/cpu/arith64.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: arith64.cc,v 1.45 2007-12-20 20:58:37 sshwarts Exp $ +// $Id: arith64.cc,v 1.46 2007-12-23 17:21:27 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -571,7 +571,7 @@ void BX_CPU_C::NEG_EqM(bxInstruction_c *i) /* pointer, segment address pair */ op1_64 = read_RMW_virtual_qword(i->seg(), RMAddr(i)); - op1_64 = -op1_64; + op1_64 = (Bit64u) -op1_64; write_RMW_virtual_qword(op1_64); SET_FLAGS_OSZAPC_RESULT_64(op1_64, BX_INSTR_NEG64); @@ -580,7 +580,7 @@ void BX_CPU_C::NEG_EqM(bxInstruction_c *i) void BX_CPU_C::NEG_EqR(bxInstruction_c *i) { Bit64u op1_64 = BX_READ_64BIT_REG(i->rm()); - op1_64 = -op1_64; + op1_64 = (Bit64u) -op1_64; BX_WRITE_64BIT_REG(i->rm(), op1_64); SET_FLAGS_OSZAPC_RESULT_64(op1_64, BX_INSTR_NEG64); diff --git a/bochs/cpu/bit16.cc b/bochs/cpu/bit16.cc index b807730ec..79489177f 100755 --- a/bochs/cpu/bit16.cc +++ b/bochs/cpu/bit16.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: bit16.cc,v 1.2 2007-12-20 20:58:37 sshwarts Exp $ +// $Id: bit16.cc,v 1.3 2007-12-23 17:21:27 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -126,8 +126,9 @@ void BX_CPU_C::BT_EwGwR(bxInstruction_c *i) void BX_CPU_C::BTS_EwGwM(bxInstruction_c *i) { bx_address op1_addr; - Bit16u op1_16, op2_16, bit_i, index; + Bit16u op1_16, op2_16, index; Bit32s displacement32; + bx_bool bit_i; op2_16 = BX_READ_16BIT_REG(i->nnn()); index = op2_16 & 0x0f; diff --git a/bochs/cpu/bit32.cc b/bochs/cpu/bit32.cc index 487ce797f..725fb681c 100755 --- a/bochs/cpu/bit32.cc +++ b/bochs/cpu/bit32.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: bit32.cc,v 1.2 2007-12-20 20:58:37 sshwarts Exp $ +// $Id: bit32.cc,v 1.3 2007-12-23 17:21:27 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -130,8 +130,9 @@ void BX_CPU_C::BT_EdGdR(bxInstruction_c *i) void BX_CPU_C::BTS_EdGdM(bxInstruction_c *i) { bx_address op1_addr; - Bit32u op1_32, op2_32, bit_i, index; + Bit32u op1_32, op2_32, index; Bit32s displacement32; + bx_bool bit_i; op2_32 = BX_READ_32BIT_REG(i->nnn()); diff --git a/bochs/cpu/bit64.cc b/bochs/cpu/bit64.cc index a90bd6d61..0adab1690 100755 --- a/bochs/cpu/bit64.cc +++ b/bochs/cpu/bit64.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: bit64.cc,v 1.2 2007-12-20 20:58:37 sshwarts Exp $ +// $Id: bit64.cc,v 1.3 2007-12-23 17:21:27 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -130,7 +130,7 @@ void BX_CPU_C::BTS_EqGqM(bxInstruction_c *i) bx_address op1_addr; Bit64u op1_64, op2_64, index; Bit64s displacement64; - Bit64u bit_i; + bx_bool bit_i; op2_64 = BX_READ_64BIT_REG(i->nnn()); index = op2_64 & 0x3f; diff --git a/bochs/cpu/cpu.cc b/bochs/cpu/cpu.cc index ead5e3c30..7d2c527cd 100644 --- a/bochs/cpu/cpu.cc +++ b/bochs/cpu/cpu.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: cpu.cc,v 1.193 2007-12-22 17:17:40 sshwarts Exp $ +// $Id: cpu.cc,v 1.194 2007-12-23 17:21:27 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -102,7 +102,7 @@ static Bit32u iCacheTraceLengh[BX_MAX_TRACE_LENGTH]; bxICacheEntry_c* BX_CPU_C::fetchInstructionTrace(bxInstruction_c *iStorage, bx_address eipBiased) { - bx_phy_address pAddr = BX_CPU_THIS_PTR pAddrA20Page + eipBiased; + bx_phy_address pAddr = (bx_phy_address)(BX_CPU_THIS_PTR pAddrA20Page + eipBiased); unsigned iCacheHash = BX_CPU_THIS_PTR iCache.hash(pAddr); bxICacheEntry_c *trace = &(BX_CPU_THIS_PTR iCache.entry[iCacheHash]); Bit32u pageWriteStamp = *(BX_CPU_THIS_PTR currPageWriteStampPtr); @@ -839,7 +839,7 @@ void BX_CPU_C::prefetch(void) // Calculate RIP at the beginning of the page. bx_address eipPageOffset0 = RIP - (laddr & 0xfff); - BX_CPU_THIS_PTR eipPageBias = -eipPageOffset0; + BX_CPU_THIS_PTR eipPageBias = (bx_address) -eipPageOffset0; BX_CPU_THIS_PTR eipPageWindowSize = 4096; if (! Is64BitMode()) { diff --git a/bochs/cpu/iret.cc b/bochs/cpu/iret.cc index dbb2347bb..5ea8f9cd9 100755 --- a/bochs/cpu/iret.cc +++ b/bochs/cpu/iret.cc @@ -1,5 +1,5 @@ //////////////////////////////////////////////////////////////////////// -// $Id: iret.cc,v 1.24 2007-12-20 20:58:37 sshwarts Exp $ +// $Id: iret.cc,v 1.25 2007-12-23 17:21:27 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (c) 2005 Stanislav Shwartsman @@ -60,7 +60,7 @@ BX_CPU_C::iret_protected(bxInstruction_c *i) if (BX_CPU_THIS_PTR tr.cache.valid==0) BX_PANIC(("IRET: TR not valid")); - Bit32u base32 = BX_CPU_THIS_PTR tr.cache.u.system.base; + Bit32u base32 = (Bit32u) BX_CPU_THIS_PTR tr.cache.u.system.base; // examine back link selector in TSS addressed by current TR: access_linear(base32, 2, 0, BX_READ, &raw_link_selector); @@ -377,13 +377,10 @@ BX_CPU_C::long_iret(bxInstruction_c *i) unsigned top_nbytes_same = 0; /* stop compiler warnings */ if (i->os64L()) { - Bit64u new_rflags = 0; - raw_cs_selector = read_virtual_word (BX_SEG_REG_SS, temp_RSP + 8); new_rip = read_virtual_qword(BX_SEG_REG_SS, temp_RSP + 0); - new_rflags = read_virtual_qword(BX_SEG_REG_SS, temp_RSP + 16); + new_eflags = (Bit32u) read_virtual_qword(BX_SEG_REG_SS, temp_RSP + 16); - new_eflags = (Bit32u) new_rflags; top_nbytes_outer = 40; ss_offset = 32; } diff --git a/bochs/cpu/mmx.cc b/bochs/cpu/mmx.cc index e8255105a..044bf8bad 100644 --- a/bochs/cpu/mmx.cc +++ b/bochs/cpu/mmx.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: mmx.cc,v 1.68 2007-12-20 20:58:37 sshwarts Exp $ +// $Id: mmx.cc,v 1.69 2007-12-23 17:21:27 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (c) 2002 Stanislav Shwartsman @@ -40,7 +40,7 @@ Bit8s BX_CPP_AttrRegparmN(1) SaturateWordSToByteS(Bit16s value) */ if(value < -128) return -128; if(value > 127) return 127; - return value; + return (Bit8s) value; } Bit16s BX_CPP_AttrRegparmN(1) SaturateDwordSToWordS(Bit32s value) @@ -54,7 +54,7 @@ Bit16s BX_CPP_AttrRegparmN(1) SaturateDwordSToWordS(Bit32s value) */ if(value < -32768) return -32768; if(value > 32767) return 32767; - return value; + return (Bit16s) value; } Bit8u BX_CPP_AttrRegparmN(1) SaturateWordSToByteU(Bit16s value) @@ -67,7 +67,7 @@ Bit8u BX_CPP_AttrRegparmN(1) SaturateWordSToByteU(Bit16s value) */ if(value < 0) return 0; if(value > 255) return 255; - return value; + return (Bit8u) value; } Bit16u BX_CPP_AttrRegparmN(1) SaturateDwordSToWordU(Bit32s value) @@ -81,7 +81,7 @@ Bit16u BX_CPP_AttrRegparmN(1) SaturateDwordSToWordU(Bit32s value) */ if(value < 0) return 0; if(value > 65535) return 65535; - return value; + return (Bit16u) value; } void BX_CPU_C::print_state_MMX(void) diff --git a/bochs/cpu/mult64.cc b/bochs/cpu/mult64.cc index 9dc160d42..9a3ee1932 100644 --- a/bochs/cpu/mult64.cc +++ b/bochs/cpu/mult64.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: mult64.cc,v 1.22 2007-12-20 20:58:37 sshwarts Exp $ +// $Id: mult64.cc,v 1.23 2007-12-23 17:21:27 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -74,7 +74,7 @@ void long_mul(Bit128u *product, Bit64u op1, Bit64u op2) void long_neg(Bit128s *n) { Bit64u t = n->lo; - n->lo = -n->lo; + n->lo = (Bit64u) -n->lo; if (t - 1 > t) --n->hi; n->hi = ~n->hi; } diff --git a/bochs/cpu/paging.cc b/bochs/cpu/paging.cc index 2355825ba..34724266b 100644 --- a/bochs/cpu/paging.cc +++ b/bochs/cpu/paging.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: paging.cc,v 1.101 2007-12-21 10:33:39 sshwarts Exp $ +// $Id: paging.cc,v 1.102 2007-12-23 17:21:27 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -671,8 +671,8 @@ bx_phy_address BX_CPU_C::translate_linear(bx_address laddr, unsigned curr_pl, un if (long_mode()) { // Get PML4 entry - bx_phy_address pml4_addr = BX_CPU_THIS_PTR cr3_masked | - ((laddr & BX_CONST64(0x0000ff8000000000)) >> 36); + bx_phy_address pml4_addr = (bx_phy_address)(BX_CPU_THIS_PTR cr3_masked | + ((laddr & BX_CONST64(0x0000ff8000000000)) >> 36)); BX_CPU_THIS_PTR mem->readPhysicalPage(BX_CPU_THIS, pml4_addr, 8, &pml4); if (!(pml4 & 0x01)) { @@ -702,13 +702,13 @@ bx_phy_address BX_CPU_C::translate_linear(bx_address laddr, unsigned curr_pl, un BX_CPU_THIS_PTR mem->writePhysicalPage(BX_CPU_THIS, pml4_addr, 8, &pml4); } - pdpe_addr = (pml4 & BX_CONST64(0x000ffffffffff000)) | - ((laddr & BX_CONST64(0x0000007fc0000000)) >> 27); + pdpe_addr = (bx_phy_address)((pml4 & BX_CONST64(0x000ffffffffff000)) | + ((laddr & BX_CONST64(0x0000007fc0000000)) >> 27)); } else #endif { - pdpe_addr = BX_CPU_THIS_PTR cr3_masked | ((laddr & 0xc0000000) >> 27); + pdpe_addr = (bx_phy_address) (BX_CPU_THIS_PTR cr3_masked | ((laddr & 0xc0000000) >> 27)); } BX_CPU_THIS_PTR mem->readPhysicalPage(BX_CPU_THIS, pdpe_addr, 8, &pdpe); @@ -737,8 +737,8 @@ bx_phy_address BX_CPU_C::translate_linear(bx_address laddr, unsigned curr_pl, un BX_PANIC(("PAE PDPE: Only 32 bit physical address space is emulated !")); } - bx_phy_address pde_addr = (pdpe & BX_CONST64(0x000ffffffffff000)) - | ((laddr & 0x3fe00000) >> 18); + bx_phy_address pde_addr = (bx_phy_address)((pdpe & BX_CONST64(0x000ffffffffff000)) + | ((laddr & 0x3fe00000) >> 18)); BX_CPU_THIS_PTR mem->readPhysicalPage(BX_CPU_THIS, pde_addr, 8, &pde); @@ -773,7 +773,7 @@ bx_phy_address BX_CPU_C::translate_linear(bx_address laddr, unsigned curr_pl, un #endif // Make up the physical page frame address. - ppf = (pde & BX_CONST64(0x000fffffffe00000)) | (laddr & 0x001ff000); + ppf = (bx_phy_address)((pde & BX_CONST64(0x000fffffffe00000)) | (laddr & 0x001ff000)); #if BX_SUPPORT_GLOBAL_PAGES if (BX_CPU_THIS_PTR cr4.get_PGE()) @@ -805,8 +805,8 @@ bx_phy_address BX_CPU_C::translate_linear(bx_address laddr, unsigned curr_pl, un } else { // 4k pages, Get page table entry - bx_phy_address pte_addr = (pde & BX_CONST64(0x000ffffffffff000)) | - ((laddr & 0x001ff000) >> 9); + bx_phy_address pte_addr = (bx_phy_address)((pde & BX_CONST64(0x000ffffffffff000)) | + ((laddr & 0x001ff000) >> 9)); BX_CPU_THIS_PTR mem->readPhysicalPage(BX_CPU_THIS, pte_addr, 8, &pte); @@ -838,7 +838,7 @@ bx_phy_address BX_CPU_C::translate_linear(bx_address laddr, unsigned curr_pl, un #endif // Make up the physical page frame address. - ppf = pte & BX_CONST64(0x000ffffffffff000); + ppf = (bx_phy_address)(pte & BX_CONST64(0x000ffffffffff000)); #if BX_SUPPORT_GLOBAL_PAGES if (BX_CPU_THIS_PTR cr4.get_PGE()) @@ -881,7 +881,8 @@ bx_phy_address BX_CPU_C::translate_linear(bx_address laddr, unsigned curr_pl, un // CR4.PAE==0 (and EFER.LMA==0) Bit32u pde, pte; - bx_phy_address pde_addr = BX_CPU_THIS_PTR cr3_masked | ((laddr & 0xffc00000) >> 20); + bx_phy_address pde_addr = (bx_phy_address) (BX_CPU_THIS_PTR cr3_masked | + ((laddr & 0xffc00000) >> 20)); BX_CPU_THIS_PTR mem->readPhysicalPage(BX_CPU_THIS, pde_addr, 4, &pde); @@ -927,7 +928,7 @@ bx_phy_address BX_CPU_C::translate_linear(bx_address laddr, unsigned curr_pl, un #endif { // Get page table entry - bx_phy_address pte_addr = (pde & 0xfffff000) | ((laddr & 0x003ff000) >> 10); + bx_phy_address pte_addr = (bx_phy_address)((pde & 0xfffff000) | ((laddr & 0x003ff000) >> 10)); BX_CPU_THIS_PTR mem->readPhysicalPage(BX_CPU_THIS, pte_addr, 4, &pte); @@ -1045,7 +1046,7 @@ bx_bool BX_CPU_C::dbg_xlate_linear2phy(bx_address laddr, bx_phy_address *phy) } bx_address lpf = LPFOf(laddr); // linear page frame - bx_address poffset = laddr & 0x00000fff; // physical offset + bx_phy_address poffset = (bx_phy_address)(laddr & 0x00000fff); // physical offset bx_phy_address paddress; // see if page is in the TLB first @@ -1082,7 +1083,7 @@ bx_bool BX_CPU_C::dbg_xlate_linear2phy(bx_address laddr, bx_phy_address *phy) break; } } - paddress = pt_address + (laddr & offset_mask); + paddress = pt_address + (bx_phy_address)(laddr & offset_mask); } else // not PAE #endif @@ -1099,7 +1100,7 @@ bx_bool BX_CPU_C::dbg_xlate_linear2phy(bx_address laddr, bx_phy_address *phy) break; } } - paddress = pt_address + (laddr & offset_mask); + paddress = pt_address + (bx_phy_address)(laddr & offset_mask); } *phy = paddress; @@ -1217,7 +1218,7 @@ void BX_CPU_C::access_linear(bx_address laddr, unsigned len, unsigned curr_pl, u // Paging off. if ( (pageOffset + len) <= 4096 ) { // Access within single page. - BX_CPU_THIS_PTR address_xlation.paddress1 = laddr; + BX_CPU_THIS_PTR address_xlation.paddress1 = (bx_phy_address) laddr; BX_CPU_THIS_PTR address_xlation.pages = 1; if (rw == BX_READ) { BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, laddr, len, xlate_rw); @@ -1227,13 +1228,13 @@ void BX_CPU_C::access_linear(bx_address laddr, unsigned len, unsigned curr_pl, u bx_address lpf = LPFOf(laddr); if (tlbEntry->lpf == lpf) { - BX_CPU_THIS_PTR mem->readPhysicalPage(BX_CPU_THIS, laddr, len, data); + BX_CPU_THIS_PTR mem->readPhysicalPage(BX_CPU_THIS, (bx_phy_address) laddr, len, data); return; } // We haven't seen this page, or it's been bumped before. tlbEntry->lpf = lpf; - tlbEntry->ppf = lpf; + tlbEntry->ppf = (bx_phy_address) lpf; // Request a direct write pointer so we can do either R or W. tlbEntry->hostPageAddr = (bx_hostpageaddr_t) BX_CPU_THIS_PTR mem->getHostMemAddr(BX_CPU_THIS, A20ADDR(lpf), BX_WRITE, DATA_ACCESS); @@ -1258,7 +1259,7 @@ void BX_CPU_C::access_linear(bx_address laddr, unsigned len, unsigned curr_pl, u #endif // BX_SupportGuest2HostTLB // Let access fall through to the following for this iteration. - BX_CPU_THIS_PTR mem->readPhysicalPage(BX_CPU_THIS, laddr, len, data); + BX_CPU_THIS_PTR mem->readPhysicalPage(BX_CPU_THIS, (bx_phy_address) laddr, len, data); } else { // Write BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, laddr, len, xlate_rw); @@ -1268,12 +1269,13 @@ void BX_CPU_C::access_linear(bx_address laddr, unsigned len, unsigned curr_pl, u bx_address lpf = LPFOf(laddr); if (tlbEntry->lpf == lpf) { - BX_CPU_THIS_PTR mem->writePhysicalPage(BX_CPU_THIS, laddr, len, data); + BX_CPU_THIS_PTR mem->writePhysicalPage(BX_CPU_THIS, (bx_phy_address) laddr, len, data); return; } // We haven't seen this page, or it's been bumped before. - tlbEntry->lpf = tlbEntry->ppf = lpf; + tlbEntry->lpf = lpf; + tlbEntry->ppf = (bx_phy_address) lpf; // TLB.entry[tlbIndex].ppf field not used for PG==0. // Request a direct write pointer so we can do either R or W. tlbEntry->hostPageAddr = (bx_hostpageaddr_t) @@ -1288,18 +1290,18 @@ void BX_CPU_C::access_linear(bx_address laddr, unsigned len, unsigned curr_pl, u tlbEntry->accessBits = 0; #endif // BX_SupportGuest2HostTLB - BX_CPU_THIS_PTR mem->writePhysicalPage(BX_CPU_THIS, laddr, len, data); + BX_CPU_THIS_PTR mem->writePhysicalPage(BX_CPU_THIS, (bx_phy_address) laddr, len, data); } } else { // Access spans two pages. - BX_CPU_THIS_PTR address_xlation.paddress1 = laddr; + BX_CPU_THIS_PTR address_xlation.paddress1 = (bx_phy_address) laddr; BX_CPU_THIS_PTR address_xlation.len1 = 4096 - pageOffset; BX_CPU_THIS_PTR address_xlation.len2 = len - BX_CPU_THIS_PTR address_xlation.len1; BX_CPU_THIS_PTR address_xlation.pages = 2; - BX_CPU_THIS_PTR address_xlation.paddress2 = laddr + - BX_CPU_THIS_PTR address_xlation.len1; + BX_CPU_THIS_PTR address_xlation.paddress2 = (bx_phy_address) (laddr + + BX_CPU_THIS_PTR address_xlation.len1); #ifdef BX_LITTLE_ENDIAN if (rw == BX_READ) { diff --git a/bochs/cpu/proc_ctrl.cc b/bochs/cpu/proc_ctrl.cc index e4abde1dc..bef5598b5 100644 --- a/bochs/cpu/proc_ctrl.cc +++ b/bochs/cpu/proc_ctrl.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: proc_ctrl.cc,v 1.192 2007-12-20 20:58:37 sshwarts Exp $ +// $Id: proc_ctrl.cc,v 1.193 2007-12-23 17:21:27 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -335,16 +335,16 @@ void BX_CPU_C::MOV_RdDd(bxInstruction_c *i) switch (i->nnn()) { case 0: // DR0 - val_32 = BX_CPU_THIS_PTR dr0; + val_32 = (Bit32u) BX_CPU_THIS_PTR dr0; break; case 1: // DR1 - val_32 = BX_CPU_THIS_PTR dr1; + val_32 = (Bit32u) BX_CPU_THIS_PTR dr1; break; case 2: // DR2 - val_32 = BX_CPU_THIS_PTR dr2; + val_32 = (Bit32u) BX_CPU_THIS_PTR dr2; break; case 3: // DR3 - val_32 = BX_CPU_THIS_PTR dr3; + val_32 = (Bit32u) BX_CPU_THIS_PTR dr3; break; case 4: // DR4 @@ -594,9 +594,6 @@ void BX_CPU_C::MOV_CdRd(bxInstruction_c *i) case 0: // CR0 (MSW) SetCR0(val_32); break; - case 1: /* CR1 */ - BX_PANIC(("MOV_CdRd:CR1 not implemented yet")); - break; case 2: /* CR2 */ BX_DEBUG(("MOV_CdRd:CR2 = %08x", (unsigned) val_32)); BX_CPU_THIS_PTR cr2 = val_32; @@ -650,13 +647,9 @@ void BX_CPU_C::MOV_RdCd(bxInstruction_c *i) case 0: // CR0 (MSW) val_32 = BX_CPU_THIS_PTR cr0.val32; break; - case 1: /* CR1 */ - BX_PANIC(("MOV_RdCd: CR1 not implemented yet")); - val_32 = 0; - break; case 2: /* CR2 */ BX_DEBUG(("MOV_RdCd: reading CR2")); - val_32 = BX_CPU_THIS_PTR cr2; + val_32 = (Bit32u) BX_CPU_THIS_PTR cr2; break; case 3: // CR3 BX_DEBUG(("MOV_RdCd: reading CR3")); @@ -709,10 +702,7 @@ void BX_CPU_C::MOV_CqRq(bxInstruction_c *i) switch (i->nnn()) { case 0: // CR0 (MSW) - SetCR0(val_64); - break; - case 1: /* CR1 */ - BX_PANIC(("MOV_CqRq: CR1 not implemented yet")); + SetCR0((Bit32u) val_64); break; case 2: /* CR2 */ BX_DEBUG(("MOV_CqRq: write to CR2 of %08x:%08x", @@ -726,7 +716,7 @@ void BX_CPU_C::MOV_CqRq(bxInstruction_c *i) BX_PANIC(("CR3 write: Only 32 bit physical address space is emulated !")); } // Reserved bits take on value of MOV instruction - CR3_change(val_64); + CR3_change((bx_phy_address) val_64); BX_INSTR_TLB_CNTRL(BX_CPU_ID, BX_INSTR_MOV_CR3, val_64); break; case 4: // CR4 @@ -734,7 +724,7 @@ void BX_CPU_C::MOV_CqRq(bxInstruction_c *i) // any reserved bit of CR4 BX_DEBUG(("MOV_CqRq: write to CR4 of %08x:%08x", (Bit32u)(val_64 >> 32), (Bit32u)(val_64 & 0xFFFFFFFF))); - if (! SetCR4(val_64)) + if (! SetCR4((Bit32u) val_64)) exception(BX_GP_EXCEPTION, 0, 0); break; #if BX_SUPPORT_APIC @@ -782,10 +772,6 @@ void BX_CPU_C::MOV_RqCq(bxInstruction_c *i) case 0: // CR0 (MSW) val_64 = BX_CPU_THIS_PTR cr0.val32; break; - case 1: /* CR1 */ - BX_PANIC(("MOV_RqCq: CR1 not implemented yet")); - val_64 = 0; - break; case 2: /* CR2 */ BX_DEBUG(("MOV_RqCq: read of CR2")); val_64 = BX_CPU_THIS_PTR cr2; @@ -2346,7 +2332,7 @@ void BX_CPU_C::SYSRET(bxInstruction_c *i) BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.segment = 1; /* data/code segment */ BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.type = BX_DATA_READ_WRITE_ACCESSED; - writeEFlags(R11, EFlagsValidMask); + writeEFlags((Bit32u) R11, EFlagsValidMask); RIP = temp_RIP; } diff --git a/bochs/cpu/protect_ctrl.cc b/bochs/cpu/protect_ctrl.cc index 2cfbbe108..af09f3d99 100644 --- a/bochs/cpu/protect_ctrl.cc +++ b/bochs/cpu/protect_ctrl.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: protect_ctrl.cc,v 1.69 2007-12-21 17:30:49 sshwarts Exp $ +// $Id: protect_ctrl.cc,v 1.70 2007-12-23 17:21:27 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -627,7 +627,7 @@ void BX_CPU_C::VERW_Ew(bxInstruction_c *i) void BX_CPU_C::SGDT_Ms(bxInstruction_c *i) { Bit16u limit_16 = BX_CPU_THIS_PTR gdtr.limit; - Bit32u base_32 = BX_CPU_THIS_PTR gdtr.base; + Bit32u base_32 = (Bit32u) BX_CPU_THIS_PTR gdtr.base; write_virtual_word(i->seg(), RMAddr(i), limit_16); write_virtual_dword(i->seg(), RMAddr(i)+2, base_32); @@ -636,7 +636,7 @@ void BX_CPU_C::SGDT_Ms(bxInstruction_c *i) void BX_CPU_C::SIDT_Ms(bxInstruction_c *i) { Bit16u limit_16 = BX_CPU_THIS_PTR idtr.limit; - Bit32u base_32 = BX_CPU_THIS_PTR idtr.base; + Bit32u base_32 = (Bit32u) BX_CPU_THIS_PTR idtr.base; write_virtual_word(i->seg(), RMAddr(i), limit_16); write_virtual_dword(i->seg(), RMAddr(i)+2, base_32); diff --git a/bochs/cpu/sse_pfp.cc b/bochs/cpu/sse_pfp.cc index 75a0ef62b..b7830c36f 100644 --- a/bochs/cpu/sse_pfp.cc +++ b/bochs/cpu/sse_pfp.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: sse_pfp.cc,v 1.38 2007-12-20 20:58:37 sshwarts Exp $ +// $Id: sse_pfp.cc,v 1.39 2007-12-23 17:21:27 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (c) 2003 Stanislav Shwartsman @@ -676,8 +676,8 @@ void BX_CPU_C::CVTPS2PD_VpsWps(bxInstruction_c *i) r1 = handleDAZ(r1); } - result.xmm32u(0) = float32_to_float64(r0, status_word); - result.xmm32u(1) = float32_to_float64(r1, status_word); + result.xmm64u(0) = float32_to_float64(r0, status_word); + result.xmm64u(1) = float32_to_float64(r1, status_word); BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags); BX_WRITE_XMM_REG(i->nnn(), result); diff --git a/bochs/cpu/tasking.cc b/bochs/cpu/tasking.cc index 0bc8f94d0..2917cdfb4 100644 --- a/bochs/cpu/tasking.cc +++ b/bochs/cpu/tasking.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: tasking.cc,v 1.43 2007-12-13 23:17:50 sshwarts Exp $ +// $Id: tasking.cc,v 1.44 2007-12-23 17:21:27 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -176,9 +176,9 @@ void BX_CPU_C::task_switch(bx_selector_t *tss_selector, new_TSS_max = 103; } - obase32 = BX_CPU_THIS_PTR tr.cache.u.system.base; // old TSS.base + obase32 = (Bit32u) BX_CPU_THIS_PTR tr.cache.u.system.base; // old TSS.base old_TSS_limit = BX_CPU_THIS_PTR tr.cache.u.system.limit_scaled; - nbase32 = tss_descriptor->u.system.base; // new TSS.base + nbase32 = (Bit32u) tss_descriptor->u.system.base; // new TSS.base new_TSS_limit = tss_descriptor->u.system.limit_scaled; // TSS must have valid limit, else #TS(TSS selector) @@ -359,7 +359,7 @@ void BX_CPU_C::task_switch(bx_selector_t *tss_selector, if (source == BX_TASK_FROM_JUMP || source == BX_TASK_FROM_CALL_OR_INT) { // set the new task's busy bit - Bit32u laddr = BX_CPU_THIS_PTR gdtr.base + (tss_selector->index<<3) + 4; + bx_address laddr = BX_CPU_THIS_PTR gdtr.base + (tss_selector->index<<3) + 4; access_linear(laddr, 4, 0, BX_READ, &dword2); dword2 |= 0x00000200; access_linear(laddr, 4, 0, BX_WRITE, &dword2); @@ -371,7 +371,7 @@ void BX_CPU_C::task_switch(bx_selector_t *tss_selector, // effect on Busy bit of old task if (source == BX_TASK_FROM_JUMP || source == BX_TASK_FROM_IRET) { // Bit is cleared - Bit32u laddr = BX_CPU_THIS_PTR gdtr.base + + bx_address laddr = BX_CPU_THIS_PTR gdtr.base + (BX_CPU_THIS_PTR tr.selector.index<<3) + 4; access_linear(laddr, 4, 0, BX_READ, &temp32); temp32 &= ~0x00000200; diff --git a/bochs/cpu/vm8086.cc b/bochs/cpu/vm8086.cc index 49af3a60f..eabb0a997 100644 --- a/bochs/cpu/vm8086.cc +++ b/bochs/cpu/vm8086.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: vm8086.cc,v 1.35 2007-12-21 21:14:48 sshwarts Exp $ +// $Id: vm8086.cc,v 1.36 2007-12-23 17:21:27 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -50,7 +50,8 @@ void BX_CPU_C::stack_return_to_v86(Bit32u new_eip, Bit32u raw_cs_selector, Bit32u flags32) { - Bit32u temp_ESP, new_esp, esp_laddr; + Bit32u temp_ESP, new_esp; + bx_address esp_laddr; Bit16u raw_es_selector, raw_ds_selector, raw_fs_selector, raw_gs_selector, raw_ss_selector; diff --git a/bochs/fpu/fpu.cc b/bochs/fpu/fpu.cc index 396385eea..a9e6e5b65 100644 --- a/bochs/fpu/fpu.cc +++ b/bochs/fpu/fpu.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: fpu.cc,v 1.29 2007-12-20 20:58:38 sshwarts Exp $ +// $Id: fpu.cc,v 1.30 2007-12-23 17:21:27 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (c) 2003 Stanislav Shwartsman @@ -132,9 +132,9 @@ int BX_CPU_C::fpu_save_environment(bxInstruction_c *i) else /* Real or V86 Mode */ { Bit32u fp_ip = ((Bit32u)(BX_CPU_THIS_PTR the_i387.fcs) << 4) + - (BX_CPU_THIS_PTR the_i387.fip); + (Bit32u)(BX_CPU_THIS_PTR the_i387.fip); Bit32u fp_dp = ((Bit32u)(BX_CPU_THIS_PTR the_i387.fds) << 4) + - (BX_CPU_THIS_PTR the_i387.fdp); + (Bit32u)(BX_CPU_THIS_PTR the_i387.fdp); if (i->os32L() || i->os64L()) { diff --git a/bochs/fpu/softfloat-round-pack.cc b/bochs/fpu/softfloat-round-pack.cc index 1863d6358..4d334be9a 100755 --- a/bochs/fpu/softfloat-round-pack.cc +++ b/bochs/fpu/softfloat-round-pack.cc @@ -85,7 +85,7 @@ Bit32s roundAndPackInt32(int zSign, Bit64u absZ, float_status_t &status) int roundBits = absZ & 0x7F; absZ = (absZ + roundIncrement)>>7; absZ &= ~(((roundBits ^ 0x40) == 0) & roundNearestEven); - Bit32s z = absZ; + Bit32s z = (Bit32s) absZ; if (zSign) z = -z; if ((absZ>>32) || (z && ((z < 0) ^ zSign))) { float_raise(status, float_flag_invalid); diff --git a/bochs/fpu/softfloat.cc b/bochs/fpu/softfloat.cc index d1e4bfd8b..0c87552fb 100755 --- a/bochs/fpu/softfloat.cc +++ b/bochs/fpu/softfloat.cc @@ -608,7 +608,7 @@ float32 float32_mul(float32 a, float32 b, float_status_t &status) aSig = (aSig | 0x00800000)<<7; bSig = (bSig | 0x00800000)<<8; shift64RightJamming(((Bit64u) aSig) * bSig, 32, &zSig64); - zSig = zSig64; + zSig = (Bit32u) zSig64; if (0 <= (Bit32s) (zSig<<1)) { zSig <<= 1; --zExp; @@ -1083,7 +1083,7 @@ Bit32s float64_to_int32_round_to_zero(float64 a, float_status_t &status) shiftCount = 0x433 - aExp; savedASig = aSig; aSig >>= shiftCount; - z = aSig; + z = (Bit32s) aSig; if (aSign) z = -z; if ((z < 0) ^ aSign) { invalid: @@ -1201,7 +1201,7 @@ float32 float64_to_float32(float64 a, float_status_t &status) float_raise(status, float_flag_denormal); } shift64RightJamming(aSig, 22, &aSig); - zSig = aSig; + zSig = (Bit32u) aSig; if (aExp || zSig) { zSig |= 0x40000000; aExp -= 0x381; @@ -2107,7 +2107,7 @@ Bit32s floatx80_to_int32_round_to_zero(floatx80 a, float_status_t &status) shiftCount = 0x403E - aExp; savedASig = aSig; aSig >>= shiftCount; - z = aSig; + z = (Bit32s) aSig; if (aSign) z = -z; if ((z < 0) ^ aSign) { invalid: @@ -2237,7 +2237,7 @@ float32 floatx80_to_float32(floatx80 a, float_status_t &status) } shift64RightJamming(aSig, 33, &aSig); if (aExp || aSig) aExp -= 0x3F81; - return roundAndPackFloat32(aSign, aExp, aSig, status); + return roundAndPackFloat32(aSign, aExp, (Bit32u) aSig, status); } /*---------------------------------------------------------------------------- diff --git a/bochs/memory/misc_mem.cc b/bochs/memory/misc_mem.cc index 676a1bf07..ac25948bf 100644 --- a/bochs/memory/misc_mem.cc +++ b/bochs/memory/misc_mem.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: misc_mem.cc,v 1.106 2007-12-10 19:05:07 sshwarts Exp $ +// $Id: misc_mem.cc,v 1.107 2007-12-23 17:21:28 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2002 MandrakeSoft S.A. @@ -90,7 +90,7 @@ void BX_MEM_C::init_memory(Bit32u memsize) { unsigned idx; - BX_DEBUG(("Init $Id: misc_mem.cc,v 1.106 2007-12-10 19:05:07 sshwarts Exp $")); + BX_DEBUG(("Init $Id: misc_mem.cc,v 1.107 2007-12-23 17:21:28 sshwarts Exp $")); alloc_vector_aligned(memsize+ BIOSROMSZ + EXROMSIZE + 4096, BX_MEM_VECTOR_ALIGN); BX_MEM_THIS len = memsize; @@ -243,7 +243,7 @@ void BX_MEM_C::load_ROM(const char *path, bx_phy_address romaddress, Bit8u type) return; } } else { - romaddress = (bx_phy_address)-size; + romaddress = (bx_phy_address)(-size); } offset = romaddress & BIOS_MASK; if ((romaddress & 0xf0000) < 0xf0000) {