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- the implementation of accessors should not use BX_CPU_C_PREFIX. When static

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member functions are turned on, BX_CPU_C_PREFIX expands to nothing, and any
  method that uses BX_CPU_C_PREFIX instead of explictly writing "BX_CPU_C::"
  will not be a member function at all.  This makes it impossible for code
  outside the BX_CPU_C object to call the accessor because sometimes the method
  is at ptr_to_cpu->get_EIP() and other times you'd have to do just get_EIP().
  The only way I've found to solve this is to remove the BX_CPU_C_PREFIX
  and write BX_CPU_C:: instead.
- in debug/dbg_main.cc I removed the EBP, EIP, ESP, SP shortcuts. Now
  the accessors are used everywhere.  Also I replaced a reference to
  the short-lived get_erx() accessor with ones that work: get_EAX(), etc.
- with these changes the current cvs compiles with any combination of
  debugger enabled/disabled, SMP enabled/disabled, and x86-64 enabled/disabled.
This commit is contained in:
Bryce Denney 2002-09-13 18:15:20 +00:00
parent 8f860f0fd1
commit 7ff21b5f30
2 changed files with 29 additions and 37 deletions
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29
bochs/cpu/cpu.h
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: cpu.h,v 1.49 2002-09-13 17:04:11 kevinlawton Exp $
// $Id: cpu.h,v 1.50 2002-09-13 18:15:19 bdenney Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -376,6 +376,7 @@ typedef struct {
BX_CPP_INLINE void clear_##name (); \
BX_CPP_INLINE Boolean get_##name (); \
BX_CPP_INLINE void set_##name (Bit8u val);
// end of DECLARE_EFLAGS_ACCESSORS
#define IMPLEMENT_EFLAGS_ACCESSORS(name,bitnum) \
BX_CPP_INLINE void BX_CPU_C::assert_##name () { \
@ -391,7 +392,7 @@ typedef struct {
BX_CPU_THIS_PTR eflags.val32 = \
(BX_CPU_THIS_PTR eflags.val32&~(1<<bitnum)) | (val ? (1<<bitnum) : 0); \
}
// end of #define
// end of IMPLEMENT_EFLAGS_ACCESSORS
#define DECLARE_8BIT_REGISTER_ACCESSORS(name) \
BX_SMF BX_CPP_INLINE Bit8u get_##name(void); \
@ -406,34 +407,34 @@ typedef struct {
BX_SMF BX_CPP_INLINE void set_##name(Bit32u val);
#define IMPLEMENT_8LBIT_REGISTER_ACCESSORS(name) \
BX_SMF BX_CPP_INLINE void BX_CPU_C_PREFIX set_##name(Bit8u val) { \
BX_CPP_INLINE void BX_CPU_C::set_##name(Bit8u val) { \
BX_CPU_THIS_PTR gen_reg[BX_8BIT_REG_##name].word.byte.rl = val; \
} \
BX_SMF BX_CPP_INLINE Bit8u BX_CPU_C_PREFIX get_##name(void) { \
BX_CPP_INLINE Bit8u BX_CPU_C::get_##name(void) { \
return (BX_CPU_THIS_PTR gen_reg[BX_8BIT_REG_##name].word.byte.rl); \
}
}
#define IMPLEMENT_8HBIT_REGISTER_ACCESSORS(name) \
BX_SMF BX_CPP_INLINE void BX_CPU_C_PREFIX set_##name(Bit8u val) { \
BX_CPP_INLINE void BX_CPU_C::set_##name(Bit8u val) { \
BX_CPU_THIS_PTR gen_reg[BX_8BIT_REG_##name-4].word.byte.rh = val; \
} \
BX_SMF BX_CPP_INLINE Bit8u BX_CPU_C_PREFIX get_##name(void) { \
BX_CPP_INLINE Bit8u BX_CPU_C::get_##name(void) { \
return (BX_CPU_THIS_PTR gen_reg[BX_8BIT_REG_##name-4].word.byte.rh); \
}
#define IMPLEMENT_16BIT_REGISTER_ACCESSORS(name) \
BX_SMF BX_CPP_INLINE void BX_CPU_C_PREFIX set_##name(Bit16u val) { \
BX_CPP_INLINE void BX_CPU_C::set_##name(Bit16u val) { \
BX_CPU_THIS_PTR gen_reg[BX_16BIT_REG_##name].word.rx = val; \
} \
BX_SMF BX_CPP_INLINE Bit16u BX_CPU_C_PREFIX get_##name(void) { \
BX_CPP_INLINE Bit16u BX_CPU_C::get_##name(void) { \
return (BX_CPU_THIS_PTR gen_reg[BX_16BIT_REG_##name].word.rx); \
}
#define IMPLEMENT_32BIT_REGISTER_ACCESSORS(name) \
BX_SMF BX_CPP_INLINE void BX_CPU_C_PREFIX set_##name(Bit32u val) { \
BX_CPP_INLINE void BX_CPU_C::set_##name(Bit32u val) { \
BX_CPU_THIS_PTR gen_reg[BX_32BIT_REG_##name].dword.erx = val; \
} \
BX_SMF BX_CPP_INLINE Bit32u BX_CPU_C_PREFIX get_##name(void) { \
BX_CPP_INLINE Bit32u BX_CPU_C::get_##name(void) { \
return (BX_CPU_THIS_PTR gen_reg[BX_32BIT_REG_##name].dword.erx); \
}
@ -2245,8 +2246,8 @@ union {
DECLARE_32BIT_REGISTER_ACCESSORS(ESI);
DECLARE_32BIT_REGISTER_ACCESSORS(EDI);
BX_SMF BX_CPP_INLINE Bit8u get_CPL(void);
BX_SMF BX_CPP_INLINE Bit32u get_EIP(void);
BX_CPP_INLINE Bit8u get_CPL(void);
BX_CPP_INLINE Bit32u get_EIP(void);
BX_SMF BX_CPP_INLINE int which_cpu(void);
@ -2311,7 +2312,7 @@ BX_SMF BX_CPP_INLINE Bit8u BX_CPU_C_PREFIX get_CPL(void) {
return (BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.rpl);
}
BX_SMF BX_CPP_INLINE Bit32u BX_CPU_C_PREFIX get_EIP(void) {
BX_CPP_INLINE Bit32u BX_CPU_C::get_EIP(void) {
return (BX_CPU_THIS_PTR dword.eip);
}

37
bochs/debug/dbg_main.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: dbg_main.cc,v 1.60 2002-09-12 18:52:14 bdenney Exp $
// $Id: dbg_main.cc,v 1.61 2002-09-13 18:15:20 bdenney Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -41,17 +41,6 @@ extern "C" {
}
#endif
// define shortcuts to get register from the default CPU
#define EBP (BX_CPU(dbg_cpu)->gen_reg[5].get_erx())
#if BX_SUPPORT_X86_64
#define EIP (BX_CPU(dbg_cpu)->dword.eip)
#else
#define EIP (BX_CPU(dbg_cpu)->eip)
#endif
#define ESP (BX_CPU(dbg_cpu)->gen_reg[4].get_erx ())
#define SP (BX_CPU(dbg_cpu)->gen_reg[4].word.rx)
static unsigned doit = 0;
#define SIM_NAME0 "bochs"
@ -1001,8 +990,8 @@ bx_dbg_where_command()
fprintf(stderr, "non-zero stack base\n");
return;
}
Bit32u bp = EBP;
Bit32u ip = EIP;
Bit32u bp = BX_CPU(dbg_cpu)->get_EBP ();
Bit32u ip = BX_CPU(dbg_cpu)->get_EIP ();
fprintf(stderr, "(%d) 0x%08x\n", 0, ip);
for (int i = 1; i < 50; i++) {
// Up
@ -1247,7 +1236,9 @@ void
bx_dbg_print_stack_command(int nwords)
{
// Get linear address for stack top
Bit32u sp = (BX_CPU(dbg_cpu)->sregs[BX_SREG_SS].cache.u.segment.d_b) ? ESP : SP;
Bit32u sp = (BX_CPU(dbg_cpu)->sregs[BX_SREG_SS].cache.u.segment.d_b)?
BX_CPU(dbg_cpu)->get_ESP ()
: BX_CPU(dbg_cpu)->get_SP ();
Bit32u linear_sp = sp + BX_CPU(dbg_cpu)->sregs[BX_SREG_SS].cache.u.segment.base;
Bit8u buf[8];
@ -2111,14 +2102,14 @@ void bx_dbg_disassemble_current (int which_cpu, int print_time)
if( BX_CPU(dbg_cpu)->trace_reg )
fprintf( stderr,
"eax: %08X\tecx: %08X\tedx: %08X\tebx: %08X\tesp: %08X\tebp: %08X\tesi: %08X\tedi: %08X\ncf=%u af=%u zf=%u sf=%u of=%u pf=%u tf=%u if=%u df=%u iopl=%u nt=%u rf=%u vm=%u\n",
BX_CPU(which_cpu)->gen_reg[0].get_erx(),
BX_CPU(which_cpu)->gen_reg[1].get_erx(),
BX_CPU(which_cpu)->gen_reg[2].get_erx(),
BX_CPU(which_cpu)->gen_reg[3].get_erx(),
BX_CPU(which_cpu)->gen_reg[4].get_erx(),
BX_CPU(which_cpu)->gen_reg[5].get_erx(),
BX_CPU(which_cpu)->gen_reg[6].get_erx(),
BX_CPU(which_cpu)->gen_reg[7].get_erx(),
BX_CPU(which_cpu)->get_EAX (),
BX_CPU(which_cpu)->get_EBX (),
BX_CPU(which_cpu)->get_ECX (),
BX_CPU(which_cpu)->get_EDX (),
BX_CPU(which_cpu)->get_ESP (),
BX_CPU(which_cpu)->get_EBP (),
BX_CPU(which_cpu)->get_ESI (),
BX_CPU(which_cpu)->get_EDI (),
!!BX_CPU(which_cpu)->get_CF(),
!!BX_CPU(which_cpu)->get_AF(),
!!BX_CPU(which_cpu)->get_ZF(),