From 7d2df1b1046a0a8f4b000ee103de91b882ab0bc7 Mon Sep 17 00:00:00 2001 From: Stanislav Shwartsman Date: Wed, 11 Jun 2008 21:05:38 +0000 Subject: [PATCH] same optimization in disasam --- bochs/disasm/dis_decode.cc | 26 +++++--------------------- 1 file changed, 5 insertions(+), 21 deletions(-) diff --git a/bochs/disasm/dis_decode.cc b/bochs/disasm/dis_decode.cc index 55501f135..ed7e59204 100644 --- a/bochs/disasm/dis_decode.cc +++ b/bochs/disasm/dis_decode.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: dis_decode.cc,v 1.46 2008-04-27 19:47:12 sshwarts Exp $ +// $Id: dis_decode.cc,v 1.47 2008-06-11 21:05:38 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// #include @@ -106,32 +106,16 @@ x86_insn disassembler::decode(bx_bool is_32, bx_bool is_64, bx_address base, bx_ continue; case 0x26: // ES: - if (! is_64) insn.seg_override = ES_REG; - rex_prefix = 0; - continue; - case 0x2e: // CS: - if (! is_64) insn.seg_override = CS_REG; - rex_prefix = 0; - continue; - case 0x36: // SS: - if (! is_64) insn.seg_override = SS_REG; - rex_prefix = 0; - continue; - case 0x3e: // DS: - if (! is_64) insn.seg_override = DS_REG; + if (! is_64) insn.seg_override = (insn.b1 >> 3) & 3; rex_prefix = 0; continue; case 0x64: // FS: - insn.seg_override = FS_REG; - rex_prefix = 0; - continue; - case 0x65: // GS: - insn.seg_override = GS_REG; + insn.seg_override = insn.b1 & 0xf; rex_prefix = 0; continue; @@ -152,11 +136,11 @@ x86_insn disassembler::decode(bx_bool is_32, bx_bool is_64, bx_address base, bx_ continue; case 0xf2: // repne - sse_prefix = SSE_PREFIX_F2; + case 0xf3: // rep + sse_prefix = insn.b1 & 0xf; rex_prefix = 0; continue; - case 0xf3: // rep sse_prefix = SSE_PREFIX_F3; rex_prefix = 0; continue;