diff --git a/bochs/cpu/fetchdecode.cc b/bochs/cpu/fetchdecode.cc index a09e661ef..35fe054fb 100644 --- a/bochs/cpu/fetchdecode.cc +++ b/bochs/cpu/fetchdecode.cc @@ -454,7 +454,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo32[512*2] = { /* 0F 06 /w */ { BxTraceEnd, BX_IA_CLTS }, /* 0F 07 /w */ { BxTraceEnd, BX_IA_SYSRET_LEGACY }, /* 0F 08 /w */ { BxTraceEnd, BX_IA_INVD }, - /* 0F 09 /w */ { BxTraceEnd, BX_IA_WBINVD }, + /* 0F 09 /w */ { 0, BX_IA_WBINVD }, /* 0F 0A /w */ { 0, BX_IA_ERROR }, /* 0F 0B /w */ { BxTraceEnd, BX_IA_UD2A }, /* 0F 0C /w */ { 0, BX_IA_ERROR }, @@ -999,7 +999,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo32[512*2] = { /* 0F 06 /d */ { BxTraceEnd, BX_IA_CLTS }, /* 0F 07 /d */ { BxTraceEnd, BX_IA_SYSRET_LEGACY }, /* 0F 08 /d */ { BxTraceEnd, BX_IA_INVD }, - /* 0F 09 /d */ { BxTraceEnd, BX_IA_WBINVD }, + /* 0F 09 /d */ { 0, BX_IA_WBINVD }, /* 0F 0A /d */ { 0, BX_IA_ERROR }, /* 0F 0B /d */ { BxTraceEnd, BX_IA_UD2A }, /* 0F 0C /d */ { 0, BX_IA_ERROR }, diff --git a/bochs/cpu/fetchdecode64.cc b/bochs/cpu/fetchdecode64.cc index e03f4327b..7204540f2 100644 --- a/bochs/cpu/fetchdecode64.cc +++ b/bochs/cpu/fetchdecode64.cc @@ -405,7 +405,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo64[512*3] = { /* 0F 06 /w */ { BxTraceEnd, BX_IA_CLTS }, /* 0F 07 /w */ { BxTraceEnd, BX_IA_SYSRET }, /* 0F 08 /w */ { BxTraceEnd, BX_IA_INVD }, - /* 0F 09 /w */ { BxTraceEnd, BX_IA_WBINVD }, + /* 0F 09 /w */ { 0, BX_IA_WBINVD }, /* 0F 0A /w */ { 0, BX_IA_ERROR }, /* 0F 0B /w */ { BxTraceEnd, BX_IA_UD2A }, /* 0F 0C /w */ { 0, BX_IA_ERROR }, @@ -920,7 +920,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo64[512*3] = { /* 0F 06 /d */ { BxTraceEnd, BX_IA_CLTS }, /* 0F 07 /d */ { BxTraceEnd, BX_IA_SYSRET }, /* 0F 08 /d */ { BxTraceEnd, BX_IA_INVD }, - /* 0F 09 /d */ { BxTraceEnd, BX_IA_WBINVD }, + /* 0F 09 /d */ { 0, BX_IA_WBINVD }, /* 0F 0A /d */ { 0, BX_IA_ERROR }, /* 0F 0B /d */ { BxTraceEnd, BX_IA_UD2A }, /* 0F 0C /d */ { 0, BX_IA_ERROR }, @@ -1435,7 +1435,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo64[512*3] = { /* 0F 06 /q */ { BxTraceEnd, BX_IA_CLTS }, /* 0F 07 /q */ { BxTraceEnd, BX_IA_SYSRET }, /* 0F 08 /q */ { BxTraceEnd, BX_IA_INVD }, - /* 0F 09 /q */ { BxTraceEnd, BX_IA_WBINVD }, + /* 0F 09 /q */ { 0, BX_IA_WBINVD }, /* 0F 0A /q */ { 0, BX_IA_ERROR }, /* 0F 0B /q */ { BxTraceEnd, BX_IA_UD2A }, /* 0F 0C /q */ { 0, BX_IA_ERROR }, diff --git a/bochs/cpu/proc_ctrl.cc b/bochs/cpu/proc_ctrl.cc index b74d4b4c5..8008df23a 100644 --- a/bochs/cpu/proc_ctrl.cc +++ b/bochs/cpu/proc_ctrl.cc @@ -244,12 +244,12 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::WBINVD(bxInstruction_c *i) } #endif - invalidate_prefetch_q(); +//invalidate_prefetch_q(); - BX_DEBUG(("WBINVD: Flush internal caches !")); + BX_DEBUG(("WBINVD: WB-Invalidate internal caches !")); BX_INSTR_CACHE_CNTRL(BX_CPU_ID, BX_INSTR_WBINVD); - flushICaches(); +//flushICaches(); BX_NEXT_TRACE(i); }