From 74c73e5a76f43b6853b4f5b4b95bbcf818294688 Mon Sep 17 00:00:00 2001 From: Stanislav Shwartsman Date: Fri, 20 Dec 2019 15:34:14 +0000 Subject: [PATCH] AVX512: Allow masked fault suppression for many AVX512 instructions - not all cases reviewed yet, more to come --- bochs/cpu/decoder/ia_opcodes.def | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/bochs/cpu/decoder/ia_opcodes.def b/bochs/cpu/decoder/ia_opcodes.def index c9219b2a9..70426a28a 100644 --- a/bochs/cpu/decoder/ia_opcodes.def +++ b/bochs/cpu/decoder/ia_opcodes.def @@ -2938,11 +2938,11 @@ bx_define_opcode(BX_IA_V512_VPSLLW_VdqHdqWdq, &BX_CPU_C::LOADU_Wdq, &BX_CPU_C::V bx_define_opcode(BX_IA_V512_VPSLLW_VdqHdqWdq_Kmask, &BX_CPU_C::LOADU_Wdq, &BX_CPU_C::VPSLLW_MASK_VdqHdqWdqR, BX_ISA_AVX512_BW, OP_Vdq, OP_Hdq, OP_mVdq128, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST) bx_define_opcode(BX_IA_V512_VPSRLW_UdqIb, &BX_CPU_C::LOAD_Vector, &BX_CPU_C::VPSRLW_UdqIb, BX_ISA_AVX512_BW, OP_Hdq, OP_mVdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST) -bx_define_opcode(BX_IA_V512_VPSRLW_UdqIb_Kmask, &BX_CPU_C::LOAD_Vector, &BX_CPU_C::VPSRLW_MASK_UdqIb, BX_ISA_AVX512_BW, OP_Hdq, OP_mVdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST) +bx_define_opcode(BX_IA_V512_VPSRLW_UdqIb_Kmask, &BX_CPU_C::LOAD_MASK_VectorW, &BX_CPU_C::VPSRLW_MASK_UdqIb, BX_ISA_AVX512_BW, OP_Hdq, OP_mVdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST) bx_define_opcode(BX_IA_V512_VPSLLW_UdqIb, &BX_CPU_C::LOAD_Vector, &BX_CPU_C::VPSLLW_UdqIb, BX_ISA_AVX512_BW, OP_Hdq, OP_mVdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST) -bx_define_opcode(BX_IA_V512_VPSLLW_UdqIb_Kmask, &BX_CPU_C::LOAD_Vector, &BX_CPU_C::VPSLLW_MASK_UdqIb, BX_ISA_AVX512_BW, OP_Hdq, OP_mVdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST) +bx_define_opcode(BX_IA_V512_VPSLLW_UdqIb_Kmask, &BX_CPU_C::LOAD_MASK_VectorW, &BX_CPU_C::VPSLLW_MASK_UdqIb, BX_ISA_AVX512_BW, OP_Hdq, OP_mVdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST) bx_define_opcode(BX_IA_V512_VPSRAW_UdqIb, &BX_CPU_C::LOAD_Vector, &BX_CPU_C::VPSRAW_UdqIb, BX_ISA_AVX512_BW, OP_Hdq, OP_mVdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST) -bx_define_opcode(BX_IA_V512_VPSRAW_UdqIb_Kmask, &BX_CPU_C::LOAD_Vector, &BX_CPU_C::VPSRAW_MASK_UdqIb, BX_ISA_AVX512_BW, OP_Hdq, OP_mVdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST) +bx_define_opcode(BX_IA_V512_VPSRAW_UdqIb_Kmask, &BX_CPU_C::LOAD_MASK_VectorW, &BX_CPU_C::VPSRAW_MASK_UdqIb, BX_ISA_AVX512_BW, OP_Hdq, OP_mVdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST) bx_define_opcode(BX_IA_V512_VPSRLD_VdqHdqWdq, &BX_CPU_C::LOADU_Wdq, &BX_CPU_C::VPSRLD_VdqHdqWdqR, BX_ISA_AVX512, OP_Vdq, OP_Hdq, OP_mVdq128, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST) bx_define_opcode(BX_IA_V512_VPSRLQ_VdqHdqWdq, &BX_CPU_C::LOADU_Wdq, &BX_CPU_C::VPSRLQ_VdqHdqWdqR, BX_ISA_AVX512, OP_Vdq, OP_Hdq, OP_mVdq128, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)